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Field Emission Transmission Electron Microscope and Energy Dispersive

Chapter 1 Introduction 1

2.4 Measurements and Analyses

2.4.4 Field Emission Transmission Electron Microscope and Energy Dispersive

The state-of-the-art JEOL JEM-2100F field emission transmission electron microscope is equipped with an Oxford INCA Energy TEM 200 EDS (energy dispersive X-ray spectrometer) system, a Gatan GIF Tridiem EELS (electron energy loss spectrometer) system and a Fischione high-angle annular dark field detector.

Features of the JEM-2100F include a high-brightness Schottky field emission electron gun producing a probe size of less than 0.2 nm. Ultra-high point-to-point TEM resolution is 0.19 nm; atomic scale resolution of 0.136 nm can be achieved using high angle annular dark field (HAADF) scanning transmission electron microscopy (STEM) imaging. The facilities are ideally suited for crystallographic and chemical analyses at a sub-nanometer scale, including high-sensitivity EDS and EELS.

Both EDS and EELS are analytical TEM (ATEM) techniques and can provide elemental composition and distribution information. The Oxford INCA Energy TEM 200 EDS system has the following features: automatic peak ID and labeling;

element maps and linescans using SmartMap data acquisition; ability to define a line or grid of points for automatic data acquisition; absorption correction for samples of finite thickness and Sitelock image drift correction.

2.4.5 Scanning Probe Microscopy

SPM has enabled researchers to image surfaces at the nanometer scale. Rather than using a beam of light or electrons, SPM uses a fine probe that is scanned over a surface (or the surface is scanned under the probe). By using such a probe, researchers are no longer restrained by the wavelength of light or electrons. The

resolution obtainable with this technique can resolve atoms, and true 3-D maps of surfaces are possible. SPM is a general term, used to describe a growing number of techniques that use a sharp probe to scan over a surface and measure some property of that surface.

2.4.6 Current-Voltage Measurements

The most important part of all is current-voltage measurement. It could understand the electrical properties of the device from current-voltage curve. The electrical measurement system consisted of a probe station, an Agilent 4155C semiconductor parameter analyzer, an Agilent E5250A low leakage switch which are controlled by personal computer with the Agilent VEE software, and GPIB controller.

Our electrical measurements were sorted into five items, static conductivity switching measurement, retention test, stress test, endurance test, and other electrical phenomenon measurement. The aforementioned four items were tested for criteria of our memory device and the last item was executed to understand the fundamental mechanism of our samples.

a. Static Resistive Switching Measurement

The measurement was performed by Agilent 4155C which applied a dc voltage sweeping between two specified voltages to observe the resistive switching of the sample. The measured results could observe the relation of the switching voltage and the H-state or L-state current. Use Agilent 4155C to execute the double voltage sweep function, current-voltage curve was determined with two different-current states associated with the positive applied voltage or the negative one.

b. Retention Test

Retention time is the time of information keeping. The data (1 or 0) is not able to be distinguished beyond retention time. The current of the sample in the H-state or L-state was measured after fixed period. The retention time of the V-doped SZO film was very long. By applying the higher temperature on the device, the retention test is accelerative.

c. Non-Destructive Readout Test

The sample stressed smaller voltage than the switching voltage was able to stay in the same conductivity state. The smaller positive and the smaller negative sweep voltage were applied on the sample all the time and observed that the current changed with sweeping cycles.

d. Endurance Test

The device applied the enough voltage (positive or negative voltage) was able to change the resistance between two states. Of course, the resistance ratio of the device increased after repeat sweeping cycles. The phenomenon, which was the decrease of the H-state current and the increase of the L-state current, was useful for us to explain the conduction mechanism.

Fig. 2-1 Illustration of the experimental flow.

(100) Si substrate

RCA

Oxidation (200nm SiO2)

Deposition of Pt-Ti bottom electrode by electron beam evaporation

Deposition of LNO buffer layer

RTA for LNO buffer layer

Deposition of SZO resistive layer

Deposition of Al top electrode

Fig. 2-2 Preparation flow of the device.

Fig. 2-3 Cross section of the four-layer structure device.

Fig. 2-4 Cross section of the tri-layer structure device.

Fig. 2-5 Illustration of the sputter system.

La2O3 NiO

Mixed and ball-milled in the absolute alcohol for 24hr and dried at the 85oC oven

Heated at 600oC for 2hr and then baked at 1300oC for 10hr

Ball-milled in the absolute alcohol for 24hr and dried by the 150oC oven for 2hr

Fig. 2-6 Synthesis flow chart of LNO powder.

SrCO3 ZrO2

Mixed and ball-milled in the absolute alcohol for 24hr and dried by the oven

Heated at 600oCand 800oC for 2hr and then baked at 1250oC for 10hr

Ball-milled in the absolute alcohol for 24hr and dried by the oven

Heated at 600oCand 800oC for 2hr and then baked at 1400oC for 10hr

Ball-milled in the absolute alcohol for 24hr and dried by the oven

Dopant oxide

Fig. 2-7 Synthesis flow chart of doped SZO powder.

Chapter 3

Possible Mechanisms of Conductivity Switching Phenomenon

Generally speaking, the basic conduction mechanisms in insulating films are Schottky emission, Frenkel-Poole emission, Tunneling or field emission, Space-charge-limited current, Ohmic conduction and Ionic conduction. The summary of mathematical expressions and voltage versus temperature dependence of these mechanisms are listed in Table. 3-1 [27].

These basic mechanisms are explained briefly as follows.

(1) Schottky emission corresponds to the thermionic emission induced carrier transport across the metal-insulator interface or the insulator-semiconductor interface.

(2) Frenkel-Poole (F-P) emission is caused by field-enhanced thermal excitation of trapped electrons into the conduction band. The expression of trap state is virtually identical to Schottky emission, but the barrier height is instead of the depth of trap potential well. The barrier lowing is twice as large as Schottky emission one because of the immobility of the positive charge.

(3) Tunnel or field emission is due to the current induced by electrons tunneling from the metal fermi-energy into the insulator conduction band.

(4) Space-charge-limited current is caused by the current that result from the carriers injected into insulator didn’t be recombination with any compensating charge.

(5) Ohmic conduction corresponds to the electrons that hop from one isolated state to the next by thermally exciting, that usually happen in low voltage and high temperature condition.

(6) Ionic condition presents ions can’t be readily injected or extracted from the insulator. Positive and negative space charge will build up near interface after an initial current flow. In addition, hysteresis effect happens result from residual

internal field caused some ions to flow back their equilibrium position when the applied voltage is removed.

At present, there are more and more reports to study the possible mechanism of RRAM deeply based on these basic mechanisms. Many researchers illustrate their opinions for the source of conductivity switching characteristics from various materials. From these reports, the possible mechanism could be sorted into six species shown in follows.

(1) Conducting filament (2) Charge transfer

(3) Storage and release of charge carrier

(4) Dipole rearrangement induced polarization (5) Phase transformation

(6) Formation of the depletion layer

The possible mechanism will be introduce and analyze in the following sections.

3.1 Conductance Filament [16], [28]-[33]

The conducting filament is a theory that one or several conducting paths are formed in the dielectric layer by field such that conductivity is changed. This conducting channel can be divided into two kinds that one is composed by metallic elements (ohmic mechanism), and the other is composed by defects.

Metallic filament will be “line up” to form a conducting path inside the insulator when a voltage is applied on the device. That is H-state (high conductivity). In contrast, when the voltage is applied to the H-state device, this path will be broken and the conductivity will be back to initial low conductivity. This is L-state (low conductivity). It is noteworthy that these metallic atoms may come from the electrodes or just are neutral

impurities in the insulator. However, the conductivity should increase with decreasing temperature in two cases. In addition, with applying further positive pulses, the area of the conducting path may increase, but thus newly appearing path would be less conducting than that formed on the first pulse, because most of the current injected by the electric pulse flows through the first conducting path and has much less effect on the other area. Therefore, the dc resistance, which is primarily dominated by the most conducting path, does not change very much with further applying electric pulses.

A defect configuration which is consisting of alternate anions and cation vacancies was also proposed. It is reasonable that conduction then take place by hopping between adjacent localized anion sites; besides, this model would be the (more or less) one dimensional analogue, furthermore, might satisfactorily account for the low activity energy. The other condition is that when voltage is applied, the conductivity increases to form H-state due to clusters or domains connecting, and then the resistance value will be lower than original one. Reversing the pulsed field could reshape the clusters and rearrange them into a secondary organized state to form another conductivity state.

3.2 Charge Transfer [15]

In general, defects or impurities in insulator will form energy states between energy gaps, thus one can utilize various dopants to induce different acceptor and donor levels.

According to A. Beck’s statement, energy levels can be formed by doping transitional elements into insulator film. After applying a voltage pulse, the transitional elements may change their valences because of unsteadiness of transitional elements. Hence, the donor or acceptor level is also changed, and mobile electrons are induced. On the other hand, the transitional elements will restore to its original valences through an opposite polarity of voltage. In conclusion, charge transfer process via donor and acceptor level as

studied by photocurrent and luminescence measurements appear to be a possible mechanism for carrier creation and transport in insulator.

3.3 Storage and Release of Charge Carriers [17], [21], [34], [35]

The concept of this mechanism is that charge carriers trapped and detrapped process will induce current in insulator. It is much similar to charge stored and released in the floating gate flash memory. Besides, this mechanism can be divided into “bulk effect”

and “interface effect” i.e., two sorts.

The impurity band of charge transport level is deep charge-trapping level or emission (recombination) center. At H-state, the transport levels or the traps are uncharged. At low voltages, charge is injected primarily from one of the electrodes and moves through the transport states. At voltages in the negative differential resistance region, charges tunnel into the trapping sites and a space-charge field builds up, which opposes the field applied at the injecting electrode and reduces the current to form the L-state. If the voltage is rapidly reduced to zero, charge is left in the traps and forms an electrical field. When applying another smaller voltage again to the device this field will reduce the applied field and induce lower current flow. In contrast, by applying opposite direction voltage, the trapped charge will be drawn out and back to H-state.

Some reports suggest interface electrochemistry between electrode and insulator, such as oxygen vacancy creation/diffusion, should be responsible to the switch phenomenon. Besides, the higher field and defect density may be as a result of the relatively high mobility that is observed. That is so-called electrical oxidation and reduction charge transfer. This behavior also implies a process of charge stored and released in insulator happens because electrical oxidation means an element gets electrons and electrical reduction means it loses electrons.

3.4 Dipole Rearrangement Induced Polarization [36], [37]

This mechanism with conductivity switching character is attributed to its materials have a permanent dipole moment inside. When a voltage is applied, the disorder dipoles in local ranges will be rearranged along electrical field direction and form the first conductive state. By applying opposite polarity voltage, the dipoles can be rearranged along opposite electrical field direction to form another conductive state. This mechanism is usually proposed to be the conductivity change origin in ferroelectric and some organic materials. There are a large number of researches about FeRAM application associated with its hysteresis curve. On the other hand, some investigations also prove ferroelectrics have reversible conductivity switching phenomenon due to its polarization reversal. For example, conductivity switching character is observed in ultra-thin ferroelectrics film such as PZT and bulk single crystal ones such as LiNbO3.

3.5 Phase Transformation [4]-[6], [9], [10], [14], [38], [39]

The concept of this mechanism is the focus on the conductivity of poly-crystal film is higher than it of amorphous film. The typical case is OUM (Ovonic Unified Memory) that is manufactured by chalocogenide material. One can control different temperature and heating time to cause different phase. Thus, by controlling pulse voltage width, that means different heated gradient result in different phase (different conductivity). It is noticeable that the polarity of pulse voltage has no affection on crystalline phase (no difference on conductivity). The crystalline phase is only varied through different pulse voltage width.

3.6 Formation of the Depletion Layer [40]

The depletion region is formed with a layer of unscreened dopant ions. It is clear that Schottky barriers will be set up at electrode and insulator interface. In some investigations, the device manufactured by organic or polymer insulator with reversible conductivity reveals its capacitance change with applying voltage. Because when a positive voltage is applied to the device, some negative carriers or ions will drift to near interface region, and by applying negative voltage will attract positive ones to near interface region.

Table3-1 Basic conduction mechanisms in insulators [28].

Conducting mechanism Voltage and temperature dependence

Schottky emission ~ 2exp( a V q B)

Tunneling (field) emission ~ 2exp( 1) J V

V

Space-charge-limited current J ~V 2

Ohmic conduction ~ exp( 1)

Chapter4

Results and Discussion

4.1 Properties and Analyses of the LaNiO3 Buffer Layer and SrZrO3

Resistive Films

According to the previous studies, the Al/0.3% V-doped SZO/LNO structure device has resistive switching performances [26]. But the switching voltage of the tri-layer structure device is over than 10V. It is proposed due to the low conductivity of the LNO bottom electrode. Large amount of applied voltage drops on the LNO bottom electrode causing to the high operation voltage. In order to reduce the operation voltage, several methods are used to enhance the conductivity of the LNO bottom electrode, such as the RTA process of the LNO, controlling the sputtering parameters for the LNO, different bottom electrode used to replace the LNO, Al/0.3% V-doped SZO/LNO/Pt structure (four-layer structure), and so on. Among these methods, four-layer structure device has different resistive switching properties and best performance. Therefore, this thesis is focus on the resistive switching properties of the four-layer structure.

4.1.1 X-Ray Diffraction and Scanning Electron Microscope Analyses of the LaNiO3 Buffer Layer

In accordance with the previous studies, the Al/0.3% V-doped SZO/LNO structure device had good resistive switching properties while the preferred orientations of the SZO film are (100) and (200) [26]. At this study, the LNO electrode in four-layer structure becomes a buffer layer to deposit particular orientations or the crystallization of the upper layer, and the LNO film has similar

physical properties to the upper layer, which will improve the crystallization of the upper resistive layer. Besides, dependent on the previous studies, the LNO film has many advantages as listed in follows.

(1) It has (100) and (200) preferred orientations rather than (110), so the better electrical properties of the SZO film on the LNO film can be anticipated.

(2) The LNO film could efficiently crystallize at about 250oC, where has the advantage of the low temperature CMOS process in the future.

(3) The cost of LNO is much cheaper than other noble metals.

If the SZO film was directly deposited on Pt or other metals, such as Al, Ti, Ta, Zr, Ni, and Nb, no (100)-preferred orientation film can be obtained, and no good resistive switching behaviors can be observed [26]. Instinctively, the characteristics of the LNO buffer layer could influence the properties of the memory devices. Fig.

4-1 shows the expected crystallization of the LNO buffer layer grown on the Pt bottom electrode. It has (100) and (200) preferred orientations rather than (110). It shows that the crystallization of LNO buffer layer in four-layer structure is almost identical to that in tri-layer structure. Then, the expected crystallization of the V-doped SZO film was grown on the LNO film. The device is expected to have good resistive switching properties.

Fig. 4-2 shows surface micro-morphology of the as-deposited LNO buffer layer. The sputter-deposited LNO buffer layer is flat and uniform.

A thermal treatment was added to improve the properties of the LNO buffer layer before the deposition of doped SZO film. The crystallization orientation or better conductivity of the LNO buffer layer can be controlled by changing RTA ambience or the heating profile of the RTA temperature, and high RTA temperature process is also utilized to test the thermal stability of LNO buffer layer. From the

previous studies, the conductivity of LNO buffer layer is increased with the increasing RTA temperature, which is summarized in Table 4-1.

XRD patterns of the LNO buffer layers with various RTA temperatures are shown in Fig. 4-3. LNO (110) orientation appears for the 700 and 800oC-annealed films in O2 ambience. Figs. 4-4 and 4-5 show that the surface morphology of the LNO films in 600 and 700oC RTA, respectively. The surface morphology of the LNO annealed at 600oC is flat, but that of the 700oC-annealed film exists some precipitates at the LNO surface. By the XRD analysis and Scherrer’s formula, we consider that the precipitates are the crystallization of the (110) LNO (Fig. 4-3).

According to the XRD and SEM analyses, in order to avoid the LNO (110) orientation and precipitates to influence electrical properties of the device, RTA treatment temperature was set at 600oC in O2 ambience in this thesis. Fig. 4-6 shows the surface morphology of the as-deposited 0.3% V-doped SZO film. The surface morphology of the SZO film is uniform and without any precipitate.

4.1.2 Transmission Electron Microscope

Because the LNO buffer layer has similar physical properties with the SZO film, the interface between LNO and SZO films can not be identified by SEM.

HRTEM analysis shown in Fig. 4-7 is helpful to recognize the interface between the LNO and SZO films and understand the thickness of respective LNO and SZO films. The LNO buffer layer was sputtered at 250oC in a gas pressure of 40 mTorr with an Ar:O2 mass ratio of 24:16, and in a period of 85 min. The thickness of LNO buffer layer is about 100nm. The 0.3% V-doped SZO was sputtered at 500oC in a gas pressure of 40 mtorr with an Ar:O2 mass ratio of 24:16, and in a period of 90 min. The thickness of the 0.3% V-doped SZO film is about 45nm. Fig. 4-7 also shows the interface clearly between the LNO and SZO films. It proves no

inter-diffusion between LNO and SZO films.

4.1.3 Scanning Probe Microscope

Scanning Probe Microscopy has enabled researchers to image surfaces at the

Scanning Probe Microscopy has enabled researchers to image surfaces at the