• 沒有找到結果。

Chapter 5 Design of Low-Power CMOS Bandgap Reference Circuit

5.5 Conclusion

A low-power reference circuit with MOSFETs operated in the weak inversion region is described. The reference output voltage is around 600 mV, and the minimum supply voltage is 1.5V. This circuit is easy to design, and suitable for use in low-voltage, low-power applications.

Chapter 6

Conclusions

6.1 Conclusion

Among many types of CMOS ADC architectures, the pipelined ADC is the most popular approach for high speed and medium accuracy. This popularity is due to the fact that pipelined ADC can achieve high sampling rate as flash ADCs as a result of an S/H circuit in each stage of the pipeline. Also, the pipelined ADC require less silicon area, dissipate less power, and the voltages of the comparators in the sub-converter need to resolve are less stringent than the flash equivalents. In this research, the 10-bit、80 MS/s pipelined ADC has been designed and simulated by the program of Hspice using the standard tsmc 0.18µm CMOS process.

The thesis also has designed the low-power CMOS bandgap reference using the tsmc 0.18µm CMOS process. The bandgap reference uses the MOSFETs operated in the weak inversion to generate the proportional to absolute temperature current instead of using BJTs in CMOS process. Thus the power and silicon are could be reduced. The simulated results show that the temperature coefficient is 37.8ppm/℃

(2.28mV) when the output voltage is 600.8mV at supply voltage of 1.5V.

6.2 Future Work

In order to achieve the higher performance of the pipelined ADC, designing an op-amp with both larger signal swing and larger bandwidth for high dynamic range

and high speed respectively will be a challenging. If we continue to research on the same topic, we will try to use the correlated double-sampling architecture to get the higher operating speed. Also, using correlated double-sampling architecture could reduce gain errors and gain sensitivities. In the other hand, low voltage low-power circuit is the popular research for the future work. Thus scaling down the supply voltage without degrading the performance of the op-amp will be a difficult challenging. Thus, the design of high speed and high resolution of ultra low voltage pipelined ADCs will be the most important area for the future work.

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