Chapter 3 Investigation of the Characteristics of 3D-Stacked Single Grain Boundary
3.2 Electrical Characteristics of 3D-SSGB-TFTs Fabricated by Elevated Channel
3.2.3 Electrical Characteristics of 3D-SSGB-TFTs for the CMOS Applications
3.2.3.2 Double-Gate Effect on 3D-SSGB-TFTs
In advanced CMOS applications, the output current of devices would significantly affect the performance of the whole IC especially for the analog design. Take the CMOS current mirror for example, the dependency of the output current (Iout) on VDS would strongly affect the current mirror configurations [3.5]. Therefore, symmetric output characteristics of P-type and N-type devices in the CMOS are definitely required. In order to improve the symmetry of the output characteristics of P-type and N-type devices in the CMOS, we proposed the 3D-SSGB-TFTs with the compact stacked structure as mentioned in section 1.4. When the 3D-SSGB-TFTs were under the CMOS operation, the bottom layer device would be driven by two gates, including the gates of the bottom layer device and the
top layer device. On the other hand, the top layer device of 3D-SSGB-TFTs would be driven by only one gate during the CMOS operation. Therefore, the different gate-driving modes for 3D-SSGB-TFTs under the CMOS operation might be a simple approach to improve the symmetry of the output characteristics of P-type and N-type devices in 3D-SSGB-TFTs. Fig. 3-26~Fig. 3-29 showed the electrical characteristics of the bottom layer devices of 3D-SSGB-TFTs driven by two modes, the single bottom-gate mode and the double common-gate mode. It was found that the performance of bottom layer devices would be strongly enhanced when the thickness of separation oxide layer was the same as the gate oxide layer (ie. 1000Å). The enhancement of the bottom layer devices of 3D-SSGB-TFTs should be resulted from the double gate structure formed by the proper thickness of separation oxide layer, which had been reported that would enhance the electrical characteristics rather than the single gate structure [3.6]-[3.8]. When the thickness of separation oxide layer was the same as the gate oxide layer, the mobility, the subthreshold swing, the threshold voltage, and the on/off current ratio for the N-type/P-type SGB-TFTs of 3D-SSGB-TFTs driven by the double common-gate mode were about 609/212 cm2/V-s, 0.362/0.384 V/decade, -0.83/-2.07 V, and 1.87×108/1.07×107. On the other hand, the performances of bottom layer devices driven by the two modes would be almost the same when the separation oxide layer was much thicker than the gate oxide layer (ie. 5000Å). Detailed characteristics of the bottom layer devices of 3D-SSGB-TFTs driven by the two modes were summarized in Table 3-5 and Table 3-6. Fig. 3-30~Fig. 3-33 displayed the electrical characteristics of the top layer devices and the bottom layer devices of 3D-SSGB-TFTs during the CMOS operation with different structure conditions. It was found that when the P-type SGB-TFTs were fabricated in the bottom device layer of 3D-SSGB-TFTs and the thickness of separation oxide layer was the same as the gate oxide layer, the performance of P-type SGB-TFTs would be greatly enhanced due to the double-gate effect resulted from proper thickness of the separation oxide layer and common-gate driving during CMOS operation. As a result, the symmetry of output characteristics of P-type and N-type devices of the 3D-SSGB-TFTs as a 3D-stacked CMOS was also improved when the P-type SGB-TFTs were fabricated in the bottom device layer of 3D-SSGB-TFTs and the thickness of separation oxide layer was the same as the gate oxide layer. With the proper device structure as mentioned above, the benefits including small device area, high packing density, and better symmetric of output characteristics were successfully achieved at the same time by using the 3D-SSGB-TFT technology.
Chapter 4
Summary and Conclusions
In this thesis, we had demonstrated the high performance 3D-stacked single grain boundary thin-film transistors (3D-SSGB-TFTs) fabricated by the elevated channel method with excimer laser irradiation. The results and discussions were summarized in this chapter.
High-performance SGB-TFTs with equivalent field-effect mobility exceeding 300 cm2/V-s for the n-channel devices and 140 cm2/V-s for the p-channel devices have been fabricated, and wide process window was obtained as well. The SGB-TFTs fabricated by the elevated channel method in different structure conditions of 3D-SSGB-TFTs not only exhibited better electrical characteristics than the conventional SPC TFTs but also demonstrated excellent uniformity. The standard deviation of mobility was lower than 12 cm2/V-s for the n-channel devices and 5 cm2/V-s for the p-channel devices. The standard deviation of subthreshold swing was lower than 0.1 V/decade for the n-channel devices and 0.2 V/decade for the p-channel devices. The standard deviation of threshold voltage was lower than 0.3 V for the n-channel devices and 0.6 V for the p-channel devices. As a CMOS inverter, the 3D-SSGB-TFTs showed abrupt voltage transfer characteristics within the input voltage range of 0.2V at both high and low supply voltage, which is the most fundamental function requirement of the CMOS applications. Since symmetric electrical characteristics
are also required for advanced CMOS applications such as analog design, the electrical characteristics of 3D-SSGB-TFTs in different structure conditions were studied. The double-gate effect for enhancing the performance of bottom layer devices of 3D-SSGB-TFTs was observed when the thickness of separation oxide was the same as or less than that of the gate oxide. Therefore, with proper structure arrangements, including to make P-type devices fabricated in the bottom device layer and to make the thickness of separation oxide the same as that of gate oxide, more symmetric electrical characteristics of P-type and N-type devices of 3D-SSGB-TFTs as a 3D-stacked CMOS was easily and successfully demonstrated, as opposed to other structure arrangements.
To sum up, the elevated channel method was attractive to fabricate the high performance 3D-SSGB-TFTs with simple layer-by-layer process. The SGB-TFTs of 3D-SSGB-TFTs fabricated by the elevated channel method exhibited high performance and good uniformity, whether for top layer devices or bottom layer devices. Furthermore, with proper structure arrangements, the 3D-SSGB-TFTs as a 3D-stacked CMOS could not only show good voltage transfer characteristics but also more symmetric electrical characteristics of P-type and N-type devices. As a result, the 3D-SSGB-TFT technology is a very promising approach to the future 3D-IC applications.
Layer / Sep.ox.
Table 3-1 Electrical characteristics of n-channel SGB-TFTs in different layers with different separation oxide thicknesses. The length of channel was 1μm. The number of laser
shots was 20 (ie. 95% overlapping).
Layer / Sep.ox.
Table 3-2 Electrical characteristics of p-channel SGB-TFTs in different layers with different separation oxide thicknesses. The length of channel was 1μm. The number of laser
shots was 20 (ie. 95% overlapping).
W=L=1μm Mobility* (cm2/V-s) SS (V/decade) Vth (V)
Layer / Sep.ox. AVG STDEV AVG STDEV AVG STDEV
Bottom / 1000Å 312 10.4 0.527 0.081 -0.74 0.27 Bottom / 5000Å 313 11.5 0.529 0.081 -0.73 0.26 Top / 1000Å 312 11.4 0.518 0.081 -0.75 0.26 Top / 5000Å 313 10.4 0.518 0.083 -0.75 0.25
Table 3-3 Electrical characteristics of twenty measured n-channel SGB-TFTs in different layers with different separation oxide thicknesses. The number of laser shots was
20 (ie. 95% overlapping).
W=L=1μm Mobility* (cm2/V-s) SS (V/decade) Vth (V)
Layer / Sep.ox. AVG STDEV AVG STDEV AVG STDEV
Bottom / 1000Å 140 3.9 0.638 0.163 -3 0.59
Bottom / 5000Å 140 3.5 0.635 0.164 -3 0.58
Top / 1000Å 139 3.7 0.599 0.152 -2.99 0.5
Top / 5000Å 138 4.9 0.602 0.165 -2.95 0.49
Table 3-4 Electrical characteristics of twenty measured p-channel SGB-TFTs in different layers with different separation oxide thicknesses. The number of laser shots was
20 (ie. 95% overlapping).
Mode / Sep.ox.
Table 3-5 Electrical characteristics of bottom n-channel SGB-TFTs with different separation oxide thicknesses drived by bottom-gate (BG) mode and double-gate (DG) mode,
respectively. The length of channel was 1μm. The number of laser shots was 20 (ie. 95%
overlapping).
Table 3-6 Electrical characteristics of bottom p-channel SGB-TFTs with different separation oxide thicknesses drived by bottom-gate (BG) mode and double-gate (DG) mode,
respectively. The length of channel was 1μm. The number of laser shots was 20 (ie. 95%
overlapping).
Fig. 1-1. The 3D-IC technology roadmap.
Fig. 1-2. The SOP technology roadmap.
Fig. 2-1. Stacked ICs with (a) active devices and interconnects fabricated before forming multiple stacking layers; and (b) all active devices stacked on top
of each other before forming the interconnects.
Fig. 2-2. Layout of (a) conventional 2D CMOS inverter; (b) 3D-stacked CMOS inverter with a single-gate p-channel device and a single-gate n-channel device; and (c) 3D-stacked CMOS inverter with a double-gate p-channel device and a single-gate n-channel
device.
Fig. 2-3. The schematic illustration of the excimer laser crystallization mechanism of a-Si thin films in (a) complete-melting regime; (b) partial-melting regime; and (c)
near-complete-melting regime.
Fig. 2-4. The SEM graph of poly-Si by conventional ELC process in SLG regime.
Fig. 2-5. The schematic illustration of the mechanism of the elevated channel method realized by using bottom-gate structure of a-Si thin film.
Fig. 2-6. Process flows of preparing samples of the bottom layer for material characteristics by the elevated channel method.
Fig. 2-7. Process flows of preparing samples of the top layer for material
characteristics by the elevated channel method.
Fig. 2-8. The schematic illustration of the excimer laser system.
Fig. 2-9. SEM graphs of excimer laser crystallized polycrystalline silicon in the bottom layer by elevated channel method. The channel length was 1.2μm. The poly gate thickness
was 1000Å and the gate dielectric thickness was 1000Å. The laser energy density was (a) 420 (b) 460 (c) 500 mJ/cm2.
Fig. 2-10. SEM graphs of excimer laser crystallized polycrystalline silicon in the bottom layer by elevated channel method. The channel length was 2μm. The poly gate thickness was 1000Å and the gate dielectric thickness was 1000Å. The laser energy density
was (a) 440 (b) 460 (c) 500 mJ/cm2.
Fig. 2-11. SEM graphs of excimer laser crystallized polycrystalline silicon in the bottom layer by elevated channel method. The laser energy density was 460 mJ/cm2. The poly gate thickness was 1000Å and the gate dielectric thickness was 1000Å. The channel
length was (a) 1 (b) 1.2 (c) 1.5 μm.
Fig. 2-12. The SEM graph of poly-Si thin films with solid phase crystallization. The poly gate thickness was 1000Å and the gate dielectric thickness was 1000Å. The channel
length was 1.5μm.
Fig. 2-13. SEM graphs of excimer laser crystallized polycrystalline silicon in the top layer with a 5000Å-thick separation oxide layer by elevated channel method. The channel length was 1.2μm. The poly gate thickness was 1000Å and the gate dielectric thickness was
1000Å. The laser energy density was (a) 420 (b) 460 (c) 500 mJ/cm2.
Fig. 2-14. SEM graphs of excimer laser crystallized polycrystalline silicon in the top layer with a 5000Å-thick separation oxide layer by elevated channel method. The laser energy density was 460 mJ/cm2. The poly gate thickness was 1000Å and the gate dielectric
thickness was 1000Å. The channel length was (a) 1 (b) 1.2 (c) 1.5 μm.
Fig. 2-15. SEM graphs of excimer laser crystallized polycrystalline silicon in the top layer with a 1000Å-thick separation oxide layer by elevated channel method. The channel length was 1.2μm. The poly gate thickness was 1000Å and the gate dielectric thickness was
1000Å. The laser energy density was (a) 420 (b) 460 (c) 500 mJ/cm2.
Fig. 2-16. SEM graphs of excimer laser crystallized polycrystalline silicon in the top layer with a 1000Å-thick separation oxide layer by elevated channel method. The laser energy density was 460 mJ/cm2. The poly gate thickness was 1000Å and the gate dielectric
thickness was 1000Å. The channel length was (a) 1 (b) 1.2 (c) 1.5 μm.
Fig. 2-17. The cross-sectional SEM image of the 3D-SSGB-TFTs.
Fig. 3-1. Process flows for fabrication of 3D-SSGB-TFTs (I)
Fig. 3-1. Process flows for fabrication of 3D-SSGB-TFTs (II)
(a)
(b)
Fig. 3-2. Transfer characteristic of bottom n-channel SGB-TFTs crystallized using elevated channel method. The number of laser shots was 20 (ie. 95% overlapping). The
thickness of separation oxide was (a) 1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-3. Transfer characteristic of top n-channel SGB-TFTs crystallized using elevated channel method. The number of laser shots was 20 (ie. 95% overlapping). The thickness of
separation oxide was (a) 1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-4. Transfer characteristic of bottom p-channel SGB-TFTs crystallized using elevated channel method. The number of laser shots was 20 (ie. 95% overlapping). The
thickness of separation oxide was (a) 1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-5. Transfer characteristic of top p-channel SGB-TFTs crystallized using elevated channel method. The number of laser shots was 20 (ie. 95% overlapping). The thickness of
separation oxide was (a) 1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-6. Output characteristic of bottom n-channel SGB-TFTs crystallized using elevated channel method. The number of laser shots was 20 (ie. 95% overlapping). The
thickness of separation oxide was (a) 1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-7. Output characteristic of top n-channel SGB-TFTs crystallized using elevated channel method. The number of laser shots was 20 (ie. 95% overlapping). The thickness of
separation oxide was (a) 1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-8. Output characteristic of bottom p-channel SGB-TFTs crystallized using elevated channel method. The number of laser shots was 20 (ie. 95% overlapping). The
thickness of separation oxide was (a) 1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-9. Output characteristic of top p-channel SGB-TFTs crystallized using elevated channel method. The number of laser shots was 20 (ie. 95% overlapping). The thickness of
separation oxide was (a) 1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-10. Dependence of field-effect-mobility on the device dimension for 3D-SSGB-TFTs with the structure of top p-channel and bottom n-channel. The field-effect-mobility was evaluated at Vds=0.1V. The thickness of separation oxide was (a)
1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-11. Dependence of field-effect-mobility on the device dimension for 3D-SSGB-TFTs with the structure of top n-channel and bottom p-channel. The field-effect-mobility was evaluated at Vds=0.1V. The thickness of separation oxide was (a)
1000Å and (b) 5000Å.
(a)
(b)
Fig. 3-12. Dependence of field-effect-mobility on applied laser energy density for 3D-SSGB-TFTs with the structure of top p-channel and bottom n-channel. The field-effect-mobility was evaluated at Vds=0.1V. The thickness of separation oxide was (a)
1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-13. Dependence of field-effect-mobility on applied laser energy density for 3D-SSGB-TFTs with the structure of top n-channel and bottom p-channel. The field-effect-mobility was evaluated at Vds=0.1V. The thickness of separation oxide was (a)
1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-14. Dependence of subthreshold swing on applied laser energy density for 3D-SSGB-TFTs with the structure of top p-channel and bottom n-channel. The subthreshold
swing was evaluated at Vds=0.1V. The thickness of separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-15. Dependence of subthreshold swing on applied laser energy density for 3D-SSGB-TFTs with the structure of top n-channel and bottom p-channel. The subthreshold
swing was evaluated at Vds=0.1V. The thickness of separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-16. Dependence of threshold voltage on applied laser energy density for 3D-SSGB-TFTs with the structure of top p-channel and bottom n-channel. The threshold voltage was evaluated at Vds=0.1V. The thickness of separation oxide was (a) 1000Å and (b)
5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-17. Dependence of threshold voltage on applied laser energy density for 3D-SSGB-TFTs with the structure of top n-channel and bottom p-channel. The threshold voltage was evaluated at Vds=0.1V. The thickness of separation oxide was (a) 1000Å and (b)
5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-18. Statistics and uniformity of field-effect-mobility. Twenty top p-channel SGB-TFTs and twenty bottom n-channel SGB-TFTs in the same 3D-SSGB-TFT structure
crystallized with elevated channel method were measured. The thickness of separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-19. Statistics and uniformity of field-effect-mobility. Twenty top n-channel SGB-TFTs and twenty bottom p-channel SGB-TFTs in the same 3D-SSGB-TFT structure
crystallized with elevated channel method were measured. The thickness of separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-20. Statistics and uniformity of subthreshold swing. Twenty top p-channel SGB-TFTs and twenty bottom n-channel SGB-TFTs in the same 3D-SSGB-TFT structure
crystallized with elevated channel method were measured. The thickness of separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-21. Statistics and uniformity of subthreshold swing. Twenty top n-channel SGB-TFTs and twenty bottom p-channel SGB-TFTs in the same 3D-SSGB-TFT structure
crystallized with elevated channel method were measured. The thickness of separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-22. Statistics and uniformity of threshold voltage. Twenty top p-channel SGB-TFTs and twenty bottom n-channel SGB-TFTs in the same 3D-SSGB-TFT structure
crystallized with elevated channel method were measured. The thickness of separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-23. Statistics and uniformity of threshold voltage. Twenty top n-channel SGB-TFTs and twenty bottom p-channel SGB-TFTs in the same 3D-SSGB-TFT structure
crystallized with elevated channel method were measured. The thickness of separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-24. Voltage transfer characteristics of the 3D-SSGB-TFTs as a 3D-stacked CMOS inverter with the structure of top p-channel and bottom n-channel. The thickness of
separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-25. Voltage transfer characteristics of the 3D-SSGB-TFTs as a 3D-stacked CMOS inverter with the structure of top n-channel and bottom p-channel. The thickness of
separation oxide was (a) 1000Å and (b) 5000Å.
L=W=1μm
L=W=1μm
(a)
(b)
Fig. 3-26. (a) Transfer and (b) output characteristics of the bottom n-channel SGB-TFTs drived by bottom-gate mode and double-gate mode, respectively. The thickness
of separation oxide was 5000Å.
(a)
(b)
Fig. 3-27. (a) Transfer and (b) output characteristics of the bottom n-channel SGB-TFTs drived by bottom-gate mode and double-gate mode, respectively. The thickness
of separation oxide was 1000Å.
(a)
(b)
Fig. 3-28. (a) Transfer and (b) output characteristics of the bottom p-channel SGB-TFTs drived by bottom-gate mode and double-gate mode, respectively. The thickness
of separation oxide was 5000Å.
(a)
(b)
Fig. 3-29. (a) Transfer and (b) output characteristics of the bottom p-channel SGB-TFTs drived by bottom-gate mode and double-gate mode, respectively. The thickness
of separation oxide was 1000Å.
(a)
(b)
Fig. 3-30. (a) Transfer and (b) output characteristics of the 3D-SSGB-TFTs with the structure of top p-channel and bottom n-channel during the common-gate operation. The
thickness of separation oxide was 5000Å.
(a)
(b)
Fig. 3-31. (a) Transfer and (b) output characteristics of the 3D-SSGB-TFTs with the structure of top p-channel and bottom n-channel during the common-gate operation. The
thickness of separation oxide was 1000Å.
(a)
(b)
Fig. 3-32. (a) Transfer and (b) output characteristics of the 3D-SSGB-TFTs with the structure of top n-channel and bottom p-channel during the common-gate operation. The
thickness of separation oxide was 5000Å.
(a)
(b)
Fig. 3-33. (a) Transfer and (b) output characteristics of the 3D-SSGB-TFTs with the structure of top n-channel and bottom p-channel during the common-gate operation. The
thickness of separation oxide was 1000Å.
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