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Chapter 2 Overview of Low Power Design and Leakage Control

3.1 Positive-Pumping Circuits

Positive charge pumps are circuits that can pump charges upward to produce voltages higher than the common supply voltage. Those circuits are widely used in non-volatile memories such as EEPROM and Flash memories [3.9]. This section introduces the basic operations of positive-pumping circuits and some advanced positive charge pumps.

3.1.1 Dickson Charge Pump

Most charge pumps are based on the circuit proposed by Dickson [3.10], and the circuit is called “Dickson charge pump”.

3.1.1.1 Overview of Dickson Charge Pump

Fig. 3.3 shows the Dickson charge pump and the MOS transistors act as diodes, so the charges can only be pushed in one way. The circuit is composed of diode-connected MOS transistors and pumping capacitors, Cp. Generally the pumping capacitors can be replaced with MOS capacitors. The two pumping signals, clk and

clk are out of phase and their peak-to-peak swings are both VDD.

Fig. 3.3 Dickson charge pump.

3.1.1.2 Operation of Dickson Charge Pump

With the pumping capacitors, the two clocks push the charged nodes upward through the transistors. Each time when the clock signal goes from low to high, the voltage difference (denoted as ΔV) at internal node can be expressed as [3.11]

0

where Cs is the parasitic capacitance at each node, f is the pumping frequency, and I0 is the output current loading. When clk goes from low to high andclkgoes from high to low, the voltage at node 1 is pumped to V1 +ΔV, and the voltage at node 2 is settled to V2, where V1 and V2 are defined as the steady-state lower voltage at node 1 and node 2, respectively. The voltage pumping gain for second pumping stage is defined as the difference between V2 and V1,

2 1 tn

VV = ∆ −V V 2 (3.2)

where Vtn2 is the threshold voltage of the second transistor. Therefore, the necessary condition for the circuit to function is thatΔV must greater than the threshold voltage.

For an ideal charge pump, the output voltage goes toward [3.12]

( )

out DD t DD

V = VVN +V (3.3)

where N is the number of stages.

3.1.1.3 Limitation of Dickson Charge Pump

From (3.3), it’s obvious that the voltage gain per stage of Dickson charge pump suffers from the threshold voltage losses. Unfortunately, the threshold voltage increases due to body effect, especially at the high-voltage nodes near the output.

Therefore, the output voltage of Dickson charge pump cannot be a linear function of the number of stages. Moreover, the pumping efficiency degrades as the number of stages increases. Fig. 3.4 depicts the operation behavior abstractly.

Fig. 3.4 Abstract behavior of Dickson charge pump.

3.1.2 Improvement of Voltage Gain

Due to the threshold voltage loss and the influence of body effect, a large number of researches attempt to alleviate this problem. In order to diminish the threshold voltage loss of conventional charge pump, one replaces most of the NMOSFET’s with PMOSFET’s [3.13]. This circuit achieves high efficiency and pumping speed, but some bootstrapped clock generators are needed. Moreover, it requires four pumping signals so that increases the complexity. On the other hand, using floating-well to eliminate the body effect is proposed [3.14]. However, the substrate currents generated may still reduce the efficiency.

3.1.3 Charge Pump Without Body Effect

From the discussions in the sections above, the main obstacles of charge pumps are the influence of body effect, and the operations under low supply voltage. One proposed a scheme that uses two auxiliary MOSFET’s to control the body bias [3.12].

As in Fig. 3.5, each charge transfer block is composed of three PMOS transistors, where MT is the charge-transfer transistor, and MS and MD are the two auxiliary transistors. When MT is ON, the charges are transferred through it. Meanwhile, MS is ON and MD is OFF, the body and source of MT are connected through MS. on the other hand, when MT is OFF, thus MS is OFF and MD is ON. In this condition the source and the body of MT are still connected through MD.

In summary, the two auxiliary transistors supply two paths to join the source and the body of MD, one for clk is high and the other for clk is low. In this scheme since

the charge-transfer transistor has zero source-body voltage, therefore it suffers no body effect and achieves higher voltage gain.

Fig. 3.5 The charge pump without body effect.

3.1.4 Charge Pump for Low-Voltage Operation

As discussed before, one major limitation of charge pump is the functional ability under low supply voltage. Fig. 3.6 shows a charge pump using dynamic charge transfer switch and backward control [3.11]. This circuit is suitable for operating under low supply voltages.

In this scheme the single-stage voltage pumping gain is

2 2 1

V V

G = G = VV = ∆ (3.4) V

When ψ1 is high andψ2 is low, both the voltages at node 1 and node 2 are V2, and the voltage at node 3 is 2 . In order to function well, the following expression must be satisfied

V

2∆V > Vtp and 2∆V > V Vtn( 2) (3.5)

On the other hand, whenψ1 is low andψ2 is high, the voltage at node 1 is V1, both the voltages at node 2 and node 3 are 2∆V. It must satisfies

2∆V > V Vtn( 1) (3.6)

In comparison with expressions (3.2), this circuit can achieve the required conditions more easily under low supply voltage.

Fig. 3.6 A four-stage charge pump.

3.1.5 Voltage Doubler

A large amount of voltage multipliers are based on Dickson charge pump, as discussed in the sections above. However, a high voltage can also be achieved by cascading several voltage doublers [3.15]. A voltage doubler can generate twice the magnitude of input voltage. Fig. 3.7 shows the popular cross-coupled structure voltage doubler proposed in [3.16]. This circuit needs a series switch to output the doubled DC voltage.

A scheme uses two charge pump blocks, one for the supply and the other to bias the body of the switch, as shown in Fig. 3.8 [3.17]. Since there are no junction bias between the body and the output, thus no substrate current exists. The disadvantages of Fig. 3.8 are that it requires two equivalent blocks and the body of P2 is still unbiased.

To solve these problems, another design uses a dual series switch and the principle of bulk switching, as depicted in Fig. 3.9 [3.18]. M3 and M4 are series switches, and M5 and M6 switch to the highest voltage. For M3 and M4, their body and the output node and the chip substrate compose of vertical PnP bipolar transistor.

Since M5 and M6 switch the bodies of M3 and M4 to the highest voltage, the circuit is latch-up immune.

Fig. 3.7 Cross-coupled voltage doubler.

Fig. 3.8 Charge pump with PMOS bias.

Fig. 3.9 Voltage doubler with series switches.