8 Conclusions 71
8.2 Recommendations for Future Work
The determination of transistor size is constrained by the current density of internal inductors.
The optimization of MOS size and inductor Q-value could help to enhance the circuit performance such as output power and efficiency. In addition, it should be feasible to improve the efficiency at high power level as the amplifier was compensated. Moreover, the characteristic of AM-AM and AM-PM curves could be optimized with the elimination of process variations.
8 CONCLUSIONS
Appendix A
Analysis of Ideal Class E PA with Finite DC-Feed Inductor
One of the first attempts was made to study finite dc-feed inductor in [60]. Some other related studies are included in [68]-[69]. All these researches have recommended that procedure of obtaining final circuit component values is either long, complex and iterative, and is difficult to provide a direct insight into the circuit design, or is too simplistic and not exactly.
Practically, the design of the Class E PA with finite dc-feed inductor is a transcendent problem from the mathematical point of view. Therefore, the designer needs to iteratively figure out the systm of equations for a certain set of input parameters to gain the final circuit component values. If any of the input parameters is changed, the calculation must be repeated from the beginning. Thus, it is a tedious and extremely impractical procedure. In [70] an approach has been proposed to alleviate the problem. The system of transcendent equations is numerically solved for a certain number of discrete points of an input parameter, and the obtained results are interpolated by the Lagrange polynomial. The polynomial interpolation provides adequate accuracy and can be used for any value of the input parameter on that segment, if it performs with enough density of points on the segment of interest. In other words, it obtains clear and directly usable design equations for the Class E power amplifier.
The well-known design equations have been many times derived in the literature, and they are given by
out
where VDD and Pout are the supply voltage and the desired output power, respectively, and the load resistance R, the shunt susceptance B and the excessive reactance X. The equations are based on the Lck is an RF choke with large inductance. But in case of the Class E amplifier with finite dc-feed inductor, the equations don’t hold anymore. At the beginning of the design procedure, the designer could choose a value of inductance for the finite dc-feed inductor.
Therefore, the reactance of the inductor is known and can be given by
ck
dc
L
X = ω
(A.4)On the other hand, an ideal Class E amplifier provides a 100% dc-to-RF efficiency.
Therefore, the dc resistance that the circuit presents to the supply source is also known from the PA specifications, and is simply given as
out DD
dc
P
R V
=
2 (A.5)Depending on the value of Xdc/Rdc, the circuit parameters R, B and X will change their value from the given equations for the RF choke based Class E power amplifier. The three parameters have calculated by numerically solving the transcendent circuit equations for a number of different values of Xdc/Rdc. The results of these calculations are plotted in Figure A.1. In Figure A.1, the variations of the elements R, B and X is plotted as a function of Xdc/Rdc. However, the plots are not continuous functions and they are discrete character.
In order to obtain explicit design equations for the Class E PA component values, the Lagrange polynomial interpolation of the numerically obtained results is used. Finally, the
new equations for Class E power amplifier with finite dc-feed inductor are presented in the
Figure A.1 Effect of the finite dc-feed inductance on the Class E circuit elements.
Design equations (A.6)-(A.11) are explicit, relatively simple and can be used for any value of z=Xdc/Rdc within the corresponding segment. But outside these segments, they are not valid.
The utilization of a finite dc-feed inductor has several major benefits. First, it results in a higher load resistance in comparison to the case of RF choke. This effect makes the design of low-loss matching networks easier, since the designer typically needs to transform a standard 50 Ohm termination to the load resistance of several Ohms. Furthermore, the excessive inductance X is also lower, and the shunt susceptance B is increased. This increase of the shunt susceptance is particularly useful, as it extends the maximum frequency limitation of the device imposed by its output capacitance.
Appendix B
Common Source Class E PA with Stacked Resistance
In this work, we present that when the cascode transistor is operated as a resistance alike, the AM-AM and AM-PM distortion is improved. Therefore, of the Class E amplifier the cascode transistor replaced with a resistance has been shown in Figure B.1. With the same operating conditions the simulation results of the common source Class E with stacked resistance are obtained. The simulated result compared with that of the cascode Class E with compensation is shown in Figure B.2. It demonstrates that both of two amplifiers have good agreement on the AM-AM and AM-PM characteristic. However, the resistance captures more voltage headrooms so that the output power of the amplifier is degraded as shown in Figure B.3.
There has a 3-dB reduction to the output power and the power gain of the amplifier. Even having smaller current consumptions as shown in Figure B.4, the efficiency is less than that of the cascode Class E owing to the severely degraded output power.
Figure B.1 Common source Class E with stacked resistance.
Figure B.2 Comparison of AM-AM and AM-PM distortion.
Figure B.3 Comparison of power gain and output power.
Figure B.4 Comparison of drain efficiency and dc current.
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自 傳 - Vita
鄒 文 安
Wen-An Tsou
台中市南屯區春社里中台路 61-6 號
+886-4-23891350 [email protected]
學 歷
Educations
國立交通大學 電子研究所 博士班 2010 Ph.D., Institute of Electronics, National Chiao Tung University Hsinchu, TW
國立台灣科技大學 電子研究所 碩士班 2002 M.S., Inst. of Electronic Engineering, NTUST Taipei, TW
私立中原大學電機工程學系 2000 B.S., Dept. of Electrical Engineering, Chung Yuan Christian University Chungli, TW
經 歷
Experiences
研究助理 國立交通大學 2002-2004 Research Assistant, National Chiao Tung University Hsinchu, TW
著作目錄 - Publication List
1. Journal Paper
[1] Wen-An Tsou, Wen-Shen Wuen, Tzu-Yi Yang and Kuei-Ann Wen, “Analysis and Compensation of the AM-AM and AM-PM Distortion for CMOS Cascode Class-E Power Amplifier,” International Journal of Microwave Science and Technology, March 2010.
[2] Wen-An Tsou, Wen-Shen Wuen and Kuei-Ann Wen, “A Design of CMOS Class-E Power Amplifier with Phase Correction for Envelope Elimination and Restoration (EER) / Polar Systems,” IEICE Trans. Electronics, vol. E93-C, No. 1, pp. 128-131, Jan. 2010.
[3] Cheng-Yu Hsieh, Che-Sheng Chen, Wen-An Tsou, Yi-Ting Yeh, Kuei-Ann Wen and Long-Sheng Fan, “A Flexible Mixed-Signal/RF CMOS Technology for Implantable Electronics Applications,” has been accepted by Journal of Micromechanics and MicroEngineering.
2. Conference Paper
[1] Chung-Min Lai, Wen-An Tsou, Mei-Fen Chou and Kuei-Ann Wen, “Tri-band CMOS Class-E Power Amplifier Design with Phase Compensations for Polar Systems,” has been accepted by IEEE 23th Canadian Conference on Electrical and Computer Engineering, 2010.
[2] Chung-Min Lai, Tzu-Yuan Chao, Wen-An Tsou, Mei-Fen Chou, Yu-Ting Cheng and Kuei-Ann Wen, “A Polar Modulated Tri-band Power Amplifier Using Flexible Substrate Based MEMS Switches,” been accepted by EuMW 2010.
“A Broadband Low Noise Amplifier with ± 0.09dB Noise Flatness Using Active Input Matching,” been accepted by IEEE 7th Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology, 2010.
[4] Wen-An Tsou, Che-Sheng Chen, Chun-Kai Wang and Kuei-Ann Wen, “A Design Methodology for Efficiency Enhancement of CMOS Class-E Power Amplifiers,”
International Conference on Microwave Technology and Computational Electromagnetics, pp. 253-256, Beijing, China, Nov. 3-6, 2009.
[5] Wen-An Tsou, Wen-Shen Wuen, and Kuei-Ann Wen, “A Design of 2.6 GHz Auto-Biasing Cascode Class-E PA with Vdd/AM and Vdd/PM Compensations in EER System,” Pacific-Asia Conference on Circuits, Communications and Systems, pp. 47-50, Chengdu, China, May 16-17, 2009.
[6] Wen-An Tsou, Wen-Shen Wuen and Kuei-Ann Wen, “A Polar Modulated CMOS Class-E Amplifier with a Class-F Driver Stage,” 3th International Conference on Intelligent Information Technology Application, pp. 658-661, Nanchang, China, Nov.
21-22, 2009.
[7] Wen-An Tsou, Che-Sheng Chen, Chun-Kai Wang, Kevin C. J. Chen, Svu-Hsien Wu and Kuei-Ann Wen, “Analysis for Efficiency Enhancement of CMOS Class-E Power
[7] Wen-An Tsou, Che-Sheng Chen, Chun-Kai Wang, Kevin C. J. Chen, Svu-Hsien Wu and Kuei-Ann Wen, “Analysis for Efficiency Enhancement of CMOS Class-E Power