Results and Discussion

The HEMTs in the switch fabricated using Cu metallization showed similar DC characteristics in comparison with those in the switch fabricated with traditional Au metallization. As shown in Figs. 5.1 and 5.2, a drain saturation current density of 160 mA/mm and an extrinsic transconductance of 140 mS/mm at VDS = 3 V were measured both for the Cu- and the Au-metallized switches. The devices had a threshold voltage (Vth) of −1.5 V. The insertion loss, return loss, and isolation characteristics of the SPDT switches with Cu metallization and with Au metallization measured at 2.5 GHz are shown in Figs. 5.3 and 5.4, respectively. The Cu-metallized switch had an insertion loss of 0.33 dB, a return loss of 23.3 dB, and an isolation of 36.7 dB (control voltage = +3/0 V; input power = 0 dBm) at 2.5 GHz. There is very little difference in the RF characteristics for the switches with Cu interconnects and with Au interconnects. The small differences of these two switches were due to the nonuniformity of the wet chemical etch in the gate recess process. The nonuniformity of the wet chemical etch could cause the fluctuation of the on-state resistance and off-state capacitance of the transistors which dominate insertion loss and isolation [13]. It appears from these data that Cu metallization does not affect the SPDT HEMT switch performance.

In order to evaluate the temperature-dependent effect on the DC and RF

characteristics of the Cu-metallized switches, the switches were evaluated at different temperatures. The DC characteristics of the device were measured at different temperatures from 300 °K to 500 °K. Fig. 5.5 shows the current–voltage (I–V) characteristics at different high-temperature ambients. The extrinsic transconductance and the drain-to-source current versus the temperature for the Cu-metallized SPDT switches were shown in Fig. 5.6. A drain saturation current density of 188 mA/mm and an extrinsic transconductance of 159 mS/mm at VDS = 3 V at 300 °K were measured for the devices. While the background carrier concentration from the substrate rises exponentially with temperature, causing the 2-DEG concentration (n2DEG) to increase in the active layer, the carrier velocity (ν) degraded seriously by the lattice scattering and carrier–carrier scattering mechanisms [35]. Therefore, IDSS0

drops at high temperatures due to the enhanced scattering mechanisms even though the carrier concentration increases at high temperatures.

Furthermore, the gate leakage current (IG) as a function of the gate-to-drain voltage (VGD) is shown in Fig. 5.7. When the gate-to-drain voltage was biased at −22 V, the gate leakage currents were 430, 450, and 490 µA/mm at the temperatures of 300 °K, 380 °K, and 500 °K, respectively. The gate leakage current increases with increasing temperature mainly due to the tunneling mechanism with thermionic emission and partly caused by the reduction of barrier height [36].

Fig. 5.8 shows that the Vth decreases with increasing temperature. The Vth of a δ-doped HEMT can be obtained by solving the 1-D Poisson’s equation (5.1) as Among the aforementioned parameters, Φ^B is the Schottky gate barrier height, ∆^{Ec is} the conduction-band discontinuity between the Schottky layer and the InGaAs

channel, dd is the distance between the gate and the n2DEG location, (dd +∆d) is the effective distance between the gate and the n2DEG location, and ε is the permittivity of the Schottky layer. Based on Eq. (5.1), when the temperature is increased, the threshold voltage decreases owing to the increase of the intrinsic channel carrier concentration n2DEG [35] and the lowering of the Schottky barrier height [38, 39].

Moreover, the decrease of Vth is partly caused by the leakage current from a semi-insulating substrate with increasing temperature [36]. Based on the relationship of Vth = Vth0 − K(T − T0), Vth is relatively temperature insensitive. The Vth shift from 300 °K to 500 °K was only −0.05 V, and δ^Vth/δT = −0.25 mV/°K as a result.

As shown in Fig. 5.8, the maximum extrinsic transconductance (gm,max) decreases with increasing temperature, which is attributed to the decrease of the intrinsic transconductance [35] and the increase of the ohmic contact resistance [40], respectively. Therefore, it can be seen that when the temperature is increased, the degradations of the device performance include the increase of the leakage current and the decrease of the breakdown voltage, threshold voltage, extrinsic transconductance, and drain saturation current density.

Furthermore, RF performances of the device were measured at high temperatures.

Fig. 5.9 shows the insertion loss and isolation versus frequency of the SPDT switches with Cu metallization from 300 °K to 380 °K. The isolation characteristics of the Cu-metallized switches degrades slightly because of the increase of the leakage current from the semi-insulating substrate with increasing temperature. For this reason, the isolation is closely related to the off-state threshold characteristics which were affected by the leakage current. Although isolation of the Cu-metallized switch was influenced by the thermal effect, it still maintained excellent isolation value higher than 35 dB.

In addition, the transistor had a small on-state resistance which resulted in low

insertion loss. However, the on-state resistances of the Cu-metallized switches measured at VGS = 0 V and VDS = 0.5 V increased gradually from 300 °K to 500 °K, as shown in Fig. 5.10. The series resistance increased as the source, drain, and gate resistances increased with increasing temperature because of the carrier scattering [41]

which would result in the reduction of the carrier transport velocity (υ) and the electron mobility (µ^e) in the channel due to the lattice scattering and carrier–carrier scattering at elevated temperatures [35]. The degradation of on-state resistance was also caused by the increase of the electrode contact resistance with temperature as verified in the previous reports [42]. This phenomenon led to the slight degradation of the insertion loss, but the increase in the insertion loss from 300 °K to 380 °K was only 0.08 dB, as shown in Fig. 5.9. Overall, for high-temperature operation, the Cu-metallized switch had an insertion loss of 0.46 dB and an isolation of 42.79 dB (control voltage = +3/0 V; input power = 0 dBm) when tested at 2.5 GHz at 380°K. It demonstrates that the Cu metallization can be applied to the interconnects of the SPDT switches at high temperatures without affecting the switch performance.

Fig. 5.11 shows the thermal effect on the switching time for the Cu-metallized switches. The switching time increases with increasing temperature primarily due to the degradation of the on-state resistance.

The power limitation of the switch operation is as explained in [17, 19, 26, 32], and the maximum input power Pmax is expressed as in Chapter 2:

0 harmonic characteristics of the Cu-metallized switches as a function of temperature

measured at 2.5 GHz are shown in Fig. 5.12. The value of the input P1dB with different temperatures remained considerably steady because the threshold voltage shift was small and did not influence the power handling capability. The characteristics of the second and third harmonics from 300 °K to 380 °K under the input power of 20 dBm are shown in Fig. 5.12. The second and third harmonics of the device remained quite stable during this temperature range. The harmonic performance is highly associated with power handling capability [20], and the input P1dB was kept at about 28.4 dBm in the current case. Fig. 5.13 shows the IIP3 versus different temperatures under several input power conditions. The IIP3 value of the device was kept at different temperatures. IIP3 of 40.5 dBm was achieved at 380 °K when the input power was 20 dBm. Based on the aforementioned results, it can be seen that the power handling capability was closely related to the threshold characteristics and that the temperature dependence of the power handling capability was not obviously from 300 °K to 380

°K.

5.3 Conclusions

An SPDT GaAs switch fabricated with Cu-metallized interconnects using Pt as the diffusion barrier has been fabricated and investigated. The Cu-metallized SPDT switch exhibited an insertion loss of 0.33 dB, a return loss of 23.3 dB, and an isolation of 36.7 dB at 2.5 GHz; the performance is comparable with the performance of the traditional Au-metallized SPDT switches. The input P1dB of 28.3 dBm at 2.5 GHz was obtained for these switches. Moreover, the temperature-dependent effects on the insertion loss, isolation, switching characteristics, and power handling capability of the Cu-metallized switches using Pt as the diffusion barrier have also been investigated. The RF characteristics of the Cu-metallized SPDT switch still remained quite stable and exhibited a low insertion loss of 0.46 dB, an excellent isolation of

42.79 dB, a high input P1dB of 28.45 dBm, and a high IIP3 of 40.5 dBm at 2.5 GHz when tested at 380 °K. These results show that the Cu metallization process using Pt as the diffusion barrier is a very reliable process and can be applied to the GaAs MMIC switch fabrication.

FIGURES

Figure 5.1 I–V characteristics of AlGaAs/InGaAs PHEMT SPDT switches for 0.5-µ^m gate length with Cu and Au metallizations.

Figure 5.2 Extrinsic transconductance and drain-to-source current versus VGS bias characteristics of the AlGaAs/InGaAs PHEMT SPDT switches for 0.5-µm gate length with Cu and Au metallizations.

Figure 5.3 Insertion loss and return loss versus frequency of the SPDT switches with Cu and Au metallizations.

Figure 5.4 Isolation versus frequency of the SPDT switches with Cu and Au metallizations.

Figure 5.5 I–V characteristics of the 0.5-µm gate length PHEMT used in the Cu-metallized switches tested at 300 °K, 380 °K, and 500 °K, respectively.

Figure 5.6 Extrinsic transconductance and drain-to-source current versus VGS bias characteristics of the 0.5-µm gate length PHEMT used in the SPDT switches when measured at 300 °K, 380 °K, and 500 °K, respectively.

Figure 5.7 Gate leakage current (IG) as a function of the gate-to-drain voltage (VGD) for the PHEMTs used in the switches when tested at 300 °K, 380 °K, and 500 °K.

Figure 5.8 Threshold voltage (Vth), drain saturation current density (Idss), and extrinsic transconductance (gm) characteristics as a function of temperature for the Cu-metallized AlGaAs/InGaAs PHEMT used in the SPDT switches.

Figure 5.9 Insertion loss and isolation versus frequency of the Cu-metallized SPDT switches measured from 300 °K to 380 °K.

Figure 5.10 On-state resistance as a function of temperature for the SPDT switches.

Figure 5.11 Switching time as a function of temperature at 2.5 GHz for the SPDT switches.

Figure 5.12 Input power 1-dB compression and second and third harmonic characteristics for the SPDT switches as a function of temperature when tested at 2.5 GHz.

Figure 5.13 Input IIP3 as a function of temperature under different input power conditions at 2.5 GHz.

Chapter 6

An Al

O

AlGaAs/InGaAs Metal-Oxide-Semiconductor PHEMT SPDT Switches with Low Control Currents for Wireless Communication

Applications

6.1 Introduction

HEMT devices are widely used for RF switch applications. GaAs PHEMT based switches, which demonstrate low gate current, have an obvious advantage over Si PIN diode based switches due to lower DC power consumption [15]. Overall, GaAs switches have lower control voltage, higher power handling capability, and higher electron mobility compared to other solid-state switches, which makes them suitable for cellular handset, WLAN, and bluetooth applications. However, III-V HEMT using Schottky gate for current modulation usually results in higher gate leakage current as compared to MOSFET using high-κ dielectric for device modulation. The use of high-κ gate dielectric for III-V HEMT can significantly suppress direct-tunneling gate current and results in considerable reduction in power consumption.

In this study, ALD Al2O3 with a high dielectric constant (8.6-10) and a high breakdown field (5~10 MV/cm) was used as high-κ material for AlGaAs/InGaAs MOS-PHEMT switches [16]. The major requirements for good RF switch are low insertion loss, high isolation, high power handling capability and low control current [17]. To achieve low control current, the methods include reducing the gate current and the size of devices. The MOS-PHEMT switches with extra high resistance between control electrode and signal path provide good isolation and results in much lower control current as compared to conventional PHEMT switches.

6.2 Results and discussion

Fig. 6.1 shows the circuit schematic of the MOS-PHEMT SPDT Tx/Rx

(transmitting/receiving) switch, and the Rg between the signal and control terminal has a value of 3 kΩ to provide extra isolation between the signal and control path. In the receiving, the VCTRL1 is biased at 3 V and the VCTRL2 at 0 V, and the RF signal is flowing from RFin to RFout1. In the transmitting, the RF signal path is from RFout2 to RFin as VCTRL1 is biased at 0 V and VCTRL2 at 3 V.

Fig. 6.2 shows the DC characteristics of the MOS-PHEMT used in the switches.

The electrical characteristics of the PHEMT with the same epi-structure but without top gate oxide are also shown in the same figure for comparison. The drain-to-source saturation current density (VDS = 2 V, VGS = 0 V) of 167 mA/mm, the on-state resistance (VDS = 0.5 V, VGS = 0 V) of 3.75 Ω^mm, the threshold voltage (Vth) of -0.98 V, and the peak extrinsic transconductance of 248 mS/mm (VDS = 2 V) were achieved for MOS-PHEMT. As shown in Fig. 6.3, the MOS-PHEMT with the Al2O3

gate dielectrics demonstrated much lower gate current as compared to the conventional PHEMT [43, 44]. Therefore, it appears that the application of Al2O3 gate dielectric for MOS-PHEMT can obtain the comparable DC performance and effectively lower the gate leakage current for the switch application [44].

As exhibited in Fig. 6.4, the MOS-PHEMT switch has an insertion loss of 0.3 dB, an isolation of 33.4 dB, and a return loss of 18.5 dB (control voltage = +3/0 V, input power = 0 dBm) at 2.5 GHz. The RF characteristics of the MOS-PHEMT switches were comparable to those of the PHEMT switches. The small deviations of the RF results from these two switches were primarily due to the insertion of Al2O3 gate dielectric.

Fig. 6.5(a) shows the MOS-PHEMT switches had comparable input P1dB of 31.4 dBm at 2.5 GHz as compared to PHEMT switches. Considering the switch power

limitation, the maximum input power is described as in Chapter 2: where Z0 is the line impedance, Vth the threshold voltage, and Vc the absolute control voltage [17, 37, 45, 46]. The input P1dB for switches with and without Al2O3 were identical because the Vth shift was very small (Vth, MOS-PHEMT = -0.98 V, PHEMT

= -1 V). Based on Eq. (2.7) above and the test results, it can be seen that the power handling capability was closely related to the threshold characteristics, and Al2O3 did not affect the power handling capability. Fig. 6.5(b) compares the control currents of MOS-PHEMT switches and PHEMT switches at different control voltage levels. For MOS-PHEMT switch, the control current remained steady around 10 µA due to the combination of the 3 kΩ gate resistor and Al2O3 gate dielectric between control electrode and signal path, while the control current of PHEMT switches only with the 3 kΩ gate resistor increased from 21 µ^{A to 51} µA when the control voltage increased from 1.5 V to 5 V. The control current of the GaAs PHEMT switch is five times higher than that of the GaAs MOS-PHEMT switch. It implies that the MOS-PHEMT switches can improve the control current due to the insertion of Al2O3, and the switches have a significant advantage of very low DC power consumption for energy saving. It’s demonstrated that the MOS-PHEMT switches with Al2O3 gate dielectric and with series/shunt layout have comparable RF performance with much lower DC power consumption compared to conventional PHEMT switches.

The MOS-PHEMT was annealed at 200 for 240 h for thermal stability test.
After thermal annealing, the devices exhibited less than 3 % difference in saturation drain current, transconductance, and threshold voltage. The result demonstrates that ALD Al2O3 and the interface are thermally quite stable.

6.3 Conclusions

The AlGaAs/InGaAs MOS-PHEMT SPDT switch with ALD Al2O3 gate dielectric was fabricated for the first time. Gate current was improved as compared to the conventional PHEMT. The RF characteristics of the MOS-PHEMT switch exhibited an insertion loss of 0.3 dB, an isolation of 33.4 dB, a return loss of 18.5 dB, and a high input P1dB of 31.4 dBm at 2.5 GHz. Much lower control current of less than 10 µA when biased from 1.5 V to 5 V was achieved. It’s evident that MOS-PHEMT can be used for MMIC switch applications with excellent RF performance and low DC power consumption.

FIGURES

Figure 6.1 The circuit schematic of the series/shunt AlGaAs/InGaAs MOS-PHEMT SPDT switch.

(a)

(b)

Figure 6.2 (a) I-V characteristics of the 0.5 µm gate length MOS-PHEMT and PHEMT. (b) Transconductance and drain-to-source current vs VGS

characteristics of the 0.5 µm gate length MOS-PHEMT and PHEMT.

Figure 6.3 Gate leakage current (IG) as a function of the gate-to-drain voltage (VGD) for the MOS-PHEMT and the PHEMT.

1.0 1.5 2.0 2.5 3.0

Figure 6.4 (a) Insertion loss, isolation, and (b) return loss of the MOS-PHEMT SPDT switch.

18 20 22 24 26 28 30 32

Chapter 7 Conclusions

In this dissertation, the electrical performances of the Cu-metallized AlGaAs/InGaAs PHEMT SPDT switches and the AlGaAs/InGaAs MOS-PHEMT SPDT switches with Al2O3 were evaluated.

It is reported for the first time the fabrication and electrical performances of the SPDT GaAs switch fabricated with Cu-metallized interconnects using Pt as the diffusion barrier. The RF characteristics of the Cu-metallized SPDT switch exhibited an insertion loss of 0.33 dB and an isolation of 36.7 dB at 2.5 GHz, the performance is comparable to the SPDT switches fabricated using conventional Au interconnects.

High power handling capability was achieved with input P1dB of 27 dBm and IIP3 of 50 dBm. Based on the high temperature reliability tests including thermal stress test (annealing at 250 for 20 h) and HTSL
environment test, no significant changes in the DC and RF characteristics were observed for the SPDT switches after these tests.

To test the operation reliability of the Cu-metallized switches, the Cu-metallized switches were subjected to an on/off stress test for 24 h at room temperature and showed very little change of the insertion loss and isolation. It is evident from these data that the Cu metallization process developed is very reliable and can be used for the GaAs MMICs fabrication.

In order to evaluate the temperature-dependent impact on DC and RF characteristics of the Cu-metallized switches for high-temperature applications, the evaluation of electrical characteristics of the Cu-metallized SPDT GaAs switches using Pt as the diffusion barrier at elevated temperatures has also been investigated.

The Cu-metallized switches have been tested at different temperatures, and the device

exhibits low thermal threshold coefficients (δ^Vth/δT) of −0.25 mV/°K from 300 °K to 500 °K. Furthermore, the Cu-metallized SPDT switch exhibited an insertion loss of 0.33 dB, a return loss of 23.3 dB, and an isolation of 36.7 dB at 2.5 GHz; the performance is comparable with the performance of the traditional Au-metallized SPDT switches. The input P1dB of 28.3 dBm at 2.5 GHz was obtained for these switches. Moreover, the temperature-dependent effects on the insertion loss, isolation, switching characteristics, and power handling capability of the Cu-metallized switches using Pt as the diffusion barrier have also been investigated. The RF characteristics of the Cu-metallized SPDT switch still remained quite stable and exhibited a low insertion loss of 0.46 dB, an excellent isolation of 42.79 dB, a high input P1dB of 28.45 dBm, and a high IIP3 of 40.5 dBm at 2.5 GHz when tested at 380

°K. These results demonstrate that the Cu metallization process using Pt as the diffusion barrier is a very reliable process and can be applied to the GaAs MMIC switch fabrication.

In addition, the AlGaAs/InGaAs MOS-PHEMT SPDT switch with ALD Al2O3

gate dielectric was fabricated for the first time. Gate current was improved as compared to the conventional PHEMT. The RF characteristics of the MOS-PHEMT switch exhibited an insertion loss of 0.3 dB, an isolation of 33.4 dB, a return loss of 18.5 dB, and a high input P1dB of 31.4 dBm at 2.5 GHz. Much lower control current of less than 10 µA when biased from 1.5 V to 5 V was achieved. It’s evident that MOS-PHEMT can be used for MMIC switch applications with excellent RF performance and low DC power consumption.

Overall, in this study, the application of the novel semiconductor technologies of the Cu metallization and the high-κ dielectric deposition to the GaAs PHEMT switches have been demonstrated for low cost, low power consumption, and good high-frequency performances in the future.