Single Electron Devices

As described in the section 1.1, nanometer scale devices are interested to numerous researchers in various fields; so many different kinds of device are fabricated with dissimilar operation principles. Depends on the dimensions of the device (0D, 1D, 2D or 3D), the density of state of the device has dramatically changed [3]. Here we only focus on the devices structures that have a small island between two tunneling barriers. The extent of the electrons in the island defines three basic categories of solid-state nanoelectronic devices [4].

- Quantum Dots (QD’s or “artificial atoms”) [5].

Island confines electrons with zero classical degrees of freedom remaining.

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- Resonant Tunneling Devices (RTD’s) [6].

Island confines electrons with one or two classical degrees of freedom.

- Single-Electron Transistors (SET’s) [7].

Island confines electrons with three classical degrees of freedom

Figure 3.1 [8] shows the basic idea of device structure. Figures of band diagram and theoretical Is-Vd curve for devices just discussed above are given in Fig 3.2. SET’s characteristic current-voltage curves are displayed in Figure 3.3 [9], and Figure 3.4. Here, we showed many pioneer’s great works in Fig. 3.5 to Fig 3.9 [10,11,12].

3.2.1 Depletion Gate Single Electron Device

Our efforts are mainly on the single electron device. We start to analyze our device with the theory of single electron transistor. The basic ideas of SET are quantum confinement in the island between two tunnel barriers. When the charging energy in the system is larger than quantum uncertainty, coulomb blockade phenomena will be discovered. Detailed theories about SET can read reference [7,9,13,14].

Based on the process we developed in Chapter 2, we fabricated a device operated like SET. We use the depletion gate concept [15] to make a five terminal (bottom gate, side gate, control gate, source, and drain) device (Device diameters are given in Table 3.1). With the interaction among Vbg (bottom gate), Vsg (side gate), and Vg (control gate), we created an island and two tunneling barriers. Device’s structure is present on Figure 3.10, AFM images are given in 2.7, and measured IV curves are showed from Figure 3.11 to Figure 3.22.

Some quantities about quantum effects are given in Table 3.2.

Although the categories of single island device descried above are specified clearly, till now, devices can’t be fabricated just meet one of the objects. We can see that device’s

characteristics are transient among three basic categories.

First, we see Figure 3.11, and Figure 3.12. The device D5 works properly with the theoretical SET’s characteristic Id-Vd and Id-Vg curves. And in Figure 3.13, and Figure 3.14, the device C5 presents resonance tunnel devices’ (RTD) current-voltage relationship.

This may due to the electron’s Fermi wavelength in silicon become longer with lowering temperature (Compare with the same device C5 measured at different temperature). Longer wavelength changed the island dimension seen by electron, for example, from three dimensions to two or one dimension. The Id-Vd’s behavior may be explained by quantum well module. The maximum likelihood to describe electron’s behavior is standing wave like.

The quantized energy levels correspond to the peak transition current. Gate voltage gives the different potential energy in the island, so we see the similar behavior of periodic oscillation current and voltage relationship.

Second, refer to Figure 3.15, and Figure 3.16, both Id-Vd and Id-Vg curves showed staircase. The origin of formation staircase Id-Vd curve is due to the asymmetry resistance of two tunneling barriers. The reason of Id-Vd showed staircase is that control gate Vg not only influent the electron potential in the island but also the number of electrons. Unlike the current is limited by electron tunneling rate of tunneling junction between island and source (Jis), with higher temperature, the tunneling junction has higher tunneling rate (the tunneling rate relates to temperature with the fact exp(-1/kT)). The current now is not limited by tunneling rate of junction Jis but the number of electrons in the island. As the result, we can observed the quantization Id-Vg behavior, each step imply one more electron participated. Based on the Id-Vg curve measured in this experiment, we can calculate the average electron mobility of our system. We find our devices have the mobility around 20500 cm²/V-s at 30 K and 11500 cm²/V-s at 60 K. Our device is phosphorous doped (5*10¹⁵ cm^-3). This result falls in a reasonable range (see Figure 3.23 [16]).

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Third, Figure 3.17 to Figure 3.21 showed us another Id-Vg pictures. We suppose that there exist a leakage path from drain to source. This assumption is reasonable, since with increasing control gate voltage, the accumulation region become more and more wider.

Above certain voltage, the accumulation region is wider than depletion region caused by side gate and the tunneling barriers disappeared near control gate (see Figure 3.24). It means that, there exist another path (MOSFET like) for current flow between source and drain. When the effective resistance seen by electron is higher than 25.6 MΩ, the electron confinement phenomenon is still can be observed. As a result, our device at this category performed like a SET parallel with a MOSFET. The periodic oscillation is SET’s characteristics and the increasing current is due to the conducting of parallel MOSFET.

3.2.2 Discussions of Depletion Gate Single Electron Device

After qualitative discusses our device in previous section, we try to describe it in more quantitative way. We start at compare parameters extracting from theoretic calculated (first order approximation) by device dimensions and measured IV curves. We find Cg is at a deviation of 50% (2.42 aF v.s. 5 aF), which is still at an acceptable range, but there exist obvious difference in Cd (5.9 aF v.s. 35.6 aF), more detailed data are given in Table 3.4. In addition, the parameter we extract from measurement shows that we measured the device at a condition out of the device’s operation widow. This is unreasonable. This factor implies using the theory for SET to describe our device is not suitable. The oscillation caused in sweep Vd should not be contributed to single electron charging effect but quantized states in the quantum dot. We use the particle in a box model to estimate the dot dimension, and we find the island is at the size about 20 nm. This result agrees to our control gate dimension (60 nm). Father more, we can see the size of the island is about the half electron’s de Broglie wavelength in the low temperature (refer to Table 3.2), this convinced

that the characteristics we measured are something meaningful. By including the information about the QD size, we re-calculate the Cd and combine measured Cg to get the charging energy and operation window for our device. It shows a self-consistent result. All discussions in previous section are still the same except that the charging energy needs to be replaced by quantized energy level. We try to find the staircase in our device C5 caused by charging energy in the Id-Vd curve but in vain (can refer to Figure 3.25). This may due to there doesn’t exist significant difference in the depletion junction Jis and Jid. Some associated data can be found in Table 3.5.