Substrate Bias Effect On Flicker Noise

Substrate bias effect is an essential property in CMOS circuit design, especially in analog circuits and SOI applications. For example, DTMOSFET [4-4] is a good choice for analog circuits since it can improve device matching characteristics and reduce noise. Another example is the SOI devices. In SOI devices, the body is floating and various body charging process may cause a non-zero body potential. The substrate bias effect on the distribution of channel carrier and thereupon on the Flicker noise is worth further investigation.

The substrate bias effect is profound and many fold; it not only modifies the depth of current flow from the surface but also modulates the concentration of inversion carriers. In addition, it will also affect the non-uniformity of the channel threshold voltage distribution.

The combined effect affects mobility, operation current, noise, etc [4-2,5].

4.4.1 Measurement Results of Substrate Bias Effect

Fig. 4-10 shows the comparison of substrate bias effect for different gate voltage in non-pocket n-MOSFETs with L=1.2µm and 0.22µm. The index of noise increase ratio is performed by the dividing of noise level at Vb=-1V and Vb=0.5V. Significant degradation of noise from Vb=0.5V to –1V is observed at low gate bias in the long channel device. The reason is that a Vb of –1V pushes electrons towards the surface and thus channel electrons have larger chance to “see” surface traps. Another reason is that a negative substrate bias reduces the number of channel carriers Thus, the carrier number fluctuation becomes more significant, which is also the cause of the Flicker noise. However, the substrate bias effect is not obvious in the short channel case. We will discuss it through device simulation.

Both of these effects degrade the low frequency noise. So it’s clear that negative substrate bias in NMOS will degrade 1/f noise in a pocket implanted device.

Fig. 4-11 shows the comparison of substrate bias effect for different gate voltage in pocket n-MOSFETs with L=1.2µm and 0.22µm. The index of noise increase ratio is

performed by the dividing of noise level at Vb=-1V and Vb=0.5V. Significant degradation of noise from Vb=0.5V to –1V is observed at low gate bias in both device. It’s interesting to note that the substrate bias effect on noise in a non-pocket short channel device is different from that with pocket implantation. To confirm this result, numerical simulation of the channel charge profile in these two devices is performed.

4.4.2 Simulation Results of Substrate Bias Effect

Device structure for simulation is illustrated as Fig. 4-1. pocket length and channel doping concentration, Lp and Dc, are specified as 0.07 µm and 2.5×10¹⁷ 1/cm³ in this chapter respectively. Fig. 4-12,13 shows the lateral distribution of the inversion carrier along the channel at different depths. The device has no pocket and the gate length is 1µm. The Vb is 0.5V in Fig. 4-12 and the Vb is –1V in Fig. 4-13. Fig. 4-14,15 shows the lateral distribution of the inversion carrier along the channel at different depths. The device has no pocket and the gate length is 0.18µm. The Vb is 0.5V in Fig. 4-14 and the Vb is –1V in Fig. 4-15. As can be seen, the negative substrate bias reduces the channel carrier concentration and causes the noise to increase in the long channel device [4-6]. However, the negative substrate bias doesn’t affect the channel carrier concentration in the short channel device. That is, the noise is not affected by substrate bias in the short channel device as shown in Fig. 4-10.

Fig. 4-16,17 shows the lateral distribution of the inversion carrier along the channel at different depths. The device has pocket and the gate length is 1µm. The Vb is 0.5V in Fig.

4-16 and the Vb is –1V in Fig. 4-17. Fig. 4-18,19 shows the lateral distribution of the inversion carrier along the channel at different depths. The device has pocket and the gate length is 0.18µm. The Vb is 0.5V in Fig. 4-18 and the Vb is –1V in Fig. 4-19. As shown in Fig.

4-16,17, the negative substrate bias reduces the channel carrier concentration and causes the noise to increase in the long channel device. In addition, the non-uniform carrier distribution induced from pocket implantation is enhanced as the negative substrate bias is applied. So the

noise level degrades more compared with non-pocket device. The same results are shown in the short channel device in Fig. 4-18,19. As can be seen, the non-uniform carrier distribution is seriously enhanced by the negative substrate bias. In a word, the noise is degraded in both long and short channel devices because of non-uniform threshold voltage distribution.

4.5 Summary

The pocket implantation would influence the channel carrier distribution and degrade drain current Flicker noise, which is proved by device simulation. In addition, substrate bias has large effect on low frequency noise. The noise level is increased at a reverse substrate bias.

This effect is more significant in a pocket device since the reverse substrate bias will result in a more non-uniform threshold voltage distribution. In addition, the reduction of channel carrier number due to a reverse substrate bias also contributes to the increase of noise.

Fig. 4-1 The structure of an n-MOSFET for device