Chapter 3: Nanocrystallization and interfacial tension of charge
3.4 Summary
In conclusion, we discussed the morphology of sol-gel derived charge tapping layer with different annealing temperatures. The XPS characterization indicated the annealing treatment under oxygen ambient can activate the formation of metal silicates (i.e., hafnium silicate and zirconium silicate). Together with the TEM images
and interfacial energies, we proposed a mechanism to explain the process of sol-gel thin film transformation into NCs. We observed the 400 °C RTA treatment had no effect on the thin film, while 600 °C and 900 °C anneals affected the film’s phase separation. The film during phase separation exhibited higher interfacial energy (600
oC RTA) and after transformation to NCs can minimize the interfacial energy (900 oC RTA). The sol-gel derived NCs successfully played an important role of charge trapping purposed in NC memory device. The 900 °C annealed sample demonstrated the satisfactory retention characteristic than the 600 °C annealed sample due to the NC formation. The large Vth shift of the 900 °C annealed sample was potential for future multi-bit application.
Figure 3.1 The experimental procedure flow of HfZrSixOy film/NCs preparation by sol-gel technique.
HfCl 4 +solvent ZrCl 4 +solvent SiCl 4 +solvent
Sol-Gel Solution
Deposit sol-gel thin film
RTA (O 2 purge, 60sec)
Spin coating 3000rpm, 60s
HfZrSi x O y film/NCs
Stir for 0.5hr at 25
oC
Hf:Zr:Si:solvent=1:1:1:1000
Figure 3.2 Cross-sectional TEM images of the thin film transformation with (a) 400
Figure 3.3 EDS spectrum of the sol-gel derived nanocrystal.
Figure 3.4 (a) Si 2p, (b) Zr 3d, (c) Hf 4f, and (d) O 1s XPS spectra of the sol-gel thin films after different annealing temperatures.
Figure 3.5 Interfacial tension of the sol-gel thin film as a function of annealing temperature.
Figure 3.6 Transformation processes of the sol-gel thin film to NC.
10
010
110
210
310
410
5Figure 3.7 Retention characteristics of the NC memories annealed at (a) 600 °C, and (b) 900 °C under respective measurement temperatures of 25 °C, 85 °C, and 125 °C.
(b)
(a)
Chapter 4
Phase separation of charge trapping layers
4.1 Introduction
Spinodal decomposition takes place through spontaneous reaction of compositional fluctuations when a homogeneous phase becomes unstable under annealing.[55] The mechanism of spinodal decomposition induces the film transformation into interconnected or discrete morphology. The morphology of decomposed phases depends on the film thickness and the composition.[1, 2] The nanocrystal memory can keep the trapped charge tightly to avoid the charge loss problem in conventional thin film memory.[56-58] As to the sol-gel-derived nonvolatile memory devices using nanocrystals (NCs) as charge storage layers,[38, 59]
the formation mechanism of growing nanocrystals is still unclear.
The spinodal decomposition occurred in the charge trapping thin film into the nanocrystal phase during thermal annealing is related to the sol-gel solution composition, annealing temperature and preparation solvent. The electric performance of coexisting hafnium silicate and zirconium silicate nanocrystal memory has published previously.[37] However, the effect of preparation solvent that affect the formation of
solvent constraint on the nanocrystal evolution. We demonstrated the assumption of preparation solvent effect nanocrystal formation, isolation degree, and electric property in this thesis.
The sol-gel solution is prepared by well dispersion of precursors in the solvent.
Prior to form the solid thin film, the sol-gel spin-coating film needs a suitable baking condition.[60] The solvent property plays an important role on deciding the sol-gel film thickness due to the dispersion condition and the viscosity. The different film thicknesses will vary the growing mechanism of phase separation of annealed nanocrystal due to spinodal decomposition. In this study, we control the prepared precursor concentration in order to investigate the solvent effect and film thickness with respect to crystal morphology, charge retention and memory window.
4.2 Experimental
The precursors utilized for the preparation of ZrHfSixOy sol-gel solution were zirconium tetrachloride (ZrCl4, 99.5%, Aldrich), hafnium tetrachloride (HfCl4, 99.5%, Aldrich), and silicon tetrachloride (SiCl4, 99.5%, Aldrich), all of analytical reagent grade. Ethanol and isopropanol (IPA) were utilized as the solvents to dissolve the precursors to fabricate the starting sol-gel solution. Hydrochloric acid (HCl) was added to the solution as a catalyst because acid-catalyzed gels are therefore aggregates of very small ultimate particles. The molar ratio for ZrCl4: HfCl4:SiCl4:solvent in the sol-gel solutions were 1:1:1:100, 1:1:1:500 and 1:1:1:1000. The solution after preparation was stirred for 0.5 hr for well mixing. We used Brookfield viscometer to measure the viscosity of different concentration sol-gel solutions at 20 °C.
After well mixed, spin coating the sol-gel solution (the concentration molar ratio of ZrCl4: HfCl4: SiCl4: solvent = 1:1:1:1000) onto the p-type (100) silicon substrates.
spin coated sol-gel film by rotation speed 3000 rpm for 60sec. After thin film deposition, these samples were subjected to rapid thermal annealing (RTA) at 900 oC for 60 sec in O2 ambient to form NCs.
The fabrication of sol-gel spin-coating NC memory was fabricated on a p-type silicon (100) wafer. After a standard RCA process, 10-nm-thick tunnel oxide was thermally grown by a dry oxidation process in a furnace. Subsequently, the sol-gel film was deposited and through RTA process to solidify. To form NCs, the post deposition annealing treatment with temperatures of 900 °C in O2 ambient was performed. The 20 nm blocking oxide was deposited by Plasma Enhanced Chemical Vapor Deposition (PECVD), followed by deposition of a 200-nm-thick poly-Si gate.
After the PECVD TEOS deposition, the TEOS oxide was dentified in a N2 ambient by annealing at 900 °C for 30 sec. Finally, gate patterning, source/drain implanting, and the remaining steps complete the gate stack formation of the NC memory devices.
4.3 Results and discussion
4.3.1 Film thickness effect of spinodal decomposition
Determination of viscosity was a well-defined and straightforward procedure using the Brookfield viscometer. The viscosity of various sol-gel solutions were listed in Table 4.1. The composition of ZrCl4: HfCl4: SiCl4: IPA = 1:1:1:500 or 1:1:1:100 led to the precipitation effect, and the sol-gel film was not obtained. The solution became more viscous as if the amount of ethanol solvent decreased. The sol-gel solution prepared in ethanol solvent exhibited a lower viscosity of 1.15cP. In contrast, the sol-gel solution prepared in IPA solvent exhibited a larger viscosity of 2.45cP.
Principles of physical chemistry dictated that in dilute solutions, where solute
property and dispersing precursor concentration on depositing the sol-gel thin film. In general, a low viscosity fluid generated a thinner film through spin-coating process.[61]
High resolution structural characterization of the NCs was carried out by the high-resolution transmission electron microscopy (HRTEM, JEOL2100F) operated at 300 kV. The respective TEM images of the charge trapping layer fabricated from ethanol and IPA solvents was demonstrated in Figure 4.1. The sample in Figure 4.1(a) utilized ethanol as solvent to synthesis sol-gel solution then spin-coating and annealing at 900 oC in O2 atmosphere to form NCs. In this condition, phase separation accompanied with the crystallization of the sol-gel film. We observed the film completely transferred into isolated NCs after 900 oC annealing. The sample in Figure 4.1(b) from IPA solvent behaved quit difference with Figure 4.1(a). The sample in Figure 4.1(b) changed preparation solvent into IPA to synthesis sol-gel solution and through the same deposition and annealing process to form NCs. The morphology obtained from IPA solvent was like the interconnected NCs. What is the growing mechanism of discrete or interconnected NCs for only varying the sol-gel solvent?
The mechanism responsible for the formation of discrete or interconnected NCs was dependent on the spinodal decomposition of annealed sol-gel thin film. Seol et al.[1, 2]
utilized computer simulation to deduce the spinodal decomposition process. They suggested the morphology of decomposed phases on initially homogeneous thin film strongly depends on the film thickness and the composition.[1] In our experiment, the composition of precursor was fixed, and only the variable of film thickness is approached. The elemental composition of the binary metal oxides NCs were estimated by energy dispersive X-ray spectroscopy (EDS), showed in Fig 4.2, demonstrated the elemental compositions in NCs combined hafnium, zirconium,
4.3.2 Phase separation mechanism of sol-gel thin film
The mechanism responsible for the formation of NCs was well known to be the transformation of crystalline silicate into spinodal decomposition through high temperature RTA treatment.[62] Stemmer and coworkers[31] proposed the metastable phase diagram for the zirconium silicate and hafnium silicate. They concluded the film approached the driving force for a thermodynamically metastable state of the spinodal decomposition under annealing temperature at 900 °C, showed in Figure 4.3.
Therefore, we depicted a pathway in Figure 4.4 for explaining the thickness phenomenon of spinodal decomposition on sol-gel thin film. As to the thinner film, a series of phase separation steps depicted in Figure 4.4(a). The first step showed initial stage of sol-gel deposited film before annealing. The second step illustrated the film was continuous and smooth, and retained the similar morphology under low temperature annealing (400 °C). Upon 600 °C annealing in step 3, the film started to perturb, and became not only discontinuous but uneven. Finally, at 900 °C annealing, the film approached the driving force for a metastable state of the spinodal decomposition region in the phase diagram.[31] The phase transformed by spinodal decomposition induced the completely isolated NCs. Figure 4.4(b) illustrated different preparation solvent of IPA derived phase separation mechanism. On the contrary, the morphology in the thicker film became more three-dimensional and interconnected at 900 °C annealing. We presumed that the solvent property played an important role on deciding the sol-gel film thickness due to the dispersion condition and the viscosity.
The spin coating film thickness effected the film transformation into interconnected or discrete NCs.
memory devices. The electrical characteristics of the samples were performed by HP4156 to observe I-V characteristics. The normalized Vth shift in percentage was defined as the ratio of Vth shift at the time of interest and at the beginning (t=1 sec).
For ethanol system sample at 25 °C measurement, the retention times showed in Figure 4.5(a) was extrapolated up to 106 sec with less than 5% charge loss. At 85 °C measurement, the retention times to 106 sec demonstrated less than 10% charge loss.
Compare to the IPA system sample at 85 °C measurement, a significant amount of 15% charge loss at 106 sec was observed. This result indicated the extent of nanocrystal isolation in the charge trapping layer was beneficial for data retention.
Therefore, the trapped electrons by isolated NCs were not easily to loss. Additionally, in Figure 4.6, ethanol system performed a relatively large memory window of about 10 V, larger than IPA system sample (~ 3V). We suggested the ethanol system with initially thinner film was beneficial for the better charge trapping performance on tunneling electrons due to isolated NCs formation of spinodal decomposition.
4.4 Summary
In conclusion, we compared the sol-gel film thickness factor that affected the morphology of NCs after annealing. The solvent for dissolving precursors played an important role on controlling viscosity of the sol-gel solution and thickness of the sol-gel spin coated film. The IPA system was more viscous than ethanol system for sol-gel solution under the same concentration preparation. The thinner film formed by ethanol system led to the isolated NCs, while the interconnected NCs morphology was observed of IPA system. The sol-gel derived isolated NCs of ethanol system exhibited better charge trapping performance and memory window.
Table 4.1 Dependence of viscosity and film thickness as a function of compositional molar ratio of sol-gel solutions.
Composition of precursor Concentration (in molar ratio)
Viscosity (cP)
ZrCl
4+HfCl
4+SiCl
4+Ethanol 1:1:1:1000 1.15
ZrCl
4+HfCl
4+SiCl
4+Ethanol 1:1:1:500 1.19
ZrCl
4+HfCl
4+SiCl
4+Ethanol 1:1:1:100 1.47
ZrCl
4+HfCl
4+SiCl
4+IPA 1:1:1:1000 2.45
ZrCl
4+HfCl
4+SiCl
4+IPA 1:1:1:500 precipitate
ZrCl
4+HfCl
4+SiCl
4+IPA 1:1:1:100 precipitate
Figure 4.1 The cross-sectional TEM images of the NCs transformation by (a) Ethanol system and (b) IPA system.
10 nm
(a)
10 nm
(b)
Figure 4.2 (a) Ethanol system (b) IPA system sample elemental composition of the binary metal oxides NCs were estimated by energy dispersive X-ray spectroscopy (EDS).
(a)
(b)
0.0 0.2 0.4 0.6 0.8 1.0
Figure 4.3 The metastable extensions of spinodal region in ZrO2–SiO2 phase diagram.
Figure 4.4 Phase separation mechanism of sol-gel derived nanocrystal on (a) ethanol system and (b) IPA system.
Figure 4.5 Retention characteristics of (a) ethanol system (b) IPA system derived NC memories at measurement temperatures of 25 and 85 °C.
10
010
110
210
310
410
510
6
Figure 4.6 Id-Vg curves of (a) ethanol system (b) IPA system derived NC memories in the programmed state of Vd=10V, Vg=15V, pulse time 10ms.
2 4 6 8 10 12 14
Chapter 5
Application of novel sol–gel spin coating method in SONOS-type flash memory
5.1 Introduction
Memory storage is an important technology that enables the growth in the information world. With the rapid growth of the internet, wireless communication products, personal digital assistants (PDAs), digital cameras, digital camcorders, digital music players, and computers, there is continually a demand for superior information storage technology. The development of portable consumer electronics has spurred the need for high-density nonvolatile memory with low power consumption for system on-chip applications. Considering the flexibility-cost plane, it turns out that the flash memory offers the best compromise between these two parameters, since they have smaller cell size and excellent flexibility (they can be electrically written on field more than 100,000 times, with byte programming and sectors erasing).[3] In recent years, flash memories based on charge storage in nitride traps, such as poly-silicon/SiO2/Si3N4/SiO2/semiconductor (SONOS) structures have been investigated intensively. However, the conventional SONOS memory still suffers from erase saturation and insufficient charge-trapping efficiency, which markedly degrade its performance.[63, 64]
was proposed in the early 1990s by Tiwari et al.[7]. The only stored charges at the nanocrystals adjacent to the defect leak through the tunneling dielectric, compared to huge charge loss of conventional flash memory due to the lateral charge transport.[65]
The possibility of exceeding the performance limits of the conventional floating-gate device spurred many subsequent investigations on this approach. Only the electrons stored on the nanocrystal directly above the defect chain will be affected since the nanocrystals are separated from each other. The tunnel oxide thickness of the nanocrystal memory device can be reduced to allow faster programming and lower voltage operation.[8]
Various techniques have been developed to form the nanocrystals in the gate oxide. For example, Gerardi et al.[66] employed the low pressure chemical vapor deposition (LPCVD) to fabricate Si nanocrystals for density up to 2×1012 cm-2 ,and then, utilized Si nanocrystals as the memory cell. King et al.[67] fabricated Ge nanocystals by oxidation of a Si1-xGex layer formed by ion implantation, and demonstrated quasi-nonvolatile memory operation with a 0.4 V threshold-voltage shift. Lin et al.[46] reported co-sputter technique to fabricate high density HfO2
nanocrystals and utilized to nanocrystal memories with about 4V threshold-voltage shift performance. In this thesis, we proposed a sol-gel spin-coating method to fabricate the charge trapping film or NC for the memory. This approach is relatively cheap, simple, and can be fabricated in a normal atmospheric pressure instead of high-vacuum system. We have successfully achieved the nanocrystal memories with superior characteristics in terms of considerably large memory window, high speed P/E, long retention time, and excellent endurance.
5.2 Experimental
The fabrication of a sol–gel spin-coating derived SONOS-like NC memory was started with a local-oxidation of silicon (LOCOS) isolation process on p-type (100) silicon substrate. At the beginning, a 10-nm tunneling oxide was thermally grown at 925 oC by furnace oxidation. The charge trapping layer was prepared by a sol-gel spin coating method and annealed at high temperature. The precursors utilized for the preparation of the sol-gel solution were zirconium tetrachloride (ZrCl4, 99.5%, Aldrich), hafnium tetrachloride (HfCl4, 99.5%, Aldrich), and silicon tetrachloride (SiCl4, 99.5%, Aldrich), all of analytical reagent grade. Ethanol (EtOH) was used as the solvent to dissolve the precursors to fabricate the starting sol-gel solution.
Hydrochloric acid was added to the solution as a catalyst because acid-catalyzed gels are therefore aggregates of very small ultimate particles. The solution after preparation was stirred for 0.5 hr for well mixing. Initially, we prepared a solution for which the molar ratio of HfCl4:ZrCl4:SiCl4:EtOH equal to 1:1:1:1000. The sol-gel thin film was deposited by spin coating at 3000 rpm for 60 sec at 25 oC. After spin coating, the wafer was under rapid thermal annealing (RTA) at 900 oC temperatures for 60 sec in O2 ambient to form sol-gel derived nanocrystal. Then, the 20-nm-thick blocking oxide was deposited by plasma enhanced chemical vapor deposition (PECVD) tetraethoxysilane (TEOS) oxide. Prior to deposit 200-nm a-Si gate, the TEOS oxide was densified in N2 ambient at 900 ◦C for 30 s anneal to repair the defects and decrease the number of traps. Finally, gate pattering, source/drain (S/D) implanting, and the rest of the subsequent metal-oxide-semiconductor processes were used to fabricate the NC-NVM devices. Figure 5.1 showed the structure of the fabricated device. The memory characteristics reported in this thesis with device W/L=10μm /0.35μm.
5.3 Results and discussion
Figure 5.2 showed the cross-sectional HRTEM image of sol-gel derived nanocrystals with the sol-gel solution of ZrCl4:HfCl4:SiCl4:EtOH=1:1:1:1000 spin coating at rotation speed of 3000rpm for 60 sec. The insert image showed the lattice fringe image of NC to confirm the crystalline result. We utilized the sol-gel derived NC as charge tapping layer in NC memory devices. The crystal size was estimated to be 6–10 nm in diameter. We inferred that the darker NCs in Figure 5.2 are formed from the high-molecular-weight hafnium silicate, and the bright NCs are from the low-molecular-weight zirconium silicate.
5.3.1 Program/Erase characteristics
In this thesis, the programming scheme was executed by using channel hot electron injection (CHEI) to inject charge into the trapping layer. Figure 5.3 showed the Id-Vg curve of NC memory under the programming state of Vg=10V, Vd=15V, 10ms pulse time and the Vth shift after programming can be up to 10 V. Figure 5.4 shows programming speed of the sol-gel derived NC flash memory. The program conditions were (i) Vg= 5V, Vd= 5V; (ii) Vg= 7V, Vd= 7V; (iii) Vg= 9V, Vd= 9V, respectively. The Vth shift increased as increasing the applied gate voltage because of more “hot” electrons generated and tunneled gate oxide to reach the trapping layer.
The hot electrons were trapped by charge trapping layer and caused Vth shift.
Relatively high speed (10μs) programming performance can be achieved with a memory window of about 2.2 V. Figure 5.5 displayed the erase characteristics as a function of various operation voltages. We used band-to-band hot hole (BTBHH) to erase, and the erase conditions were (i) Vg= -9V, Vd= 9V; (ii) Vg= -7V, Vd= 9V; (iii)
More important, there was only a very small amount of overerase observed.
5.3.2 Reliability characteristics Retention characteristic
The charge retention characteristic of the sol-gel derived NC memory device demonstrated in Figure 5.6. The normalized Vth shift was defined as the ratio of Vth
shift at the time of interest and at the beginning. Using the Vth shift as an indicator, the charge loss for the nanocrystal memory was exhibited. At 25 °C measurement, the retention times was extrapolated up to 106 sec for only ~5% charge loss, while less then 10% charge loss at 85 °C measurement. The 900 °C annealed sample retained its good retention characteristics for less than 25% charge loss at higher temperature measurement of 125 oC. This result explained the importance of NC formation for the sol-gel derived memory device. The NC discretely dispersed in the charge trapping layer, which alleviated the charge loss problem when defects existed in the tunneling oxide. The trapped electrons in the sol-gel-derived nanocrystal devices were not easily to escape, and the exhibited charge loss percentage was quite low in our device.
Endurence characteristic
The endurance characteristics after 104 P/E cycle was shown in Figure 5.7. The programming and erasing conditions are Vg=Vd=10V for 10ms and Vg=-6V, Vd=10V for 1s, respectively. Despite the occurrence of significant memory window narrowing, a memory window of about 6V was sustained even after 104 P/E cycles.
The origin of the narrowing over cycling, mainly coming from the increase of Vth in erased state, might be due to two factors: The first is the mismatch between the localized spatial distributions for injected electrons and holes by using channel
electrons will then cause the Vth to increase gradually over P/E cycling. The other is the stress-induced electron traps generated in the tunnel oxide during cycling. The result illustrated our device has excellent endurance performance.
Disturbance characteristic
Figure 5.8 showed the gate disturb characteristics. We measured the gate disturb
Figure 5.8 showed the gate disturb characteristics. We measured the gate disturb