M EASUREMENT R ESULTS

LLCDS, as shown in Fig. 3.6, has been fabricated in a 0.18-µm BiCMOS SiGe process. In this design, the numbers node of deep N-well in the diode string is connected out for bias, named as Vbias. The P+ anode of the diode string is marked as Vp in Fig. 3.6.

During measurement, the cathode of the diode string and the substrate are grounded with two separated channels, so that the cathode current (In) and the substrate leakage current (Isub) can be monitored separately. The total current flowing into the diode string should equal to the total current flowing out the device. The equation can be expressed as:

A b n sub

I +I = I + I (1) The measured I-V curves along the diode string with three diodes in series (N=3) under the bias conditions of deep N-well floating, or biased at 1.8V, are shown in Fig.

3.7. The diode string with Vb of 1.8V has a higher blocking voltage and a lower leakage current, as comparing to that with Vb of floating.

When IA = 1µA, the value of VDD named the total blocking voltage of the triple-well diode string. Fig. 3.8 shows that the measured I-V curves of the different diode number of the diode string under the bias conditions (Vbias) of deep N-well floating, or biased at 1.8V, at the temperature of 25°C.

The relation between the total blocking voltage (defined at IA=1µA) and diode number (N) of the diode string is shown in Fig. 3.9, under Vbias=1.8V to the deep N-well. In Fig. 3.9, it is apparent that the extra bias on deep N-well can increase the total blocking voltage of the diode string. The relation between the total blocking voltage (defined at IA=1µA) and diode number (N) of the diode string is shown in Fig.

3.10, under Vbias floating. Because the leakage current doesn’t flow into the substrate due to the extra bias on the deep N-well, the current is all flowing into the next stage diode in LLCDS to result in a higher blocking voltage across the diode string.

According to equation (1), when the current of Isub is far smaller then that of In, most current will flow through the diode string. As a result, applying a bias to the deep N-well will improve the blocking voltage of the triple-well diode string. But, when adding a voltage on the deep N-well, it has a leakage path from Vbias to the ground through the diode string.

So, a bias resistance (Rbias) is added to reduce the leakage current from Vb. In Fig.

3.11, the relation between bias resistance (Rbias) and the total leakage current (IA + Ib) through the diode string with four diodes (N=4) is measured under different temperatures. The total leakage current (IA + Ib) through the diode string (N=4) under voltage bias of Vp= Vb=1.8V is increased when the temperature is 25°C, 75°C, and 125°C.

However, this phenomenon can be further minimized by adding the bias resistance, which limits the current flow through the deep N-well (Ib). Moreover, when Ib decreases with an increasing resistance, the current flow from the anode to cathode will increase. Under this condition, the value of resistance should be optimized. From the measured results, the diode string (N=4) with a bias resistance of 10 kohm has a minimized leakage current. The equations to minimize the leakage current of the diode string with different diode stages or different blocking voltages can be further derived for optimization design.

With a bias resistance of 10 kohm, the ESD robustness of LLCDS with different diode numbers in series are investigated by the transmission-line-pulse generator (TLP) with pulse width of 100ns. As shown in Fig. 3.12, LLCDS with different diode

numbers (N) have different turn-on resistance in high-current region. The diode string with a larger diode number (n) in series has a larger turn-on resistance.

However, the secondary break-down current (It2) of LLCDS with different diode numbers (N) in series did not have obvious variation. The dependence of secondary breakdown current (It2) of LLCDS on the diode number (N) in series is shown in Fig.

3.13, where every diode has the same device dimension of W/L= 40µm/12µm in layout pattern. With an It2 of higher than 4A, LLCDS (under N=4) can sustain the human-body-model ESD stress of 6 kV. In Fig. 3.13, the It2 of the diode string will not obviously decrease when diode number increases. From this result, the number of diode in LLCDS can be reasonably increased to get a higher blocking voltage without degradation on its ESD level.

3.5 CONCLUSION

A new design for the diode string in 0.18-µm SiGe BiCMOS process has been proposed and verified. According to the experimental results, with extra bias to the deep N-well through a bias resistance, the total blocking voltage of the diode string can be effectively increased. Although the additional extra bias will cause some current into the diode string, the overall leakage current of the diode string can be minimized by a bias resistance.

With this new design, the substrate leakage current can be always kept in a very small value with the order of pA, even under the temperature of 125°C. This new proposed diode string is very suitable for applying in the power-rail ESD clamp circuit and the ESD connection cell between the separated power lines. Optimization design to find the best design choice on the bias resistance and its corresponding

circuit implementation will be studied in the future.

V

DD

I/O

Internal Circuits

Power-rail ESD clamp circuit

V

SS

Fig. 3.1 The whole-chip ESD protection design with the diode string applied in the power-rail ESD clamp circuit.

P-substrate

P+ N+ P+ N+ P+ N+

N-well N-well N-well

VDD VSS

FOX FOX FOX FOX FOX FOX FOX FOX

Fig. 3.2 The cross-sectional view of the pure diode string.

P-substrate

Anode Cathode

FOX FOX

P+ N+

P-well

FOX N+

N-well

Deep N-well

P+ N+

P-well

FOXN+

N-well

Deep N-well

P+ N+

P-well

FOX N+

N-well

Deep N-well

FOX FOX FOX

Fig. 3.3 The cross-sectional view of the n-stage triple-well diode string and its parasitic base-emitter tied p-n-p bipolar transistors.

Fig. 3.4 The top view of triple-well diode structure in 0.18-µm BiCMOS SiGe process.

Fig. 3.5 The cross-sectional view of triple-well diode structure in 0.18-µm BiCMOS

Fig. 3.6 The new proposed diode string with extra bias to the deep N-well to reduce the substrate leakage current.

P+ N+

0.0 0.5 1.0 1.5 2.0 2.5

Fig. 3.7 The measured I-V curves along the diode string with three diodes in series (n=3) under the bias conditions (Vbias) of deep N-well floating, or biased at 1.8V.

0.0 0.5 1.0 1.5 2.0 2.5

Fig. 3.8 The measured I-V curves of the different diode number of the diode string under the bias conditions (Vbias) of deep N-well floating, or biased at 1.8V, at the temperature of 25°C.

2 3 4

Fig. 3.9 The relation between the total blocking voltage and the diode number (N) of the diode string under Vbias=1.8V at the different temperatures.

2 3 4

Fig. 3.10 The relation between the total blocking voltage and the diode number (N) of the diode string under Vbias floating at the different temperatures.

0 500 1k 10k 20k 50k 100k 1M

Fig. 3.11 The relation between bias resistance and total leakage current (IA + Ib) of the diode string with diode number of n=4 and bias condition of Vp=Vb=1.8V, measured at the temperatures of 25°C ,75°C, and 125°C, respectively.

0 5 10 15 20 25

1E-10 1E-9 1E-8 1E-7 1E-6 1E-5 1E-4 1E-3

Leakage Current (A)

Fig. 3.12 The TLP-measured I-V curves of the diode strings with different diode numbers under the bias resistance of 10 kohm.

0 1 2 3 4 3.0

3.5 4.0 4.5 5.0

It2 (A)

Diode Number (n)

Fig. 3.13 The dependence of secondary breakdown current (It2) of diode string on the diode number (n) in series.

Chapter 4

Minimization of Leakage Current in the Diode String in 0.18-µm SiGe BiCMOS Process

4.1 INTRODUCTION

The SiGe BiCMOS technology has been recognized as one of the best chip solutions for broadband and wireless systems [2]. For ESD protection design in RF circuits, the small input ESD diodes cooperating with the power-rail ESD clamp circuit can meet the circuit requirement and achieve the whole-chip ESD protection scheme[6], [20]. Fig. 4.1 shows the typical ESD protection design in RF circuits, which combines the input ESD diodes and the power-rail ESD clamp circuit. The power-rail ESD clamp circuit is implemented by the diode string [13], [14], as shown in Fig. 4.2.

ESD stress on an input (or output) pad has positive or negative modes, while the VDD or VSS pins are relatively grounded. For a comprehensive ESD verification, the pin-to- pin ESD stress and the VDD-to-VSS ESD stress, have been specified to verify the whole-chip ESD robustness. The ESD clamp circuit between the power rails is very helpful to protect the core circuits against ESD damage for RF circuit application.

The ESD current can be discharged by the diode string under forward-bias condition.

Therefore, the diode string can sustain a very high ESD level in a small silicon layout area. However, the main drawback for using the diode string as the power-rail ESD clamp circuit is the leakage issue, especially in the high-temperature condition. A

parasitic vertical p-n-p bipolar junction transistor (BJT) exists in the conventional P+/

N-well diode with the common P-type substrate. This parasitic vertical p-n-p BJT often causes high leakage current along the diode string [13], [14], [17], especially in the high-temperature condition.

Some modified designs on the diode string to reduce leakage current have been reported in [14], which called as Cladded diode string, Boosted diode string, and Cantilever diode string, respectively. But, those designs in the bulk CMOS technology still have high leakage current (~mA) at the high temperature of 125°C [17]. In the SiGe process, the deep trench (DT) was used to reduce the substrate leakage current of the diode string [18], [19]. With the DT and n+ buried layer in SiGe prcoess, the parasitic vertical p-n-p BJT in the diode string has a base-open configuration [19], which results in a lower substrate leakage current as compared to that of the conventional P+/N-well diode in CMOS process.

In this work, three kinds of power-rail ESD clamp circuits for RF ESD protection design in BiCMOS SiGe technology are proposed. The first design is the Low-Leakage-Current Diode String (LLCDS), the second design is the Low-Leakage-Current Diode String 2 (LLCDS2), and the third design is the LLCDS-triggered SiGe HBT. In this work, the characteristics of these new proposed power-rail ESD clamp circuits are compared with that of the conventional diode string.

In the new proposed LLCDS, an extra bias is applied to the deep N-well of LLCDS to minimize the leakage current of LLCDS.

The cross-sectional view of the conventional diode string is shown in Fig. 4.2.

Due to the parasitic vertical p-n-p transistor, the conventional diode string causes more leakage current flowing into the substrate. If the gain of the parasitic vertical p-n-p transistor is more than unity or even larger, the blocking voltage across the

conventional diode string can not increase linearly as the number of stacked diode increases. This means that more stacked diodes would be needed to sustain the required blocking voltage.

4.2 DESIGN ON POWER-RAIL ESDCLAMP CIRCUIT

4.2.1 Low-Leakage current Diode String (LLCDS)

The cross-sectional view of the new proposed of LLCDS in a 0.18-µm BiCMOS SiGe process is shown in Fig. 4.3. The equivalent circuit of LLCDS is shown in Fig.

4.4. Compared with the conventional P+/N-well diode string, the diode structure in LLCDS is formed by the N+/ P-well junction while a deep N-well is used to isolate the P-well from the common P-substrate. In this design, the node of deep N-well in LLCDS is connected to VDD through a resistor R. With the node of deep N-well connecting to VDD, the substrate leakage current due to the parasitic vertical p-n-p transistor (P+/deep N-well/P-sub) is not the concern. However, the leakage current from the parasitic n-p-n transistor in LLCDS will generate, as the equivalent circuit show in Fig. 4.4. The resistor R in LLCDS is applied to further reduce the leakage current from the parasitic n-p-n transistor. The optimized value of resistor R can be derived by the formulas.

The total current flowing into LLCDS should equal to the total current flowing out the device. The total leakage current of LLCDS can be derived as:

1 2 3 4

total leakage C C C C A

I = I + I + I + I +I (1) From the experimental results, the voltage drop across the resistor R is smaller than the voltage drop between the base-emitter of the first parasitic BJT. As a result,

BJT1 will be in the saturation region and BJT2, 3 and 4 will be in the active region.

So the collector and emitter current could be easily derived as following.

(

^/

) (

^/

)

According to equation (4)-(6), the emitter and collector current can be derived.

( ) From the equivalent circuit, the collector current of the BJT2 is the β gain relation with the emitter of the BJT1.

2 2 2= 2 1

C b E

I = β I β I (9)

The value of β of the BJT2 will be determined by its base- emitter voltage.

(

2

)

2 / _{bi BE}

B s

qN V V

β = ε − (10)

For the same reason, the collector currents of the others can be derived.

3 3 3= 2 3 1

4 4 4= 2 3 4 1

So, the total leakage current can be expressed by the following equation and it is the function of R. The minimum value of leakage current can be found by letting the differentiation equal to zero, and the optimized value of R could be found.

( ) ( )

The simulation result is shown in Fig. 4.10. There is a minimum value of total leakage current when R is 30kohm. As a result, it can verify the minimum total leakage current exist in LLCDS by choosing a suitable value of R.

4.2.2 Low-Leakage-Current Diode String2 (LLCDS2)

In order to further reduce the total leakage current of LLCDS, there is another method to reduce the total leakage current. The LLCDS2 and its equivalent circuit are shown in Fig. 4.5.

In this method, the β gain of the parasitic bipolar transistor can be lower then the first method, because every resistance connects between the collector of one parasitic bipolar and the collector of the next. When the current flows through the resistance, the voltage drop reduces the collector-emitter voltage of each parasitic bipolar. As a result, the β gain of the parasitic bipolar transistor can be reduced successfully.

The equations are derived as following:

Total Leakage b A According to the experimental result, the equation (24) can be proved, so the parasitic BJT1,2, and 4 are in saturation region; the parasitic BJT3 is in active region.

The emitter and collector current are derived.

(

^/

) (

^/

)

According to equation (27),(28), According to equation (29), (30) and (31), the emitter and collector current of the first parasitic bipolar can be derived.

( )

Consider the second parasitic bipolar, its voltage and current can be calculated.

2 2 Because the third parasitic bipolar is in the active region, its voltage and current can be derived in another formula.

(

3

)

For the fourth parasitic bipolar, its collector node connects to ground so it works

in the saturation region. After calculating all parasitic bipolar, the total leakage current of this diode string can be get.

1 2 3 1 2 3

Total Leakage A b A C C C E C C

I = I + I = I + I + I + I = I + I + I (43) According to equation (33), (37) and (39), the total leakage can be calculation more detail. In this circuit, the β gain of the parasitic bipolar transistor is reduced by applying these resistors. As the result, the total leakage current of LLCDS can be reduced in advance and smaller than the first method.

( )

The simulation result is shown in Fig.4.12. There is a minimum value of total leakage current when R is 50kohm. As a result, it can verify the minimum total leakage current exist in LLCDS2 by choosing a suitable value of R. Furthermore, the total leakage current of LLCDS2 is smaller than this of LLCDS. It can reduce total leakage current successfully by adding more stage R in LLCDS2.

4.2.3 HBT Triggered by LLCDS

Using diode trigger HBT has been studied [21] and its circuit design is shown in Fig. 4.6. However, the leakage current of this triggered circuit is studied less. Besides LLCDS alone, the total leakage current can be further reduced with the addition of HBT to LLCDS, as shown in Fig. 4.7. This scheme has a smaller leakage current even under high-temperature condition.

Considering the part of LLCDS in this power-clamp circuit, the parasitic BJT1 will be in the saturation region and the parasitic BJT2, 3 and 4 will be in the active region. So the collector and emitter current could be easily derived as following.

(

^/

) (

^/

)

The equation (49) is the key point to differ from pure LLCDS, because the LLCDS does not connect to ground but the base of HBT. Under this condition, all current of LLCDS will flow into the base of HBT and the resistance (Ro).

The equation of the total leakage current could be derived by the similar way. For the SiGe HBT, the base current and the collector current can be expressed as the function of VBE.

The equation of leakage current still can be derived as:

= ( , ) / o+ The Dpe is the diffusion coefficient of emitter, Nde is the emitter doping, Dnb is the diffusion coefficient of base, and Nab is the base doping.

The resistance (Ro) between the base node of SiGe HBT and ground will affect the total leakage current. Thus, there will be two design parameters, R and Ro, in this circuit. The condition of the total leakage current in this circuit with the SiGe HBT device is different from the one in LLCDS alone because of the SiGe HBT.

These parameters used in SPICE are listed at table 4.1, and those measured from the experiment are listed at table 4.2.

4.3 EXPERIMENTAL RESULTS

The design had been fabricated in a 0.18-µm BiCMOS SiGe process. During measurement, the cathode of LLCDS and the substrate are grounded with two separated channels, so that the cathode current and the substrate leakage current can be monitored separately. The DC characteristics of the conventional diode string, LLCDS, and LLCDS2 are shown in Fig. 4.8, Fig. 4.9, and Fig. 4.10, respectively.

According to experimental results, LLCDS and LLCDS2 can have lower substrate leakage current than the conventional diode string.

LLCDS and LLCDS2 have a lower substrate leakage current because there is a

bias applied in the node of deep N-well. In Fig. 4.12, the relationship between bias resistance (R) and the total leakage current through LLCDS with four diodes (N=4) is measured under different temperatures. Because the value of resistance is about kilo ohm order, the N-well resistance is used in these circuits. The total leakage current through the diode string (N=4) is increased when the temperature increases from 25°C to 125°C. Under this condition, the value of bias resistance can be optimized even under high temperature condition.

The relationship between bias resistance (R) and the total leakage current through LLCDS with four diodes (N=4) under different temperatures is shown in Fig.4.14.

Compared with Fig. 4.12, the total leakage current indeed reduces in advance.

Because adding more stage R, the parasitic bipolar junction transistor can work in saturation region without β gain of base current.

From the measured results, LLCDS (N=4) with a bias resistance of 10 kohm has a minimum leakage current. LLCDS indeed has a lower leakage current if the value of R was chosen properly. The equations to minimize the leakage current of LLCDS with different diode stages or different blocking voltages can be calculated from the aforementioned equations.

The relationship between voltage and the total leakage current of the conventional diode string, LLCDS, and LLCDS2 under 125°C for N=4 are shown in Fig. 4.15.

With a bias resistance of 20 kohm, the ESD robustness of LLCDS with different diode numbers in series is investigated by the transmission-line-pulse generator (TLP) with pulse width of 100ns. The dependence of secondary breakdown current (It2) of the conventional diode string, LLCDS, and LLCDS2 on the diode number (N) in series is shown in Fig. 4.16, where every diode has the same device dimension of W/L = 40µm/12µm in layout pattern. However, the secondary break-down current (It2) of the

conventional diode strings and LLCDS with different diode numbers (N) in series did

conventional diode strings and LLCDS with different diode numbers (N) in series did

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