A New AMOLED Pixel Circuit With Pulsed Drive and Reverse Bias to Alleviate OLED Degradation

A New AMOLED Pixel Circuit With Pulsed Drive

and Reverse Bias to Alleviate OLED Degradation

Kuei-Yu Lee and Paul C.-P. Chao, Member, IEEE

Abstract—This paper proposes a new pixel circuit for an active

matrix organic light-emitting diode (OLED) display, which con-sists of five thin-film transistors (TFTs) and one capacitor. This circuit develops techniques of pulsed drive and reverse bias to achieve desired emitted brightness levels and elongate OLED life times, respectively. A current mirror is also adopted in the circuit to minimize emission nonuniformity of the OLED panel. The required input data voltages for varied displayed gray levels are calculated based on analytically known TFT and OLED models and the designed circuit architecture. The designed pixel circuit is simulated with realistic TFT models for validating expected performance to realize 256 gray levels and minimizing nonunifor-mity. The designed circuit is implemented in a 2.4-in quarter video graphics array panel, which shows favorable performance for minimizing display nonuniformity and alleviating OLED degrada-tion. In addition, a closeness is clearly observed among analytical predictions, simulations, and experimental measurements.

Index Terms—Active matrix organic light-emitting diode

(AMOLED), OLED degradation, pulsed drive, reverse bias, thin-film transistors (TFTs), threshold compensation.

I. INTRODUCTION

A

CTIVE matrix organic light-emitting diode (AMOLED) displays have drawn much attention recently due to various advantages, such as high brightness, good efficiency, wide viewing angles, fast responses (< 1 µs), and simple structures [1]. However, AMOLED displays face some seri-ous drawbacks nowadays, like emission nonuniformity of an AMOLED panel and OLED degradation. The nonuniformity is generally considered to be due to threshold voltage (Vth)

shift among long-time-operated amorphous silicon thin-film transistors (a-si TFT) [2], called “dc stress degradation” [3], or Vth mismatch among low-temperature polycrystalline silicon

thin-film transistor (LTPS-TFT), which results from diverse grain distribution in the process [4]. A number of past works on pixel circuit design were proposed to compensate the effects. The presented methods can be categorized into voltage-mode drives [5] and current modes [6]. The problems of the Vth

mismatches are gradually improved with the advancements

Manuscript received August 26, 2011; revised December 14, 2011; accepted January 10, 2012. Date of publication February 10, 2012; date of current version March 23, 2012. This work was supported in part by the UST-UCSD International Center of Excellence in Advanced Bio-Engineering sponsored by the Taiwan National Science Council I-RiCE Program under Grant NSC-100-2911-I-009-101. The review of this paper was arranged by Editor H. S. Tae.

The authors are with the Department of Electrical Engineering, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: [email protected]. edu.tw).

Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TED.2012.2184289

of thin-film transistor (TFT) fabrication processing and newly developed compensation methods. Another serious problem of the AMOLED display is the degradation in OLED emitted luminance and resulting shortened lifetime. This problem be-comes detrimental as the OLED display is expected to replace large-sized and full high-definition liquid crystal display TVs in the future.

On the other hand, the lifetime degradation of the OLED component has been investigated by few past works [7]–[11], where the degradation was attributed to intrinsic and extrinsic causes. The extrinsic causes are, for example, particle conta-mination and inevitable humidification [7] in the fabrication process. As for the intrinsics, they are due to accumulative holes [8], the impurity of movable ions [9], [10], and the Indium diffusion [11] induced by high-density large currents under long-time driving. To tackle the OLED degradation due to long-time current drives, some compensation methods were developed in a few past works [12]. With the OLED degradation estimated via detecting its cross voltage in long-time driving, the compensations in [12] proposed current compensation ap-proaches, where the current through an OLED component was intentionally adjusted larger to maintain the originally designed emitted luminance. However, it often aggravates OLED degra-dation due to larger currents. To solve the problem, this paper proposes a new pixel circuit that incorporates the techniques of pulsed drive and reverse bias to alleviate OLED degradation for longer lifetimes. The effects of pulsed drives on OLED emitted luminance were first discussed by Luo et al. [13]. This work used the current drives in different duty ratios to a single OLED component and then recorded the resulting OLED degradation curves. It was shown that even for different OLED materials the pulsed drives render positive influence on alleviating OLED degradation. As for reverse bias, Si et al. [14] imposed reverse biases on OLED in a nonemission period in each frame for a 3T1C pixel circuit. This work did not, however, offer experimental validation. Yahiro et al. [15] used a single OLED to experimentally show the capability of the reverse bias to alleviate OLED degradation.

Employing both aforementioned methods of pulsed drive and reverse bias, this paper proposes a new OLED pixel circuit that includes five TFTs and one capacitor (5T1C). The two methods are implemented together within a pixel circuit for the first time. The designed pulsed drive is a voltage-mode drive that is easy for realizing high-resolution gray levels up to 256 with current-drive periods, whereas the reverse bias is imposed on an OLED in the designed current-off periods. This special drive is proven effective in alleviating OLED degradation. In addition, the de-signed pixel circuit and timing offer the baseline merits of panel 0018-9383/$31.00 © 2012 IEEE

nonuniformity compensation via a current mirror. With design in hands, the circuit dynamics is simulated by HSPICE to show the expected performance, which is followed by the fabrication of a 2.4-in quarter video graphics array (QVGA) OLED panel with the designed circuit implemented. The measurements of the OLED-emitted luminance recorded in an extended period of time confirm that the proposed combined methods of pulsed drive and reverse bias are well capable of alleviating OLED degradation while realizing 8-bit gray levels.

This paper is organized as follows. Section II states the de-sign and operation of the new pixel circuit and its accompany-ing timaccompany-ing diagram. It presents the capabilities of the designed pixel circuit for implementing pulsed drive, reverse bias, panel nonuniformity compensation, and displaying 8-bit gray levels. Section III presents simulated results. Section IV validates experimentally the performances of gray level realization by pulsed drive and OLED degradation alleviation by reverse bias.

II. DESIGN OF THENEWPIXELCIRCUIT A. Implementing Pulsed Drive and Reverse Bias

The proposed new drive pixel circuit is shown in Fig. 1(a), which is composed of five TFTs and one capacitor, whereas Fig. 1(b) illustrates the associated timing diagram. The entire frame time is designed to have both charge and adjust-duty periods other than reverse bias period at the end. The TFTs of T1 and T2form a current mirror, whereas T3 and T4 perform

as switches for the charge period, as shown in Fig. 1(a). T5

is a switch for realizing the operation of reverse bias. Cc is a

storage capacitor. Vscan(n) and Vdataare those signals provided

by the scan and data lines, respectively, in which Vscan(n) is

responsible for addressing rows, whereas Vdataprovides signals

to control the OLED current, then adjusting the luminance level. On the other hand, Vscan(n) represents the scan waveform

for the nth row, controlling T3 and T4, whereas Vscan(n− 1)

does T5. Vtr(t) is a predesigned triangular waveform with

the aim to generate current-off periods for alleviating OLED degradation. Vg(t) denotes the resulting gate voltage of T2that

is determined by Vdata. VOLED is the voltage at the OLED

anode, whereas IOLEDrepresents the OLED drive current.

Fig. 2(a)–(d) illustrates four different operation stages of the proposed OLED pixel circuit: 1) the transient charge period;

which contains gate capacitance Cox1, mobility µ1, and TFT

aspect ratio of T1, W1/L1. In addition, VTH,T 1is the threshold

voltage of T1. Equation (1) can be rewritten as

Is= KT 1(Vg(t)− Vdata+|VTH,T1|)2. (2)

Rearrangement of (2) gives the gate voltage of T2as

Vg(t) = Vdata− |VTH,T 1| −

Is/KT 1. (3)

The foregoing equation reveals that a predesignated Vdata

af-fects linearly Vg(t), the gate voltage of drive TFT T2for OLED.

Thus, Vdata effectively controls the OLED current IOLEDfor

desired luminance in the subsequent charge period. This way, the OLED current can easily be controlled by a voltage signal Vdatainstead of an external current source [6], which paves the

way to an easy control on the gray level of OLED emission. In the next stage, the adjust-duty period, Vscan(n) provides high

levels of voltage such that T3and T4are turned off, as shown in

Fig. 2(c). In the mean time, Vg(t) is increased by the triangular

wave Vtr(t), as shown in Fig. 1(b), until T2is turned off. This

happens when Vg(t) is raised to the value, which makes VGSof

T2smaller than the threshold voltage of T2, i.e.,

|Vg(t)− Vdd| < |VTH,T 2|. (4)

The turn-off of T2 actually leads to a current-off period for

IOLED, as shown in Fig. 1(b). Finally, the current-off period

is extended and embeds a subperiod of reverse-bias period, where reverse bias is applied, as shown in Fig. 2(d). In this period, Vscan(n− 1) is designed to be at a low level such

that T5 is turned on; thus, the anode voltage of the OLED is

reversed biased. It is applied in each frame to alleviate OLED degradation.

The gray level of OLED emission is determined by the time integration of IOLED in Fig. 1(b). The time integration on

IOLEDis the integration over a pulse waveform since IOLED

keeps constant at charge periods, follows a parabolic-curve-like decline in the adjust-duty period, and finally stays at the zero level in the current-off period. The emitted luminances are seen by human eyes without flickering since the frame frequency is always larger than 60 Hz. By adjusting the predesigned triangular waveform Vtr(t), one is able to control durations

of adjust-duty and current-off periods, thus tuning the emitted luminance of the OLED pixel. The ability of controlling the

Fig. 2. Operations of the proposed circuit in (a) the transient charge period, (b) the steady-state charge period, (c) the adjust-duty period, and (d) the reverse bias period within the current-off period.

duty for nonzero OLED currents categorizes the present ad-dressing scheme as a method of pulsed drive. Pixel designers would be able to choose appropriate levels of Vdataand Vtr(t)

to control the emitted OLED gray level for initiation of the current-off period, and Vscan(n− 1) for a reverse bias period

in the current-off period to alleviate the OLED degradation. B. Minimizing Panel Nonuniformity

The new pixel circuit also offers the baseline merit of compensating panel nonuniformity, in addition to the afore-mentioned degradation alleviation. The compensation is made possible to compensate TFT Vth mismatches by the current

mirror pair of T1and T2, as shown in Fig. 1(a). T1and T2create

a current mirror that is used to control the drain current through T2, which is also the OLED drive current. Based on the basic

operation principles of a TFT, the OLED current, i.e., the drain current of T2, can be derived as

IOLED= ID,T 2= KT 2  Vdata− |VTH,T 1| −
Is/KT 1− Vdd+|VTH,T 2| 2 (5) where KT 2 is composed of mobility, gate capacitor Cox, and

the aspect ratio of T2. VTH,T 2is the threshold voltage of T2.

If the TFTs are fabricated from the same fabrication process, VTH,T 1and VTH,T 2are considered approximately cancellable

by each other. The drain current equation of IOLEDis then

IOLED= KT 2  Vdata− Vdd−
Is/KT 1 2 (6) which makes the design work easier to render the desired gray level of IOLED with a given Vdata since VTH,T 1 and VTH,T 2

are assumed identical and cancel each other. Note that this cancellation between VTH,T 1 and VTH,T 2 can also ease dc

stress degradation, since the degradation effect can be modeled in some degree as Vth shifts in the square law of TFT current

equation [3]. However, due to varied sizes (W/L) of T1 and

T2 and different temperatures and processes, the difference

between VTH,T 1and VTH,T 2 does exist. Moreover, mobilities

of T1 and T2 are also varied due to the same reasons, and

different dc stress degradations on T1 and T2lead to different

VTHshifts. These all lead to errors in designating OLED drive

current IOLED. To suppress the negative effects from these

variations, Monte Carlo simulations are conducted to estimate the variations in the resulting OLED drive [16] in the next section for confirming the tolerable emission nonuniformity of an OLED panel.

C. Realizing Gray Level

This paper is next focused on how to designate the range and resolution of Vdata for targeted displayed gray levels of

the OLEDs. As for the present pixel circuit design in voltage mode, shown in Fig. 1(a), the luminance at varied gray levels is proportional to the time integration of IOLEDover a frame

time, as shown in Fig. 1(b). Since IOLED changes in a frame

over two stages, i.e., the charge and adjust-duty periods, before it reaches zero, the calculation of the gray level is carried out for two different stages. For the charge period, the integration on (6) for IOLEDgives

¯ IOLED,ch= Tf N  KT 2  Vdata− Vdd−
Is/KT 1 2 (7) where N is the row numbers of OLED panel, and Tf is the

IOLED,ad = KT 2  Vdata−|VTH,T 1|−
Is/KT 1 +  Vdd−|VTH,T 2|−Vdata+|VTH,T 1|+
Is/KT 1 [(N−1)/N]·Tf  · t−Vdd+|VTH,T 2| 2 . (9)

The foregoing equation is integrated over time in the adjust-duty period for estimating emitted OLED luminance, yielding

¯ IOLED,ad = Tf   Tf N KT 2 × Vdata−|VTH,T 1|−
Is/KT 1 +  Vdd−|VTH,T 2|−Vdata+|VTH,T 1|+
Is/KT 1 [(N−1)/N]·Tf  ·t−Vdd+|VTH,T 2| 2 dt. (10)

functions of Vdata, even with some terms in (7) and (10) being

not related to Vdata. Their contributions to L are in fact small

as compared with other terms. Henceforth, the OLED emitted luminance L can be approximated well in the sense of propor-tionality to ¯IOLED, total in (11), which is in fact a

quadratic-like function of Vdata. Note that the resulting quadratic-like

relation between the input data voltage Vdataand the resulting

luminance L facilitates well the important task of gamma correction [17] in displaying varied gray levels. Calculations are conducted to depict this quadratic relation between L and Vdata, which is shown in Fig. 3 with a normalized luminance

L for the ordinate. In this figure, a quadratic-like relation is clearly seen, which demonstrate well an easy implementation of gamma correction.

III. SIMULATIONS

A. Displaying Gray Levels With Designed Pulsed Drive The software HSPICE is utilized herein to simulate the elec-tronic dynamics of the newly-designed LTPS-TFT (LEVEL 62) pixel circuit for a QVGA OLED display. The frame frequency is assumed as 60 Hz, which corresponds to the flickering limit of human vision and a standard setting of a TV. The charge period is set as 70 µs based on the calculation for 240 rows. In addition, shown in Fig. 1(a) is the triangular wave Vtr(t) set

from 5 to 15 V, whereas the scan line signal Vscanis from−10

to 15 V. Finally, Vdd is 5 V. Vss is−7.5 V, and Isis 0.1 µA,

as in Table I. The aspect ratios (W/L) of switch TFTs, T1, T3,

T4, and T5, in the pixel circuit, as shown in Fig. 1(a), are set

L = α  T f N  KT 2  Vdata− Vdd−
Is/KT 1 2 + T f  (T f N) KT 2 Vdata− |VTH,T 1| −
Is/KT 1 +  Vdd− |VTH,T 2| − Vdata+|VTH,T 1| +
Is/KT 1 [(N− 1)/N] · Tf  · t − Vdd+|VTH,T 2| 2 dt  (11)

Fig. 3. Normalized gray level versus input data voltage. TABLE I

PARAMETERVALUES FORSIMULATIONS

identically to be 6 µm/6 µm, whereas the driving TFT T2is set

to be 4 µm/20 µm.

To show the capability of the proposed pixel circuit to display 256 gray levels, the following simulations are conducted. Vdata

is set from 0 to 5 V for 256 gray levels with 0.025 V for distinguishing a single gray level. Shown in Fig. 4 are the simulated curves representing different output currents driven by the designed pixel circuit in a frame time of 17 ms, with Vdata ranging from 0 to 5 V. These curves are seen with

different declining trends and levels within the displayed frame time, which contributes to displaying different gray levels from the highest to the lowest, proving that the new pixel circuit is able to display varied gray levels.

B. Application of Reverse Bias

Simulations are also conducted to observe the application of reverse bias in the current-off period. The simulated results are shown in Fig. 5, where it is seen that Vssis set as−7.5 V, and

the OLED anode voltage VOLEDis gradually decreased in the

frame time to−6 V before the cutoff period, keeping the cross voltage of the OLED greater than 1.5 V for emission. At the end of the current-off period, there is a reverse bias period where

Fig. 4. Simulated IOLED(t) with Vdataranging from 0 to 5 V.

Fig. 5. Simulated VOLED(t) with Vdataranging from 0 to 5 V.

TABLE II

TYPICALVARIATIONS OFLTPS-TFT PARAMETERS

the voltages of the OLED anodes VOLEDare seen intentionally

pulled down by Vscan(n− 1) to −10 V, successfully realizing

reverse biasing on the OLED component. C. Compensation Effects

Monte Carlo simulations on the HSPICE model of the pro-posed circuit are conducted to show tolerable panel emission nonuniformity considering the variation of three parameters: 1) threshold voltage Vth; 2) mobility Uo; and 3) current source

error Ierr. Gaussian distributions are assumed for the

afore-mentioned three variations. They are listed in Table II with corresponding averages and standard deviations. Monte Carlo simulations on the conventional 2T1C and proposed 5T1C pixel circuits are next conducted 20 times, and the results are compared. As shown in Fig. 6(a) and (b), the average drive current offered by the proposed 5T1C circuit renders only the

Fig. 6. Simulations of the average current with considering variations and Monte Carlo simulations for (a) conventional 2T1C and (b) new 5T1C pixel circuit.

variation of±2.19%, whereas the conventional 2T1C leads to ±19.27%.

IV. MEASUREMENTS A. Fabrications

A 2.4-in QVGA OLED display panel is fabricated in the laboratory for performance testing. The panel is designed and implemented with top-emitting OLEDs, the pixel circuits proposed in this paper, and a triangular waveform generator realized by the gate-driver-on-array process. Fig. 7 shows the designed layouts of subpixels for red, green, and blue colors. The aspect ratios (W/L) of switch TFTs T1, T3, T4and T5in

the pixel circuit, as shown in Fig. 1(a), are designed identically to be 6 µm/6 µm, whereas the driving TFT T2is designed to

be 4 µm/17.5 µm, 4 µm/20 µm, and 4 µm/6.75 µm in the subpixels for red, green, and blue colors, respectively. Different sizings of T2 for red, green, and blue are aimed to consider

different emission efficiencies for RGB colors. Fig. 8(a) shows a microphotograph of the fabricated pixel layout for red color, where five TFTs and one capacitor are present. In addition, in the figure are the electrodes for scan line signals Vscan(n) and

Vscan(n− 1). Note that Vscan(n− 1) is for the operation of

reverse bias. Fig. 8(b) shows the overall practical experimental

Fig. 7. Designed layouts of the subpixels for (a) red, (b) green, and (c) blue.

Fig. 8. (a) Microphotograph of the fabricated new pixel circuit in a QVGA panel for red color. (b) Experimental setup.

setup, where there are the QVGA OLED panel, a driving board, and a field-programmable gate array (FPGA) board. The FPGA board processes image data and signals for scanning. The driving board provides the power. This QVGA OLED panel is set up for displaying bars in different colors for testing. Table III summaries the specifications and properties of the QVGA panels.

B. Measurements of Emission Nonuniformity

The emission nonuniformity of the 2.4-in QVGA panel is experimentally investigated to validate the effectiveness of the proposed pixel circuit in Vth compensation. The standard of

Video Electronics Standards Association (VESA) Flat Panel Display Measurement (FPDM) [18] is used herein for inves-tigation. Fig. 9 shows the measurement results at five points specified by VESA FPDM. Point A is located at the center

TABLE III

SPECIFICATIONS OF THENEWPIXELCIRCUIT

Fig. 9. Measurements for panel emission nonuniformity by VESA FPDM. TABLE IV

MEASUREMENTRESULTS ONPANELEMISSIONNONUNIFORMITY

of panel. Points B–E are located at 10% of panel length and width from margin of the panel. The displayed nonuniformity can then be calculated by

Nonuniformity = [1− (Lmin/Lmax)]× 100% (12)

where Lmin and Lmax are minimum and maximum

lumi-nances, respectively. The highest gray level is set for deter-mining nonuniformity. Table IV gives the measurement results, which show that point E has the maximum luminance, i.e., 217.9 cd/m2, whereas point B does the minimum luminance, i.e., 212.2 cd/m2. In the results, the emission nonuniformity

Fig. 10. Measurements of OLED-emitted luminance for three different operations.

of the new 2.4-in panel is as small as 2.6%, which is close to 2.19% of the simulated previously by Monte Carlo method. 2.6% or 2.19% in nonuniformity can generally be regarded as tolerable for a display.

C. Measurements of Gray Level

The emitted gray levels of this QVGA panel implemented with the newly-designed pixel circuits are measured by a col-orimeter. The measurements of mixed white light are shown in Fig. 3, where those analytical counterparts calculated by current integration of the new pixel circuit abiding by (11) are also depicted for comparison. The closeness between two sets of data confirms the validity of the luminance prediction by (11). Based on (11), the pixel designer is able to easily find varied levels and range of Vdata for implementing 256 gray levels

from 0 to 5 V. In addition, present in the figure is a quadratic dependence of measured normalized gray levels on input data voltage, demonstrating well an easy implementation of gamma correction.

D. Measurements of Degradation Alleviation

Three different operation conditions for the OLED panel are next considered for investigating the performance of alleviating the AMOLED degradation by the proposed pulsed drive and reverse bias. First, the emitted luminance of a QVGA OLED panel with pixel circuits consisting of conventional two TFTs and one capacitor (2T1C) is measured for three days. Next, the newly designed 5T1C panel by the designed pulsed drive is measured with and without reverse biasing, also for three days. The initial luminances for three different conditions are all set to 70 cd/m2by a specific input data voltage, as shown in Fig. 10. The three sets of experimental data in this figure show measured luminances with respect to time for three days. It is obviously seen that the 2T1C pixel circuit leads to the lowest emitted OLED luminance—the worst case regarding OLED degradation. The new 5T1C pixel circuit with pulsed drive but no reverse bias offers a higher (better) luminance, validating the advantage offered by the pulsed drive. Finally, the emitted luminance with both pulsed drive and reverse bias implemented is almost unchanged of three days, resulting in the best (largest)

0–5 V for input data voltage. For the experimental study, a 2.4-in AMOLED panel in QVGA resolution with the new pixel circuit implemented is fabricated for testing. The nonuniformity of this panel is measured at five points of the panel, which is only 2.6%. In addition, the gray levels recorded by experiments for this panel are confirmed in good agreement with the theoret-ical counterparts predicted by the proposed current integration. To test the circuit performance of OLED degradation allevi-ation, additional measurements on the emitted luminance are also recorded from other panels with basic 2T1C circuits and the proposed designed 5T1C circuits for an extensive period of time. The results show that the pulsed drive does moderately ease OLED gradation, whereas the reverse bias further renders superior degradation alleviation for OLEDs.

ACKNOWLEDGMENT

The authors are deeply in debt to AU Optronics Corp., Hsinchu, Taiwan, for their assistance to fabricate the OLED panel for testing, and the National Chip Implementation Center (CIC) of Taiwan for implementing the test circuit.

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Kuei-Yu Lee received the B.S. degree in electrical

engineering in 2007 from the National Taiwan Ocean University, Keelung, Taiwan, and the M.S. degree in electrical control engineering in 2009 from the National Chiao Tung University, Hsinchu, Taiwan, where he is currently working toward the Ph.D. degree in electrical engineering.

His research interests focus on thin-film transis-tors and active-matrix organic light-emitting diode (OLED) display.

Paul C.-P. Chao (M’07) received the B.S. degree

from the National Cheng-Kung University, Tainan, Taiwan, in 1989 and the M.S. and Ph.D. degrees from Michigan State University, East Lansing in 1993 and 1997, respectively.

He worked for the CAE Department, Chrysler Corp., Auburn Hill, Detroit, MI, for two years. He is currently a faculty member with the Electrical Engineering Department, National Chiao Tung Uni-versity (NCTU), Hsinchu, Taiwan. In recent years, his research interests focus on interface analog cir-cuit design for optical devices/systems; micromechatronics, control technology, microsensors, and actuators.

Dr. Chao was the recipient of the 1999 Arch T. Colwell Merit Best Paper Award from the Society of Automotive Engineering, Detroit, the 2002/2003/2004 CYCU Innovative Research Award; the 2004 Long-Wen Tsai Best Paper Award from the National Society of Machine Theory and Mech-anism, Taiwan; the 2005 Best Paper Award from the National Society of Engineers, Taiwan; the 2006 AUO Award; the 2007 Acer Long-Term 2nd-prize Award; the 2007/2008/2009 NCTU EEC Outstanding Research Award; the 2009 Best Paper Award from the Symposium on Nano-Device Technology; and the 2010 Best Paper Award from the 20th Annual IEEE/ASME Conference on Information Storage and Processing Systems (ISPS). He was the Associate Provost of NCTU, the Secretary of IEEE Taipei Section, 2009-2010, and currently the founding chair of the local chapter for the IEEE Sensor Council and an AdCom member of the IEEE Sensors Council. He is also the Associate Editor of three well-known SCI-index journals, IEEE SENSORSJOURNAL,

ASME Journal of Vibration and Acoustics, and Journal of Circuit, System and Computer.