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Nanosized metal grains induced electrical characteristic fluctuation in 16-nm-gate high-kappa/metal gate bulk FinFET devices

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Nanosized metal grains induced electrical characteristic fluctuation in

16-nm-gate high-

j

/metal gate bulk FinFET devices

Yiming Li

a,b,⇑

, Hui-Wen Cheng

b

, Chun-Yen Yiu

b

, Hsin-Wen Su

a

a

Department of Electrical Engineering, National Chiao Tung University, Hsinchu 300, Taiwan

b

Institute of Communications Engineering, National Chiao Tung University, Hsinchu 300, Taiwan

a r t i c l e

i n f o

Article history:

Available online 30 March 2011 Keywords:

Metal gate TiN gate

Random work function Bulk FinFET

Threshold voltage fluctuation Random grain’s size Number and position

Large scale 3D device simulation

a b s t r a c t

In this work, the work function fluctuation (WKF) induced variability in 16-nm-gate bulk N-FinFET is for the first time explored by an experimentally calibrated 3D device simulation. Random nanosized grains of TiN gate are statistically positioned in the gate region to examine the associated carriers’ transport, con-currently capturing ‘‘grain number variation’’ and ‘‘grain position fluctuation.’’ The newly developed localized WKF simulation method enables us to estimate the threshold voltage fluctuation of devices with respect to the aspect ratio (AR = fin height/fin width) which accounts for the random grain’s size, number and position effects simultaneously.

Ó 2011 Elsevier B.V. All rights reserved.

1. Introduction

Devices with vertical channel possess diverse fascinating

charac-teristics[1]. High-

j

/metal gate stacked fin-type

field-effect-transis-tor (FinFET) is promising technology in sub-22 nm device era[2–4].

However, metal gate may introduce random fluctuation source, so-called the work function fluctuation (WKF) owing to the dependency of work function on metal grain’s size, number and position. Such uncontrollable grain orientations result in random work function

of metal during growth period [2–7]. Many studies concerning

WKF on planar CMOS technology have been reported[3–7].

Unfortu-nately, effect of localized WKF[2]on electrical characteristics with

respect to the aspect ratio of bulk FinFET have not been explored yet. In this study, based on the experimentally calibrated 3D device

simulation[8], WKF of bulk N-FinFET with TiN/HfO2gate stack and

AR = 1 and 2 are investigated. Notably, the influence of random grain’s size, number and position effects is thus discussed.

2. Simulation methodology

The devices we examined are the 16-nm-gate bulk N-FinFETs

with amorphous-based TiN/HfO2 gate stack and an EOT of

0.8 nm, where the devices are with two different aspect ratios,

AR = 1 and 2.Fig. 1(a) shows the validated performance of bulk

N-FinFETs according to ITRS roadmap for low operating power

[9]. Different from the average WKF (AWKF) method [3,4] and

the compact model approach[10], we present the localized WKF

(LWKF) method[2]which directly partitions the area of device’s

metal gate into 48 and 80 sub-regions following Gaussian distribu-tion, where the average number of total generated h2 0 0i

orienta-tions are 28 and 48 for AR = 1 and 2, as shown in Fig. 1(b),

respectively. Then, we randomly generate the work function to each sub-region according to material’s property listed in

Fig. 1(c), where h2 0 0i and h1 1 1i grain orientations of TiN gate have relatively close probabilities 60% and 40%. Then, the 196 cases are generated and mapped into device gate area for 3D device sim-ulation[8].

3. Results and discussion

The AWKF and LWKF methods induce rather different potential

profile of the channel surface, as shown inFig. 2(a). The potential

profile induced by the AWKF method is smooth while the potential profile is strongly governed by the different work function locally.

The comparison of

r

Vthbetween AWKF and LWKF methods for the

devices with different aspect ratio is shown inFig. 2(b). The

fluctu-ation induced by the AWKF method may underestimate because it does not consider the effect of localized work function individually.

Fig. 2(c) presents the ID–VGcurves in which the red and blue lines 0167-9317/$ - see front matter Ó 2011 Elsevier B.V. All rights reserved.

doi:10.1016/j.mee.2011.03.037

⇑Corresponding author. at: Department of Electrical Engineering, National Chiao Tung University, Hsinchu 300, Taiwan. Tel.: +886 3 5712121x52974; fax: +886 3 5726639.

Microelectronic Engineering 88 (2011) 1240–1242

Contents lists available atScienceDirect

Microelectronic Engineering

(2)

are the devices with AR = 1 and 2, respectively, where

r

Vth,

r

Ionand

r

Ioff are summarized in inset. The device with AR = 2 shows better

control channel controllability, where the

r

Vthof AR = 2 is 1.3 times

smaller than that of AR = 1.Fig. 3(a) shows the plot of on-state

cur-rent (Ion) versus off-state current (Ioff) for the device with different

aspect ratio. It indicates the device with AR = 2 shows smaller

devi-ation owing to better channel controllability. Ionand Ioff

character-istics depending on random grain number and position effects are further studied. We examine the cross-sectional (top-view)

on-state (VD= VG= 0.8 V) current density and off-state (VD= 0.8 V,

VG= 0V) electrostatic potential of channel surface. Fig. 3(b00–d00)

show the top-view of on-state current density and theFigs 3(b0

d0) show the top-view of off-state potential profile. Compared the

current density, as shown inFig. 3(b00and c00), the similar I

onwith

different Ioffmechanisms induced different current density due to

random grain position effect. In contrast, the similar Ioffwith

differ-ent Ionmechanisms due to random grain number effect can be

ex-plained by top view of potential profile as shown inFig. 3(b0 and

d0). Further, we also consider the grain size’s effect for the device

with different aspect ratio, where the grain size are (2  2),

(a)

(b)

(c)

Fig. 1. (a) Schematic of the simulated bulk N-FinFET with random metal grain on the gate and the achieved device performance for AR = 1 and AR = 2. (b) 48 and 80 randomly generated grains in each device with AR = 1 and with AR = 2, where the size of metal grain are 4  4 nm2

and green and blue colors are h2 0 0i and h1 1 1i orientations, respectively. The mean numbers of TiN h2 0 0i orientations are 28 and 48 for generated 196 devices with AR = 1 and 2, respectively. (c) The material property of TiN.

σ

V

th

(mV)

0 5 10 15 20 25 AWKF LWKF

V

G

(V)

0.0 0.2 0.4 0.6 0.8 ID (A) 1e-12 1e-11 1e-10 1e-9 1e-8 1e-7 1e-6 1e-5 1e-4 AR2 AR1 σ σ σ σ σ σ

(c)

(b)

(a)

--

-

--

-Fig. 2. (a) The potential profiles calculated by AWKF and LWKF methods. (b) Comparison ofrVthbetween the AWKF and LWKF methods for devices with AR = 1 and 2. The Avt

of AR = 1 and 2 for AWKF are 0.88 and 1.22, respectively; for LWKF method, they are 0.64 and 0.91, where the Avtis calculated byrVth (LW)

0.5. (c) The I

D–VGplot of the

studied devices with AR = 1 and 2, where the values ofrVth,rIonandrIoffare summarized.

(3)

(4  4) and (8  8) nm2, respectively, as shown inFig. 4. The

r

Vth

induced by the grain size of (2  2) nm2is 10.24 and 8.71 mV for

the device with AR = 1 and 2, which is 3.2 and 2.6 times smaller

than the grain size of (8  8) nm2for the device with AR = 1 and

2, respectively. 4. Conclusions

In this study, the LWKF simulation method was advanced to study the WKF-induced variability in 16-nm-gate bulk N-FinFETs

with amorphous-based TiN/HfO2gate stacks. Based on this

meth-od, for device with AR = 1,

r

Vth= 19.5 mV and for AR = 2,

r

Vth= 14.6 mV; consequently, the fluctuations resulting from

ran-dom grains’ number and position were estimated and the WKF is suppressed by device with higher AR. Further, we examined the grain size’s effect. As the grain size increases from (2  2) to

(8  8) nm2, the

r

Vth increases from 10.24 and 8.71 mV to 32.6

and 21.5 mV for the FinFET with AR = 1 and 2. However, for more completed consideration, process variation effect (PVE) should also be addressed for N-FinFET devices. We are currently studying the WKF and PVE using a unified computational model with comparing with fabricated bulk FinFET devices.

Acknowledgements

This work was supported in part by National Science Council (NSC), Taiwan under Contract No. NSC-99-2221-E-009-175 and by TSMC, Hsinchu, Taiwan under a 2010-2011 grant.

References

[1] Y. Li, C.-H. Hwang, IEEE Trans. Electron Devices 54 (2007) 3426–3429. [2] H.-W. Cheng, F.-H. Li, M.-H. Han, C.-Y. Yiu, C.-H. Yu, K.-F. Lee, Y. Li, IEDM Tech.

Dig. (2010) 379–382.

[3] H.F. Dadgour, K. Endo, V. De, K. Banerjee, IEDM Tech. Dig. (2008) 705–708. [4] H.F. Dadgour, K. Endo, V.K. De, K. Banerjee, IEEE Trans. Electron Devices 57

(2010) 2504–2514.

[5] A.R. Brown, N.M. Idris, J.R. Watling, A. Asenov, IEEE Electron Device Lett. 31 (11) (2010) 1199–1201.

[6] A. Yagishita, T. Saito, K. Nakajima, S. Inumiya, K. Matsuo, T. Shibata, Y. Tsunashima, K. Suguro, T. Arikado, IEEE Trans. Electron Devices 48 (2001) 1604–1611.

[7] X. Zhang, J. Li, M. Grubbs, M. Deal, B. Magyari-Kope, B.M. Clemens, Y. Nishi, IEDM Tech. Dig. (2009) 57–60.

[8] Y. Li, S.-M. Yu, J.-R. Hwang, F.-L. Yang, IEEE Trans. Electron Devices 55 (2008) 1449–1455.

[9]<http://www.itrs.net>.

[10] X. Chen, S. Samavedam, V. Narayanan, K. Stein, C. Hobbs, C. Baiocco, W. Li, D. Jaeger, M. Zaleski, H.-S. Yang, N. Kim, Y. Lee, D. Zhang, L. Kang, J. Chen, H. Zhuang, A. Sheikh, J. Wallner, M. Aquilino, J. Han, Z. Jin, J. Li, G. Massey, S. Kalpat, R. Jha, N. Moumen, R. Mo, S. Kirshnan, X. Wang, M. Chudzik, M. Cjowdhury, D. Nair, C. Reddy, Y. -W. Teh, C. Kothandaraman, D. Coolbaugh, S. Pandey, D. Tekleab, A. Thean, M. Sherony, C. Lage, J. Sudijono, R. Lindsay, J.-H. Ku, M. Khare, and A. Steegen, VLSI Symp. Tech. Dig., 2008, pp. 88–89.

I

on

(A)

1.4e-5 1.6e-5 1.8e-5 2.0e-5

-I

off

(A)

0.0 2.0e-11 4.0e-11 6.0e-11 8.0e-11 1.0e-10 1.2e-10 1.4e-10 1.6e-10 (a) Ion (A)

6.0e-6 1.2e-5 1.8e-5 2.4e-5 Ioff (A) 0 1e-10 2e-10 3e-10 4e-10 5e-10 6e-10 7e-10 8e-10 9e-10 1e-9

AR1

AR2

(b) (c’) (b”) (d) (d’) (d”) (b’) (c) (c”)

AR2

μ μ Source Drain Drain Drain Source Source

Fig. 3. (a) The characteristics of Ioffversus Ionfor the bulk N-FinFET with AR = 1 and 2. Three different cases are selected to evaluate similar Ioffbut different Ion(plots of (b and

c)) and similar Ionbut different Ioff(plots of (c and d)). Plots of (b00and c00) show the corresponding top-views of on-state current density, similar Ionwith different Ioff

mechanisms induced different current density due to random grain position effect. Plots of (c0and d0) show the corresponding top-views of off-state potential profile, the

similar Ioffwith different Ionmechanisms due to random grain number effect can be explained.

σVth (mV) 0 5 10 15 20 25 30 35

(2 x 2) nm

2

(4 x 4) nm

2

(8 x 8) nm

2 19.5 32.6 14.6 21.5 8.71 10.24 σVth (mV) 0 5 10 15 20 25 30 35

(2 x 2) nm

2

(4 x 4) nm

2

(8 x 8) nm

2 AR1 AR2 AR1 AR2 19.5 32.6 14.6 21.5 8.71 10.24

Fig. 4. TherVthinduced by different grain sizes: (2  2), (4  4) and (8  8) nm 2

for the bulk N-FinFET with AR = 1 and AR = 2, respectively. The Avtof (2  2), (4  4)

and (8  8) nm2

for N-FinFET with AR = 1 are 0.64, 1.22 and 2.03, respectively; for N-FinFET with AR = 2, they are 0.54, 0.91 and 1.34.

數據

Fig. 2. (a) The potential profiles calculated by AWKF and LWKF methods. (b) Comparison of r Vth between the AWKF and LWKF methods for devices with AR = 1 and 2
Fig. 3. (a) The characteristics of I off versus I on for the bulk N-FinFET with AR = 1 and 2

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