CMOS exponential-control variable gain amplifiers

CMOS exponential-control variable gain amplifiers

W. Liu, S.-I. Liu and S.-K. Wei

Abstract: New CMOS exponential-control variable-gain amplifiers (VGAs) are presented. The control signal can be either current-mode or voltage-mode. Since no multiplier is needed in the proposed circuits, the proposed VGAs can be very compact. For the case of supply voltages VDD=|VSS|=1.5 V, the power dissipation is only 0.48 mW. The gain control range of the proposed VGA can be 30 dB. The proposed circuits have been fabricated in a 0.5 mm n-well CMOS process. Experimental results are given to confirm the feasibility of the proposed VGAs, which are expected to be useful in analogue signal processing applications.

1 Introduction

Variable gain amplifiers (VGAs) can be widely used in analogue signal processing, such as disc drives [1], telecommunications [2, 3] and automatic gain control (AGC) circuits [4, 5]. Traditionally, a VGA can be realised by a multiplier with an input signal and an exponential one [5, 6]. However, unlike the inherent exponential characteristics of bipolar devices, there is no intrinsic exponential device in CMOS technologies. To realise the exponential function, the approximated Taylor series expansion [4–6] can be utilised. Alternatively, a pseudo-exponential function, which is given as (1)[7–9], can also be used to approximate the exponential function exp(2nx). fðxÞ ¼ 1þ x 1 x
n  e2nx _ð1Þ where 7x7o1.

In this paper, new CMOS exponential-control VGAs based on (1) are presented. Unlike the traditional design, the multiplier is not used in the proposed circuits. The exponential-control range can be tuned either by a current-mode signal or a voltage-mode signal. The pro-posed circuits have been fabricated in a 0.5 mm n-well CMOS process and the experimental results are given to demonstrate the proposed VGAs.

2 Circuit implementation

The proposed VGA is shown in Fig. 1. Assume that, transistors M1, M2 and M3 are biased in the triode region without body effect. The drain currents I1, I2and I3can be

expressed as I1¼ Kn1 2 2ðVSS VTn1ÞVDS1 V 2 DS1   ð2Þ I₂¼ IB Icþ I5 ¼Kn2 2 2ðVin VSS VTn2ÞVDS2 V 2 DS2   ð3Þ and I₃¼ IBþ Icþ I6 ¼Kn3 2 2ðVout VSS VTn3ÞVDS3 V 2 DS3   ð4Þ where IB is a bias current generated by M10 and M11 through a reference voltage VB, Ic is a control current, Kn1,2,3are the transconductance parameters and VTn1,2,3are the threshold voltages of M1, M2 and M3, respectively. The current mirror (M7, M8 and M9) is used to duplicate the current I1, so that

I1¼ I4¼ I5¼ I6 ð5Þ

Assume that M4, M5 and M6 are perfectly matched (i.e. Kn4¼ Kn5¼ Kn6 and VTn4¼ VTn5¼ VTn6) and all of them are biased in saturation. According to the square-law characteristics of MOSFETs, the following equation can be obtained: VGS4¼ VGS5¼ VGS6 ¼ ffiffiffiffiffiffiffi 2I1 Kn4 s þ VTn4 ð6Þ VDD VSS Vin Vout V_B −Ic Ic IB IB I₄ I1 I5 I6 I2 I3 M7 M8 M9 M6 M2 M3 M1 M4 M5 M11

Fig. 1 Current-mode exponential-control VGA

W. Liu and S.-I. Liu are with the Department of Electrical Engineering and Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan 10617, Republic of China. W. Liu is also with the Department of Electronic Engineering, Tung Nan Institute of Technology, Republic of China

S.-K. Wei is with the Department of Electronic Engineering, Tung Nan Institute of Technology, Taipei, Taiwan 22202, Republic of China

rIEE, 2004

IEE Proceedings online no. 20040111 doi:10.1049/ip-cds:20040111

Paper first received 16th December 2002 and in revised form 18th June 2003

According to (6) and VGS4þ VDS1 ¼ VGS5þ VDS2 ¼ VGS6 þVDS3, one can obtain

VDS1¼ VDS2¼ VDS3 ð7Þ

Since the source voltages of M4, M5 and M6 are equal (i.e. VSB4¼ VSB5¼ VSB6), one can obtain VTn4¼ VTn5¼ VTn6. Assume that M1, M2 and M3 are perfectly matched (i.e. Kn1¼ Kn2¼ Kn3¼ Kn and VTn1¼ VTn2¼ VTn3¼ VTn) ac-cording to (7) and substituting (2) into (3) and (4), one can obtain, respectively,

IB Ic¼ Kn Vin VDS2 ð8Þ and

IBþ Ic¼ Kn Vout VDS3 ð9Þ From (7), (8) and (9), one can have

Vout¼ Vin IBþ Ic IB Ic ¼ Vin 1þIc IB
 1Ic IB
 ð10Þ

Comparing (10) with (1) and provided that IcoIB, one can obtain Vout Vin exp 2  Ic IB
 ð11Þ From (11), a VGA can be realised and its gain can be exponentially controlled by the current Ic.

Figure 2 shows that, if the gates of M10 and M11 are connected to the voltages Vb+Vcand VbVc(where Vbis a bias voltage and Vc is a control voltage), respectively, a voltage-mode exponential-control VGA can also be rea-lised. Assume that M10 and M11 are perfectly matched (i.e. Kp10¼ Kp11¼ Kp and VTp10¼ VTp11¼ VTp) and both of them are embodied in individual wells to avoid the body effect. If both M10 and M11 are biased in saturation, one can obtain I10¼ Kp 2 ðVDD ðVbþ VcÞ  jVTpjÞ 2 ð12Þ and I11¼ Kp 2 ðVDD ðVb VcÞ  jVTpjÞ 2 ð13Þ Replacing ‘IBIC’ and ‘IB+IC’ in (3) and (4) by I10and I11, respectively, and according to (5)–(7), one can obtain

I10¼ Kn Vin VDS2 ð14Þ and

I11¼ Kn Vout VDS3 ð15Þ

From (7), (14) and (15), one can obtain Vout¼ Vin I11 I10 ¼Vin VDD ðVb VcÞ  jVTpj  2 VDD ðVbþ VcÞ  jVTpj  2 ¼Vin ðVDD Vb jVTpjÞ þ Vc ðVDD Vb jVTpjÞ  Vc
2 ¼Vin 1þ Vc V_DD Vb jVTpj 1 Vc VDD Vb jVTpj 0 B B @ 1 C C A 2 ð16Þ Comparing (16) with (1) and providing that Vbo0 and VDD–Vb47VTp7, one can obtain

Vout Vin exp 4 

Vc

VDD Vb jVTpj



ð17Þ From (17), a VGA can be realised and its gain can be exponentially controlled by the voltage Vc. According to (11) and (17), if two proposed VGAs are cascaded, then the output exponential-control range can be further increased.

To keep the proposed VGAs working properly, M1, M2 and M3 should be biased in the triode region and other transistors should be in saturation. Since IBIC(also I10in Fig. 2) must flow into the drain of M2, the operating range can be derived as Vssþ VTn Vout VDD ffiffiffiffiffiffiffiffi 2I1 Kp9 s ð18Þ and Vin40 ð19Þ

where I1is defined in (2) and Kp9are the transconductances of M9.

If the threshold voltages of M1, M2 and M3 are mismatched due to the process variation, for example, VTn1¼ VTn; VTn2¼ VTnþ DVTn2;and VTn3¼ VTnþ DVTn3, then (10) can be written as

Vout ¼ Vin

IBþ Ic Kn DVTn2 VDS

IB Ic Kn DVTn2 VDS

ð20Þ Based on the same mismatch assumption, (14) can be written as Vout¼ Vin  VDD ðVb VcÞ  jVTpj  2 Kn DVTn3 VDS VDD ðVbþ VcÞ  jVTpj  2 Kn  DVTn2 VDS ð21Þ According to (20) and (21), the mismatch of the threshold voltages of M1–M3 will cause the nonlinear errors of the proposed VGAs. If the nonlinear errors are significant, long-channel devices for M1, M2 and M3 can be used to reduce the errors.

Again, if the transconductances of M1, M2 and M3 are mismatched, for example, Kn1¼ Kn; Kn2¼ Kn1þ DKn2; and Kn3 ¼ Kn1þ DKn3, then (10) can be written as

Vout ¼ Vin IBþ Ic DKn3 ðVout Vss VTnÞ  VDS V 2 DS   IB Ic DKn2 ðVin Vss VTnÞ  VDS VDS2   ð22Þ VDD V_SS Vin Vout I₁₁ I10 M7 M10 M8 M9 M6 M2 M3 M1 M4 M5 M11 Vb + Vc Vb − Vc

Fig. 2 Voltage-mode exponential-control VGA

Based on the same mismatch assumption, (14) can be written as Vout¼ Vin VDD ðVb VcÞ  jVTpj  2 DKn3 ðVout Vss VTnÞ  VDS VDS2   VDD ðVbþ VcÞ  jVTpj  2 DKn2 ðVin Vss VTnÞ  VDS VDS2   ð23Þ According to (22) and (23), the variation of the transcon-ductances of M1–M3 will contribute the nonlinearities of the proposed VGAs. However, through careful layout considerations and long-channel devices, the deviation can be reduced.

3 Experimental results

The proposed VGAs have been fabricated in a 0.5 mm n-well CMOS process. The die photograph is shown in Fig. 3. The aspect ratios of all the transistors for the proposed circuit are listed in Table 1 and the experiments

were performed with the supply voltages

VDD¼ jVSSj ¼ 1:5V . The experimental results of Fig. 1 are shown in Fig. 4a. The input voltage Vinwas set to 0.25 V, 0.3 V and 0.35 V, respectively, and the bias current IB was 30 mA. As the control current Icvaries in the range25 to +25 mA, the output voltage varies in the range 0.15–0.9V, which corresponds to a dynamic range of about 15 dB. The input range of the proposed VGA is limited by (19). As the input voltage Vin was increased to 0.55 V, the measured

output range can be about 13.5 dB. Figure 4b shows the linearity gain errors between the measured results and the theoretical values calculated by (11). According to Fig. 4b the linearity gain errors are within70.5 dB. Also, the power dissipation is about 0.63 mW (Ic¼ 25 mA,Vin¼ 0.35 V). The experimental results confirm the theoretical analysis calcu-lated by (11). Figure 5a shows the experimental results of the proposed VGA shown in Fig. 2. The experiments were performed with the input voltage Vin¼ 0.15 V, 0.2 V and 0.25 V, respectively, and the bias voltage Vb was set to 0.2 V. As the control voltage Vcvaries in the range0.35 to +0.35 V, the output voltage varies in the range 0.03– 1.15 V, which corresponds to an output dynamic range of about 30 dB. As the input voltage Vin was increased to 0.5 V, the measured output range can be about 25 dB. Figure 5b shows the linearity gain errors between the measured results and the theoretical values calculated by (17). According to Fig. 5b the linearity gain errors are within 70.5 dB. Also the power dissipation is 0.48 mW (Vc¼ 0.35 V, Vin¼ 0.25 V). The experimental results con-firm the theoretical analysis calculated by (17).

The frequency response of Fig. 1 is shown in Fig. 6a, which was performed with the control current Ic¼ 5 mA, 0 mA and 5 mA and the corresponding 3 dB bandwidth can be 56.1 MHz, 38.9 MHz and 26.2 MHz, respectively. Also the corresponding input referred noise values are 147.6, 124.5 and 115.8 nV/(Hz)1/2, respectively. Figure 6b shows the frequency response of the proposed voltage-mode exponential-control VGA. As the control voltage Vc¼ 0.05 V, 0 V and 0.05 V, the corresponding 3 dB bandwidth can be 21.9 MHz, 8.9 MHz and 4.23 MHz, respectively. Also, the corresponding input referred noise values are 151.2, 138.8 and 126.9 nV/(Hz)1/2, respectively. The summary of the experimental results is listed in Table 2. Fig. 3 Die photo of the exponential-control VGA in Figs.1 and 2

Table 1: Aspect ratios of the MOSFETs of the proposed exponential-control VGA

Transistors Aspect ratio (W/L) (mm/mm)

M1–M3 2/1 M4–M6 1/1 M7–M9 7.5/1 M10, M11 2.5/1 −0.5 −0.3 −0.1 0.1 0.3 0.5 −30 -−10 10 30 error, dB −18 −14 −10 −6 −2 2 −30 −20 −10 0 a 10 20 30 Vin = 0.25 V Vin = 0.3 V Vin = 0.35 V Vin = 0.25 V Vin = 0.3 V Vin = 0.35 V Vout , dB Ic, µA Ic, µA b

Fig. 4 Results for the proposed current-mode exponential-control VGA

a Experimental results

b Linearity gain errors between measured results and theoretical values

4 Conclusions

In this paper, new CMOS exponential-control variable-gain amplifiers have been developed. Only a small number of transistors is used in the design, and the power dissipation is very low. Experimental results have been given to confirm the validity of the theoretical analysis. The proposed circuits are expected to be useful in the design of an AGC and other analogue signal processing applications.

5 Acknowledgments

This work is partially supported by the National Science Council, Taiwan, Republic of China under Grant NSC 91-2626-E-236-002.

6 References

1 Harjani, R.: ‘A low-power CMOS VGA for 50 Mb/s disk drive read channels’, IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., 1995, 42, (6), pp. 370–376

2 Sahota, G.S., and Persico, C.J.: ‘High dynamic range variable-gain amplifier for CDMA wireless applications’. Proc. 1997 IEEE Int. Solid-State Circuits Conf., San Francisco CA, USA , 1997, pp. 374–375 3 Siniscalchi, P., Wyszynski, A., and Choi, D.: ‘High-precision,

programmable 1-10MHz bandwidth, 0-20 dB gain communication channel for digital video applications’. Proc. 1996 IEEE Custom Integrated Circuits Conf., San Diego CA, USA , 1996, pp. 103–106 4 Lin, C., Pimenta, T., and Ismail, M.: ‘A low-voltage CMOS

exponential function circuit for AGC applications’. Proc. XI Brazilian Symp. on Integrated Circuit Design, Rio de Janeiro, Brazil, 1998, pp. 195–198

5 Lin, C., Pimenta, T., and Ismail, M.: ‘Universal exponential function implementation using highly-linear CMOS V-I converters for dB-linear (AGC) applications’. Proc. 1998 Midwest Symp. on Circuits and Systems, Notre Dame, IN, USA, 1998, pp. 360–363

6 Chang, C.C., Lin, M., and Liu, S.I.: ‘CMOS current-mode expo-nential-control variable-gain amplifier’, Electron. Lett., 2001, 37, pp. 868–869

7 Motamed, A., and Ismail, M.: ‘CMOS exponential current-to-voltage converter’, Electron. Lett., 1997, 33, (12), pp. 998–1000

8 Abdelfattah, K.M., and Soliman, A.M.: ‘A new approach to realize variable gain amplifiers’, Analog Integr. Circuits Signal Process., 2002, 30, pp. 257–263

9 Liu, W., and Liu, S.I.: ‘CMOS exponential function generator’, Electron. Lett., 2003, 39, pp. 1–2 −0.5 −0.3 −0.1 0.1 0.3 0.5 error, dB −35 −25 −15 −5 5 −0.4 −0.2 0 a 0.2 0.4 Vin = 0.15 V Vin = 0.2 V Vin = 0.25 V Vin = 0.15 V Vin = 0.2 V Vin = 0.25 V Vc, V −0.4 −0.2 0 0.2 0.4 b Vc, V Vout , dB

Fig. 5 Results for the proposed voltage-mode exponential-control VGA

a Experimental results

b Linearity gain errors between measured results and theoretical values

Table 2: Summary of experimental results

Parameter Current-mode VGA Voltage-mode VGA Supply voltage _{71.5 V 71.5 V} Minimum gain 16.5 dB 31.4 dB Maximum gain 0.26 dB 0.89 dB

Linearity gain error 70.5 dB 70.5 dB

3dB frequency 56.1 MHz (at Ic¼ 5 mA) 21.9 MHz (at Vc¼ 0.05 V) 38.9.1 MHz (at Ic¼ 0 mA) 8.9 MHz (at Vc¼ 0 V) 26.2 MHz (at Ic¼ 5 mA) 4.23 MHz (at Vc¼ 0.05 V) Input range 0–0.55 V 0–0.5 V Output range 0.15–0.9 V 0.03–1.15 V

Input referred noise 146.6 nV/(Hz)1/2 (at Ic¼ 5 mA) 151.2 nV/(Hz)1/2 (at Vc¼ 0.05 V) 124.5 nV/(Hz)1/2 (at Ic¼ 0 mA) 138.8 nV/(Hz)1/2 (at Vc¼ 0 V) 115.8 nV/(Hz)1/2 (at Ic¼ 5 mA) 126.9 nV/(Hz)1/2 (at Vc¼ 0.05 V) Power consumption 0.63 mW 0.48 mW −20 −16 −12 −8 −4 0 I_c = 5 µA Ic = 0 µA Ic = −5 µA Vc = −0.05 V Vc = 0 V Vc = 0.05 V 10−1 10 103 105 107 Hz a dB −25 −20 −15 −10 −5 5 0 10−1 10 103 105 107 109 Hz b dB

Fig. 6 Frequency response of the proposed VGA

a Current-mode exponential-control VGA b Voltage-mode exponential-control VGA