可調變電流畫素電路應用在非晶矽薄膜電晶體主動式矩陣有機發光二極體顯示器

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(1)國立交通大學光電工程研究所碩士論文. 可調變電流畫素電路應用在非晶矽薄膜電晶體主動式矩陣有機發光二極體顯示器 Adaptive Current Scaling Pixel Circuit for a-Si:H TFT AMOLED Displays. 研究生：黃建智指導教授：鄭惟中博士謝漢萍博士. 中華民國九十五年三月.

(2) 可調變電流畫素電路應用在非晶矽薄膜電晶體主動式矩陣有機發光二極體顯示器 Adaptive Current Scaling Pixel Circuit for a-Si:H TFT AMOLED Displays 研究生: 黃建智. Student: Jian-Zhi Hunag. 指導教授: 鄭惟中. Advisor: Dr. Wei-Chung Cheng. 謝漢萍. Dr. Han-Ping D. Shieh 國立交通大學. 電機學院. 光電工程研究所碩士論文 A Thesis Submitted to Institute of Electro-Optical Engineering College of Electrical and Computer Engineering National Chiao-Tung University in Partial Fulfillment of the Requirements for the Degree of Master In Electro-Optical Engineering January 2006 Hsin-Chu, Taiwan, Republic of China. 中華民國九十五年三月.

(3) 可調變電流畫素電路應用在非晶矽薄膜電晶體主動式矩陣有機發光二極體顯示器研究生：黃建智. 指導教授：鄭惟中. 博士. 謝漢萍博士. 國立交通大學光電工程研究所. 摘要主動式矩陣有機發光二極體電流源畫素電路之瓶頸，在於顯示低灰階畫面時充電時間過長導致驅動資料的錯誤。本論文提出一種創新可調變電流畫素電路設計，利用儲存電容串接結構，來達到電流可調變的功效以縮短充電時間，同時不減少畫素的開口率。根據數值分析與實驗的結果，若與傳統的電流源驅動畫素電路做比較，當顯示亮度為 100 和 20 cd/m2 時，充電時間可分別縮短 10.7 和 13.7 倍。此外，當輸入電流範圍為 0.2 和 10 µ 情況之下，此一可調變電流畫素電路設計可達最大驅動電流範圍 2 nA 和 5 µA。另一方面，此畫素電路設計中，當驅動電晶體的截止電壓變化為 4.5 V 時，輸出電流變化可壓縮至 3.8 %。這些實驗結果，皆證實此一可調變電流畫素電路設計可縮短充電時間及補償元件特性變化，以達到主動式有機發光二極體顯示器高解析、大尺寸之需求。. i.

(4) Adaptive Current Scaling Pixel Circuit for a-Si:H TFT AMOLED Displays. Student：Jian-Zhi Huang. Advisor：Dr. Wei-Chung Cheng Dr. Han-Ping D. Shieh. Institute of Electro-Optical Engineering National Chiao Tung University. Abstract The difficulty that current-driven pixel circuit of active matrix organic light emitting diode devices encounters lies in long charging time resulted in data programming error while displaying low gray level images. This thesis proposes an adaptive current scaling pixel circuit design, which utilizes the cascade structure of storage capacitors to achieve current scaling function without sacrificing aperture ratio so as to shorten the charging time. By the analytical and experimental results, at display luminance of 100 and 20 cd/m2, the charging time can be shortened by a factor of 10.7 and 13.7, respectively; moreover, the driving current ranging from 2 nA to 5 µA can be obtained at programming current ranging from 0.2 to 10 µA. Besides, the variation of driving current can be suppressed to 3.8% while the threshold voltage variation of driving TFT is 4.5 V which evidently demonstrated shortening charging time and compensating the characteristic variations to fulfill the requirement of high resolution and large size AMOLED displays. ii.

(5) 致. 謝. 回憶著過去兩年的日子，有歡笑有汗水，這一路走來，受到眾人的扶持與關懷，讓我能夠順利地劃下句點。在此，謹以此論文來表達對你們誠摯的謝意。. 首先要感謝的是我的指導教授鄭惟中老師和謝漢萍老師，不僅提供很好的學習環境，各方面的資源也給予莫大的協助；此外，平日的教導、表達能力的訓練以及研究精神與態度的培養，讓我了解到不論在學術或是人生的任何事上，都要以嚴謹認真的態度來面對。. 在求學的日子裡，感謝研究所學長姐彥仲、Vicowa、裕國、均合、喬舜、榮安、安琪、予潔，同學奕智、正宇、龍材、彥行、立仁、文生、佳峰、健富、枝福等，在課業上、研究上、生活上的幫助與分享，因為有你們使我的研究生活變得十分有趣，可能尚有一些未提及的朋友們，在此均一併致謝。. 此外，我也感謝廣輝電子面板技術開發部提供儀器設備來完成畫素電路的製作與克勤經理、培銘、燕玲在實驗上的討論。. 最後，是我最敬愛的父母、哥哥、嫂嫂與妹妹，感謝你們多年來的栽培與鼓勵，並在生活上細心照顧與關懷，使我能夠全心研究與學習，若沒有你們不可能有我今天的小小成果。我將與幫助過我的人一同分享這份喜悅。. iii.

(6) Table of Contents Abstract (Chinese)…………………………………………………………………….i Abstract (English)……………………………………………………………………ii Acknowledgment..…………………………………………………………………...iii Table of Contents…………………………………………………………………….iv Figure Captions……………………………………………………………………...vi List of Tables………………………………………………………………...………ix. Chapter 1. Introduction …………………………………….……………...1. 1.1 Thin Film Transistor For Active Matrix Addressing………………………1 1.2 Driving Mode …………………………………………………………………2 1.2.1 Voltage-Driven Pixel Circuit…………………………….…….............…2 1.2.2 Current-Driven Pixel Circuit………………………………………………3 1.3 Motivation and Objective of This Thesis ..…………………………….….....…4 1.4 Organization of This Thesis…………….……………………………..……....5. Chapter 2. Principle…..…………………………………….……...………......6. 2.1 Why Current Scaling Function...….……………………….………….………6 2.2 Current-Mirror Pixel Circuit…………………………………………….……8 2.2.1 Addressing State…………………………………..…………………...…..8 2.2.2 Non-Addressing State.……………….………..…………………….……..8 2.3 Design of Adaptive Current Scaling Pixel Circuit……………………..……10 2.3.1 The Operation of Addressing State………....…………….....……….…..11 2.3.2 The Operation of Non-Addressing State………………………..………..12 2.4 Summary…………………………………….……………….....……….…….14. Chapter 3. Simulation Results and Discussions....…………....…......……15 iv.

(7) 3.1 Simulation Premise………………………………………………..………….15 3.2 Simulation Results and Discussion………………..……………...…...…….17 3.2.1 Current Scaling Ratio…………….……..…………………….……….....17 3.2.2 Programming Time……………...……………..…………...…………….24 3.3 Summary…………………………...…………………….………...…………26. Chapter 4. Fabrication and Measurement Instruments………….……27. 4.1 a-Si:H TFT Fabrication Process……………….…………………..……......27 4.2 Organic Light Emitting Diode Fabrication Process………………..………28 4.3 Measurement System……………………………...……….………………...29 4.3.1 Electrical Properties Analysis System.……..…………..…..…………….30 4.3.2 Testing Circuitry Systems………………………………..………..……..31 4.4 ConoScope……………..…………………………….………………………..32. Chapter 5. Experimental Results and Discussion……………...…………34. 5.1 Electrical Characteristics……...………..……………………..………..……35 5.1.1 Current Scaling Ratio……………………………………...……...……...35 5.2 Reliability…………………………………………...……………………..….48 5.2.1 BTS for TFT Device….…….……………..……………………………48 5.2.2 BTS for Current Scaling Pixel Circuit….…..…..….……………………49 5.3 Single Pixel AMOLED Device…....……………..…………………………52 5.3.1 Solution of Glass Cutting by Laser…………………………………….56 5.3.2 Solution of Short Circuit Problem………………………………………56 5.4 Summary…………….…………….………….………..……………………..57. Chapter 6. Conclusions and Future Directions..………………………...…59. 6.1 Conclusion….……...…………………..…..……………………..………..……59 6.2 Future Direction....………………...…..…..……………………..………..……60. Reference…………………………………………………………………………...62 v.

(8) Figure Caption Fig. 1-1. Conventional voltage-driven pixel circuit for AMOLED display…...……....3 Fig. 1-2. Comparison of luminance uniformity of (a) voltage programming with (b) current programming………………………...……………….…………......3 Fig. 1-3. Schematic diagram of conventional current-driven pixel circuit for AMOLED display……..…...………..……….……….………….………...4 Fig. 2-1. Schematic diagram of conventional current-mirror pixel circuit……............8 Fig. 2-2. Schematic diagram of adaptive current scaling pixel circuit for AMOLED display…………...…………………………………………..…………..…11 Fig. 2-3. The equivalent circuit diagram of the addressing state ………….........…....12 Fig. 2-4. The equivalent circuit diagram of the non-addressing state…...……...……13 Fig. 3-1. Comparison of IDrain as a function of VGate among measurement and simulation results for a-Si:H TFT devices at various channel width (W) (a) 20, (b) 50, (c) 100 and (d) 150 µm while channel length (L), dielectric thickness (ti) and VDrain were 4µm, 410 nm and 15 V, respectively….…...16 Fig. 3-2. OLED current density and brightness variation with supplied voltages...…16 Fig. 3-3. The simulation waveform of proposed pixel circuit…….………………….18 Fig. 3-4. Comparison of RSCALE as function of IDATA among simulation and fitting cutting curve at various C2/C1 (a) 1/4, (b) 1/8 and (c) 1/12 in the proposed pixel circuit shown in Fig. 2-2 ………....…….…..……………………….20 Fig. 3-5. Comparison of (a) IOLED_ON, (b) IOLED_OFF and (c) IAVG as a function of IDATA among current-driven pixel shown in Fig. 1-1 and proposed pixel shown in Fig. 2-2 at various C2/C1 ratio during one frame period while tON = 0.33 ms and tOFF = 33 ms…..…………………………….………………………….23 Fig. 3-6. Comparison of IAVG as a function of IDATA among current-mirror pixel shown vi.

(9) in Fig. 2-1 and proposed pixel shown in Fig. 2-2 at tON = 0.33 ms and tOFF = 33 ms……………...…………………..…………………...……………….24 Fig. 3-7. TPROG as a function of display diagonal with a scan line made from Cu at (a) XGA RSCALE = 1, (b) XGA RSCALE = 4, (c) XGA RSCALE = 20 and (d) UXGA RSCALE = 20…………………...……………………………..………………25 Fig. 4-1. Process flow for inversed-staggered back-channel-etch a-Si:H TFT ...……28 Fig. 4-2. The schematic architecture and molecular structures of bottom-emission OLED device……………...………………………………………………29 Fig. 4-3. Electrical properties analysis system with Agilent 4156A semiconductor analyzer, 41501B pulse generator and probe station…………....……...…31 Fig. 4-4. The GFG-8020H function generator……..…..……………………….……32 Fig. 4-5. The micro-ampere level power supply.…………………………………….33 Fig. 4-6. The visual performance evaluation system of ConoScope instrument……..33 Fig. 4-7. Illustrations of ConoScope detector………..…………….…………….......33 Fig. 5-1. A photograph of (a) current-driven, (b) current-mirror and (c) adaptive current scaling pixel circuits fabricated by a-Si:H TFT technologies…..…35 Fig. 5-2. Comparison of RSCALE as a function of IDATA among measurement and simulation results at various C2/C1 (a) 1/4, (b)1/8 and (c) 1/12 in proposed pixel circuit shown in Fig. 2-2………….…………………………………37 Fig. 5-3. The RSCALE as a function of IDATA at various channel width of (a) T1, (b) T3 and (c) T4 in proposed pixel circuit shown in Fig. 2-2………….………....40 Fig. 5-4. The (a) IOLED_ON and (b) IOLED_OFF as a function of IDATA at various C2/C1 during a frame period in proposed pixel circuit shown in Fig. 2-2..……....42 Fig. 5-5. The IOLED_OFF as a function of IDATA during a frame period at various channel width of T4 = 150, 100 and 50 µm in the current-driven pixel circuit shown vii.

(10) in Fig. 1-3…………………...………………………………….......………44 Fig. 5-6. The IOLED as a function of IDATA in the (a) addressing state and (b) non-addressing state at various T3/T4 = 4/1, 2/1 and 1/1 in a conventional current-mirror pixel circuit shown in Fig. 2-1……....….……...…………45 Fig. 5-7. Comparison of IAVG as a function of IDATA among conventional current-driven, current-mirror, and proposed pixels……….……………......………………46 Fig. 5-8. The ∆VTH as function of stress time at VGate = 30 V, IDrain = 5 µA in the single TFT device which channel width (W) and length (L) are 50 and 4 µm, respectively…………………...…………………………….………………49 Fig. 5-9. Comparison of ∆IOLED_OFF as function of stress time among C2/C1 = 1/8 and 1/4 at various IOLED_ON current in the proposed pixel circuit shown in Fig.2-2…....51. Fig. 5-10. Comparison of ∆IOLED_OFF as a function of stress time among conventional current-driven pixel circuit shown in Fig. 1-3 and proposed pixel circuit shown in Fig. 2-2 at various IOLED_ON current…………………...….……..52 Fig. 5-11. (a) Before and (b) after depositing organic layers on the a:Si:H panel…...54 Fig. 5-12. Extraordinary lighting of active areas in the normally operational condition………………………….……………………………………..54 Fig. 5-13. Schematic diagram of surrounded signal pad connected to each other…...55 Fig. 5-14. Analysis of non-optimum pixel circuit in the single pixel AMOLED panel………………………..……………………………………………56 Fig. 5-15. The improved layout for single pixel AMOLED device……….………....57 Fig. 6-1. The schematic diagram of driving circuitry system for adaptive current scaling pixel AMOLED display…………..…………………………….61. viii.

(11) List of Tables Table 3-1. The parameters used in proposed pixel circuit simulation……………...17 Table 3-2. Simulation results of proposed pixel circuit in the Fig. 3-3……...........18 Table 3-3. The parameters including TFT materials and OLED device for calculating total programming time……………………………………………,……..26 Table 5-1. The parameters of fabricated device for proposed pixel circuit………......36 Table 5-2. The parameters used in the condition of measurement………………...…37 Table 5-3. The parameters of fabricated device for conventional current-driven pixel circuit………………………………………………………………….......43 Table 5-4. The parameters of fabricated device for current-mirror pixel circuit….....46 Table 5-5. Comparison of programming time among current-driven, current-mirror and proposed pixel circuit at various luminance………………………….47 Table 5-5. The parameters used in single pixel AMOLED device including current-driven, current-mirror and proposed pixel circuits………...….....53. ix.

(12) Chapter 1 Introduction Organic Light Emitting Diode (OLED) displays have great potential to replace Liquid Crystal Display (LCD) thanks to its merits such as high brightness, high contrast ratio, light weight, thin structure, short response time and low-power consumption [1-5]. Owing to the vastly different properties of OLED from LC, the conventional driving methods for LCD may be inapplicable for OLED displays. In this chapter, the choke point of the exited driving method for OLED displays will be discussed and the objective of this thesis will be resolved accordingly. 1.1 Thin Film Transistor For Active Matrix Addressing Initially LCD and OLED were driven by passive matrix (PM) addressing mode to achieve maximum performance. Although the PM addressing mode is simple, it would limit the display size and resolution because the duration of pulsed signal decreases as the display resolution and gray level increase. Therefore, PM addressing has been replaced by active matrix (AM) addressing for mass information content and large area flat panel displays (FPDs). In AM addressing scheme, field-effect transistors (FETs), such as thin-film transistors (TFTs) are widely adopted because TFTs can be easily fabricated for large size substrate by either amorphous or polycrystalline silicon technologies. In the realization of AMOLED, low temperature poly-silicon (LTPS) TFTs utilized as a backplane for OLED are commonly adopted in AMOLED development because LTPS TFTs can provide much higher current due to its higher mobility than that of hydrogenated amorphous-silicon (a-Si:H) TFTs. However, during LTPS TFT fabrication process, the poly-Si is crystallized by excimer laser annealing (ELA), 1.

(13) where the uniformity control is difficult. Consequently, the crystallization of poly-Si is probably varied to affect the threshold voltage, mobility and sub-threshold. Thus, the uniformity of TFT will be deteriorated to result in non-uniform brightness from pixel to pixel [6]. Besides, complex fabrication process and high cost are extra considerations for display industries to develop LTPS TFT as well. Compared to LTPS TFT, using a-Si:H TFTs as the backplane to realize AMOLED needs fewer manufacturing costs and lower equipment investment because the a-Si:H can be deposited in chemical vapor deposition (CVD) and no extra process steps are required. The uniformity of brightness throughout the whole display is satisfactory [7-8]. There, a-Si:H TFTs is therefore to LTPS TFTs in large size OLED displays. 1.2 Driving Mode The active matrix pixel circuits can be classified into two categories based on the type of input data. The first one is the voltage-driven pixel circuit and the other is current-driven pixel circuit. 1.2.1 Voltage-Driven Pixel Circuit TFT-based electrical circuit is the main stream of LCD driving circuit, and exhibits good performance. Hence, it is straight-forward to implement the same structure, two-TFT voltage-driven circuit, in OLED panel as shown in Fig. 1-1, [2]. The gate of switching TFT (T1) is connected to VSCAN line, and the VDATA driver supply data to the source of T1 in each pixel circuit. After VDATA has been written to the pixel, the VSCAN is switched to low and the voltage stored in CST. However, the two-TFTs circuit in OLED panel causes serious problems: threshold voltage (VTH) and mobility (µFE) variations due to the process- and aging-induced the variation of the TFT characteristics. The direct influences of the increasing VTH and decreasing µFE are a decreasing OLED driver current for the same input data voltage leading to 2.

(14) the non-uniformity in brightness of the whole display area shown in Fig. 1-2(a) [9]. Hence, the compensating circuits should be inserted to maintain a constant current passing through the OLED.. Fig. 1-1.. Conventional voltage-driven pixel circuit for AMOLED display.. Fig. 1-2.. (a) (b) Comparison of luminance uniformity of (a) voltage programming with (b) current programming.. 1.2.2 Current-Driven Pixel Circuit Current driving schemes with four-TFT a-Si AMOLED pixel circuit with three control lines shown in Fig. 1-3, was proposed by He et al. [10-11]. A current programmed pixel circuit with self-adjusted voltage source not only provides a continuous excitation to OLED, but also compensates ∆VTH to improve the brightness uniformity as shown in Fig. 1-2(b). However, a large timing delay is observed at a low 3.

(15) programming data current inasmuch as the interaction between the high OLED efficiency and charging of a large interconnect parasitic capacitance. For example, a current of 70 nA is sufficient to achieve luminance of 100 cd/m2 when the efficiency of OLED is 20 cd/A or higher, but charging the interconnect parasitic capacitance of about 10 pF to the sufficient voltage level needs more than 150 µs. This charging time is much longer than the typical frame time (30 µs) for a display with VGA (640*RGB*80) resolution operated at 60 Hz. Thus, the current driving method causes serious data programming error and still has much room to improve.. VCTRL. VSCAN. Vdd. IDATA. T3 T1 C1 T2. T4 OLED. Fig. 1-3.. Schematic diagram of conventional current-driven pixel circuit for AMOLED display.. 1.3 Motivation and Objective of This Thesis As the abovementioned discussion on active matrix pixel circuits, since the OLED is a current driven device, the pixel circuit needs not only to ensure the matching of current during addressing and non-addressing state but also to compensate the variations in OLED and TFT characteristics such as threshold voltage variations, aging effects, and etc. 4.

(16) Although a-Si:H TFT technology can reduce manufacturing cost, equipment investment and posses TFT uniformity, poor carrier mobility and larger threshold voltage shift are the main issues. To resolve these problems, various techniques have been proposed in both voltage and current driven pixel circuits [12-16] using a-Si:H TFTs. In these cases, the current-driven scheme can effectively achieve uniform brightness so that it is suitable for high resolution and large size AMOLED displays. However, in the current-driven mode, low programming data current will induce serious data programming error for high resolution and large sizes displays. Therefore, in this thesis an adjustable current scaling pixel circuit for the a-Si:H TFT is proposed and demonstrated to improve programming time delay. 1.4 Organization of This Thesis This thesis is organized as follows. The principles and the features of adaptive current scaling pixel circuit will be presented in Chapter 2. In Chapter 3, the simulation results including TFT parameter extraction, the variation of current scaling ratio with different the ratio of storage capacitance and evaluation of programming time will be discussed. In Chapter 4, the inversed-staggered back-channel-etch a-Si:H TFT and OLED device fabrication process will be introduced, respectively. Besides, the measurement equipments used to evaluate electrical properties of adaptive current scaling pixel circuit and visual performance of active matrix OLED device are illustrated. In Chapter 5, according to the experimental results, several parameters in fabrication process are discussed, and then the designed structure will be realized and modified. The conclusion of the dissertation and the future work are given in Chapter 6.. 5.

(17) Chapter 2 Principle Due to the technical challenge for the current-driven pixel circuit for AMOLED displays, the current-mirror type based on current-driven pixel circuit with current scaling function [17-18] that rudimentarily solves programming time delay by using high programming data current to display low gray level images will be described. However, to achieve a large current scaling ratio, the TFT geometric sizes are necessary enlarging resulted in low aperture ratio. Hence, a modified current-driven pixel circuit based on a-Si:H TFT technology with current scaling function which can enhance the data programming speed is proposed. The operation of the proposed pixel circuit and the method of current scaled down will be presented in details as well. 2.1 Why Current Scaling Function The main issue of current-driven pixel circuit in applications for matrix array in pixels display is the long resistance-capacitance (RC) delay, which is proportional to the size and resolution of display panel. A large RC delay will cause cross-talk, flicker effects, and even more serious data programming error due to the insufficient pixel charging across the large display area. The total programming time (TPROG) [19] is defined as the sum of the RC delay time of scan line (TRC-SCAN) and data programming time of data line (TDATA) in the following equation : TPROG = TRC − SCAN + TDATA ,. (2-1). where TRC-SCAN and TDATA can be estimated by the following equation: TRC −SCAN = ( N H RPIXEL )( N H CPIXEL ) = 6. R□C□ H 2 + N H COV R□ H , Z. (2-2).

(18) where RPIXEL, CPIXEL, H, NH, C□, R□, Z and COV denote the pixel resistance of bus line, pixel capacitance of bus line, display width, horizontal resolution, capacitance per meter square, sheet resistance, pixel pitch to bus line width ratio, and TFT gate-to-drain/source overlap capacitance. TDATA =. V DATA (C DATA + C ST ) , I DATA. (2-3). where IDATA, CDATA, CST, and VDATA denote the programming data current, data line capacitance, storage capacitance and the voltage of CST. Due to the CST was much smaller than CDATA, it could be neglected to simplify the calculation. Hence, TDATA was rewritten as: TDATA ≅. V DATA ⋅ N V ⋅ C □ , R SCALE ⋅ J OLED ⋅ Z 2. (2-4). I DATA , I OLED. (2-5). R SCALE =. J OLED =. CnCEπL , CVη. (2-6). where NV, RSCALE and JOLED denote the vertical resolution of display, current scaling ratio and the current density of OLED device. IOLED is the OLED driving current. The Cn, CE, and CV depend on the refractive index and the emission spectrum of the OLED material. L is the OLED luminance and η is device quantum efficiency. Based on Eq. 2-1 to 2-6, the total programming time can be effectively shortened by large RSCALE in the condition of the same materials, panel size and resolution. Hence, the combination of current-driven pixel circuit and current scaling function is expected to be widely adopted by the applications in high resolution and large size AMOLED display. 7.

(19) 2.2 Current-Mirror Pixel Circuit The current-mirror pixel circuit can achieve current scaling function by enlarging the geometric size of TFTs. The architecture and driving method can be described as follows. The current-mirror pixel circuit consists of a driving TFT (T4), three switching TFTs (T1, T2, and T3), and one capacitor (C1) shown in Fig. 2-1. The operation of the pixel circuit is controlled by the three external terminals (VSCAN, IDATA, and Vdd) and the ground. The signals of VSCAN and IDATA are supplied by external drivers while the cathode of OLED is connected to the drain electrode of T4. There are two states for the pixel circuit: addressing state and non-addressing state, which will be described as follows.. IDATA. Vdd C1. T1. IOLED. VSCAN T2 T3. Fig. 2-1.. OLED. T4. Schematic diagram of conventional current-mirror pixel circuit.. 2.2.1 Addressing State During the period of the addressing state, T1 and T2 are turned on by the VSCAN. Then, the programming data current (IDATA) passing through T1 and T3 to the ground determines the gate voltage of T3 by the following equation: 8.

(20) I DATA =. W 1 µ FE COX 3 (VGS 3 − VTH 3 )2 , L3 2. (2-7). where µFE, COX, W3, L3, VGS4 and VTH3 denote the field-effect mobility, oxide capacitance, channel width, length, the gate-source voltage and threshold voltage of T3, respectively. T3’s drain voltage is equal to its gate voltage in the deep saturation operation (VDS > VGS-VTH) to sustain the current. In addition, the gate electrode of T4 is connected to the gate electrode of T3, and the gate voltage of T4 is equal to that of T3. Once the gate voltage of T4 becomes higher than the threshold voltage of T4, T4 will be turned on. In other words, the gate voltage of T3 determines T4 to turn on or turn off. Moreover, Vdd is larger than the gate voltage of T4 so that T4 is also operated in the deep saturation region. The driving current (IOLED) passing through Vdd, OLED, and T4 to the ground is determined by:. I OLED =. 1 W µ FE C OX 4 (VGS 4 − VTH 4 )2 , 2 L4. (2-8). where W4, L4, VGS4 and VTH4 denote the channel width, length, the gate-source voltage and threshold voltage of T4, respectively. The voltage difference between Vdd and VGS4 is stored in the storage capacitor (C1) at the same time. 2.2.2 Non-Addressing State When the operation switches from the addressing state to the non-addressing state, the T1 and T2 will be turned off due to VSCAN changing from high voltage to ground. The storage capacitor will be discharged to maintain the same IOLED passing through OLED and T4 during the non-addressing state. Since the threshold voltage of T3 is still equal to that of T4, and the VGS3 and VGS4 are the same, the relation between IDATA and IOLED can be written as:. I OLED =. W4 I DATA . W3. (2-9). From Eq. 2-9, when W4 is fixed, IOLED can be scaled down by increasing W3. The scaled down ratio, RSCALE, is defined as: 9.

(21) RSCALE =. I DATA W3 = . I OLED W4. (2-10). Since the RSCALE and W3/W4 are identical, both low IOLED and large RSCALE can be obtained by increasing the ratio of W3/W4 as the IDATA is fixed. Hence, the large programming data current is utilized to display low gray level pixel so as to shorten the charging time. To improve the charging time effectively, the large geometric ratio of W3 to W4 is needed so that the geometric ratio will decrease the pixel aperture ratio while leaving the current scaling ratio fixed. Consequently, the current scaling ratio of current-mirror pixel circuit can not be effectively used when the display resolution increases. 2.3 Design of Adaptive Current Scaling Pixel Circuit From the above discussions, we can conclude that although current-mirror pixel circuit is capable of improving the charging time, the large geometric size of TFTs causes low aperture ratio. In order to resolve this problem, this section introduces the architecture and driving methods of a novel current-driven pixel circuit based on the a-Si:H TFT technology. The adaptive current scaling circuit consists of a driving TFT (T3), three switching TFTs (T1, T2, and T4) and two storage capacitors (C1 and C2), connected between a scan line and ground with a cascaded structure, as shown in Fig. 2-2. The operation of the circuit is controlled by the ground and four external terminals: VSCAN1. VSCAN2, IDATA, and Vdd. The signals of VSCAN1, VSCAN2, and IDATA are supplied by external drivers while the cathode of OLED is connected to the ground. The operation of this pixel circuit is divided into two states: addressing and non-addressing states which are described as follows.. 10.

(22) Fig. 2-2.. Schematic diagram of adaptive current scaling pixel circuit for AMOLED display.. 2.3.1 The Operation of Addressing State During the period of the addressing state, T1 and T2 are turned on by VSCAN1 and T4 is turned off by VSCAN2. After that, IDATA will pass through T1 and T3 to the OLED device, while a small portion of IDATA also passed through T2 to node B. Then, the drain voltage of T3 (node A) and node B are determined. The equivalent circuit diagram of the addressing state is shown in Fig. 2-3, where T1 and T2 are modeled by the turn-on resistance RT1 and RT2, respectively. Since the RT1 is almost equal to RT2, node A and node B are at the same potential, and T3 operates in the saturation region, accordingly. Meanwhile, the current passing through the OLED device in the addressing state, IOLED_ON, is equal to IDATA, which also determines the voltages of node A and B. If the variation of threshold voltage of T3 is smaller than the amplitude of VSCAN1, the gate voltage of T3, VB-ON, can be adjusted accordingly to ensure constant IDATA in the addressing state. In other words, VB-ON is self-adjustable to. 11.

(23) maintain the same stable value of IDATA regardless of threshold voltage variation resulted from the a-Si:H TFT process.. I DATA. VSCAN2 T4. VSCAN1. T1. A C2. T2. T3 B. Fig. 2-3.. C1 OLED. The equivalent circuit diagram of the addressing state.. 2.3.2 The Operation of Non-Addressing State During the transition from addressing state to non-addressing state, VSCAN1 changes from high to low and then turns off T1 and T2. At the same time, T4 is turned on by VSCAN2 and then the drain electrode of T3 is connected to Vdd to ensure that T3 operates in the saturation region. After that, the current, IOLED_OFF, will pass through T4 and T3 to the OLED device. The equivalent circuit diagram of the non-addressing state is shown in Fig. 2-4, where RT4 represents the turn-on resistance of T4. The voltage at node B drops because of the feed-through effect on the cascaded structure of C1 and C2. The dropped voltage is derived from the charged conversation theory and given by Eq. 2-11. The lower gate voltage of T3 (VB-OFF) is kept on C1 and C2 to maintain T3 turned-on during this period.. VB −OFF = VB −ON − ∆VSCAN 1. (C 2 || COV −T 2 ) . C1 + (C 2 || COV −T 2 ). (2-11). In Eq. 2-11, ∆VSCAN1 is the voltage difference of VSCAN1 between addressing-state and non-addressing-state, and COV-T2 is the gate-to-source/drain overlap capacitance of T2. 12.

(24) I DATA. Vdd. VSCAN2 T4 T1. A. A. C2 T2. T3. C2. B C1 OLED. Fig. 2-4.. B C1. T3. IOLED_OFF. VSCAN1. RT4. OLED. The equivalent circuit diagram of the non-addressing state.. Since the gate voltage of T3 decreases from VB-ON to VB-OFF, the driving current (IOLED_OFF) is scaled down, which can be represented by the current scaling ratio,. RSCALE, defined as:. RSCALE =. I DATA _ ON I OLED _ OFF. .. (2-12). The quantity of voltage drop shown in Eq. 2-11 is proportional to ∆VSCAN1(C2||COV-T2)/[C1+(C2||COV-T2)] and leads to a small IOLED_OFF. Namely, RSCALE is related to the size of C1, C2, COV-T2 and ∆VSCAN1. Since the small geometric size is adequate for T2, a small COV-T2 which is connected to the C2 in parallel can be regarded as a portion of C2. Therefore the adaptive RSCALE can be achieved by tuning the ratio of the two cascaded capacitors. Consequently, when a very large programming data current IDATA is used to charge the pixel electrode and to shorten the pixel programming time, a small driving current IOLED_OFF can be achieved for low gray scales at the same time.. 13.

(25) 2.4 Summary Compared with the current-mirror pixel circuit, the proposed adaptive current scaling pixel circuit has a distinguished capability of shortening programming time delay especially in the low gray levels condition. The current scaling ratio can be achieved by inserting a small storage capacitor to form a cascaded capacitors structure instead of increasing the geometric size of TFTs. The RSCALE is adjusted by tuning the ratio of the two cascaded capacitors without sacrificing the pixel aperture ratio. In the following chapter, software simulation will be utilized to evaluate the performance so that the adaptive current scaling pixel circuit can be realized in the AMOLED applications.. 14.

(26) Chapter 3 Simulated Results and Discussions Based on the principle described in Chapter 2, simulation was performed to rudimentarily confirm the features of the adaptive current scaling pixel circuit in the first place as a guide to fabrication. 3.1 Simulation Premise The a-Si:H TFT model was constructed to simulate the current scaling ratio of an adaptive pixel circuit by Synopsis H-SPICE, Rensselaer Polytechnic Institute (RPI). In the beginning, several parameters shown in Fig. 3-1 should be tuned to make this simulated I-V curve in agreement with the measured one of the fabricated sample. According to the results, while the simulated parameters are set as Table 3-1, the simulated I-V curve fits the experimental data shown in Fig. 3-2. Hence, the following simulations on current scaling ratio and programming time delay will be performed in accordance to these parameters.. -4. -4. 10. 10. Measurement Simulation. -5. 10. -6. IDrain (A). -7. 10. -8. 10. -9. 10. -6. ti=410nm. 10. W/L=20/4 VDrain=15 V. 10. -7. IDrain (A). 10. Measurement Simulation. -5. 10. -10. 10. -8. 10. ti=410nm W/L=50/4 VDrain=15 V. -9. 10. -10. -11. 10. -12. 10. -13. 10. 10. -11. 10. -12. 10. -13. 10. -10. 0. 10. 20. -10. 30. VGate (V). 0. 10. VGate (V). (a). (b) 15. 20. 30.

(27) -4. 10. Measurement Simulation. -5. 10. -7. 10. -8. 10. -6. 10. W/L=100/4 VDrain=15 V. -7. 10. -8. 10. ti=410nm W/L=150/4 VDrain=15 V. -9. 10. -9. 10. -10. -10. 10. -11. 10. 10. -11. 10. -12. 10. -12. 10. -13. 10. -10. 0. 10. 20. -10. 30. 0. VGate (V). 10. 20. 30. VGate (V). (c). (d). Fig. 3-1. Comparison of IDrain as a function of VGate among measurement and simulation results for a-Si:H TFT devices at various channel width (W) (a) 20, (b) 50, (c) 100 and (d) 150 µm while channel length (L), dielectric thickness (ti) and VDrain were 4 µm, 410 nm and 15 V, respectively.. Measurement Simulation. 2. 10. 1. 10. 4. 1.0x10. Green OLED 2 Area 8.41 mm. 0. 10. 3. 5.0x10 -1. 10. Luminecent (cd/m2). Current density (mA/cm2). IDrain (A). 10. -5. 10. ti=410nm IDrain (A). -6. Measurement Simulation. -4. 10. -2. 10. 0.0. 2. 4. 6. 8. 10. 12. 14. 16. 18. VOLED (V). Fig. 3-2. OLED current density and brightness variation with supplied voltages. 16.

(28) Table 3-1. The parameters used in proposed pixel circuit simulation. Device parameters a. b. W /L (T1, T3) W/L (T2) W/L (T4) VTH µFE C1 C2. (µm) (µm) (µm) (V) 2 (cm /V-sec) (pF) (fF). 50/4 30/4 40/4 1.65 0.52 2.5 208 ~ 625. Supplied signals. VSCAN1 VSCAN2 Vdd IDATA. (V) (V) (V). 0~30 0~30 30. (µA). 0.2 ~ 10. Time. tON tOFF a b. (ms) (ms). 0.33 33. channel width of TFT channel length of TFT. 3.2 Simulation Results and Discussion 3.2.1 Current Scaling Ratio The proposed current scaling pixel circuit in accordance with the parameters in Table 3-1 is evaluated by the H-SPICE simulation tool and results are shown in Fig. 3-3. In the case of C2/C1 = 1/6, the simulation results are listed in the Table 3-2. It is worth noticing that the appropriate voltages are applied on nodes A and B to ensure. IDATA of 1 µA through the OLED device. In ideal case, VA is equal to VB; however, in practice, VB is larger than VA because IDATA through T1 causes a voltage drop between drain and source electrodes of T1. In addition, the voltage drop of VB results in the decreased IOLED from 1 (= IOLED_ON) to 0.07 µA (= IONED_OFF). Therefore, the current scaling function is achieved and the current scaling ratio, RSCALE = IOLED_ON /IONED_OFF, 17.

(29) is equal to 14.2 so that the programming time can be shortened to 1/14 times than conventional current-driven pixel circuit.. VSCAN1(V). 30 15 0 30 15 0. VSCAN2(V). Vdd (V). 33 30 27 30 15 0 10 5 0. VA(V). 9.6 26.1. VB(V). 1.0 0.5 0.0. 4.2 10.1. IOLED(µA) 0.07. 1.0 0. Fig. 3-3.. Non-addressing state. Addressing state. 125. 250. 375. Time (µs). 500. 625. 750. The simulation waveform of proposed pixel circuit.. Table 3-2. Simulation results of proposed pixel circuit in the Fig. 3-3 Addressing State. Non-Addressing State. VSCAN1. (V). 30. 0. VSCAN2. (V). 0. 30. Vdd. (V). 30. 30. VA. (V). 9.6. 26.1. VB. (V). 10.1. 4.2. IDATA. (µA). 1.0. 0.07. 18.

(30) From Fig. 3-3, the current scaling function has been obtained; however, the variation of RSCALE with IDATA and C2/C1 shall be taken into consideration owing to its critical impact on the performance of a proposed pixel circuit. The dependence of RSCALE on the data current as shown in Fig. 3-4 reveals that RSCALE increases as IDATA decreases and RSCALE is adjustable. RSCALE is larger at lower IDATA because larger data current through T3 leads to the larger VB-ON. The voltage drop. ∆ VSCAN 1. (C 2 || C OV −T 2 ) C1 + (C 2 || C OV −T 2 ). is relatively smaller than VB-ON so that the OLED driving current drop is also slight. In other words, the lower IDATA at lower gray level, the larger OLED driving current drop can be attained. On the other hand, according to Eq. 2-11, the larger ratio of C2/C1 yields the larger voltage drop of VB from addressing state to non-addressing state. Signifying the lower VB-OFF can bring out the possibly lower IOLED_OFF and the higher. RSCALE. By fitting the simulation result, the function of fitting curves in the different ratio of C2/C1 can be described as follows: (1) C2/C1 = 1/4 Y = 8.7524X -3.7118. ,between in. 0.2 ≤ X ≤ 0.5. (3-1.1). Y = 15.957X -2.6356 ,between in. 0.5 < X ≤ 1.0. (3-1.2). Y = 7.6333X -0.6779 ,between in. 1.0 < X ≤ 10.0. (3-1.3). Y = 1.3779X -1.7890 ,between in. 0.2 ≤ X ≤ 0.5. (3-2.1). Y = 2.6612X -0.8277 ,between in. 0.5 < X ≤ 1.0. (3-2.2). Y = 2.1509X -0.2177 ,between in. 1.0 < X ≤ 10.0. (3-2.3). Y = 1.0657X -1.1202 ,between in. 0.2 ≤ X ≤ 0.5. (3-3.1). (2) C2/C1 = 1/8. (3) C2/C1 = 1/12. 19.

(31) Y = 1.7154X -0.4491 ,between in. 0.5 < X ≤ 1.0. (3-3.2). Y = 1.4934X -0.0899 ,between in. 1.0 < X ≤ 10.0. (3-3.3). where X and Y denote the programming data current and current scaling ratio. Since. RSCALE increases greatly with decreasing IDATA, the function of fitting curve is divided into three regions to match simulation accurately. According to these functions at different ratio of C2/C1, the adaptive current scaling can be evaluated to meet the display requirements. Moreover, when IDATA is fixed, the increasing rate of RSCALE increases as C2/C1 increases from 1/12 to 1/4. In addition, when the sum of all storage capacitor sizes in the proposed pixel circuit is the same as that in a traditional current-driven pixel circuit, the aperture ratio is identical while tuning the ratio of. C2/C1. In brief, large RSCALE is achieved at low gray levels and low RSCALE is obtained at high gray levels. Hence, an adaptive current scaling ratio is achieved by tuning the ratio of C2/C1 without sacrificing aperture ratio.. Simulation. Fitting curve. RSCALE. (a) C2/C1=1/4. 10. 3. 10. 2. 10. 1. 10. 0. (c) C2/C1=1/12. 0.1. Fig. 3-4.. (b) C2/C1=1/8. RSCALE =. 1. IDATA (µA). IOLED_ ON IOLED_ OFF. 10. Comparison of RSCALE as function of IDATA among simulation and fitting cutting curve at various C2/C1 (a) 1/4, (b) 1/8 and (c) 1/12 in the proposed. 20.

(32) pixel circuit shown in Fig. 2-2. The current scaling function is implemented to reduce the programmed current from addressing state to non-addressing state. Since IOLED_ON (=IDATA) is larger than. IOLED_OFF by a factor of RSCALE, the average OLED current (IAVG) for the pixel circuit is. I AVG =. I OLED. _ ON. t ON + I OLED t ON + t OFF. _ OFF. t OFF. ,. (3-4). where tON and tOFF denote the addressing and non-addressing state periods during the frame time, respectively. Meanwhile, the IAVE can also be rewritten by Eq. 2-12 as :. ⎡R t + t OFF ⎤ I AVG = I OLED _ OFF ⎢ SCALE ON ⎥. t t + ON OFF ⎦ ⎣. (3-5). Evidently adjusting IOLED_OFF and RSCALE controls IAVE to achieve different gray levels for display. Subsequently, tON of 0.33 ms and tOFF of 33 ms are adopted to calculate the variation of OLED current during a frame time as shown in Fig. 3-5. For the addressing state, both conventional current-driven pixel circuit and proposed one provide the IOLED_ON identical to IDATA because the current is directly supplied by external driver shown in Fig. 3-5(a). However, for the non-addressing state, the proposed pixel circuit reveals the lower current than the conventional one does whose. IOLED_OFF is equivalent to IOLED_ON as shown in Fig. 3-5(b). In addition, the larger ratio of C2/C1 always yields more rapid decrease in IOLED_OFF. Moreover, tON is much longer than tOFF, the small IOLED_OFF in the non-addressing state can further reduce the. IAVG even if the IOLED_ON is large. According to Eq. 3-4, the IAVG is dependent on IDATA with different ratio of C2/C1 in one frame period as shown in Fig. 3-5(c). At the ratio of C2/C1 =1/4, the proposed pixel circuit can generate the IAVG ranging from 2 nA to 5 µA while IDATA is changed between 0.2 and 10 µA. By contrast, the IAVG of the conventional pixel circuit is almost equal to IDATA, implying that there is no current scaling function. From applying these abovementioned results, it is evident that 21.

(33) proposed pixel circuit in address state can provide larger IDATA than IAVE without increasing the a-Si:H TFTs geometric size. Hence, a large RSCALE can be achieved by inserting a small storage capacitor (C2) to form a cascaded structure of storage capacitors and a high IDATA can be used to accelerate the programming time in the addressing state accordingly.. 1. IOLED_ON (µA). 10. 0. 10. IOLED_ON of both the proposed. -1. and conventional pixel circuts are identical to IDATA. 10. 0.1. 1. IDATA (µA). 10. (a) 1. 10. 0. IOLED_OFF (µA). 10. -1. 10. -2. Current-driven pixel. 10. Proposed pixel C2/C1=1/4 C2/C1=1/8 C2/C1=1/12. -3. 10. -4. 10. 0.1. 1. IDATA (µA). (b). 22. 10.

(34) 1. 10. 0. IAVG (µA). 10. 10. -1. 10. -2. 10. -3. Current-driven pixel Proposed pixel C2/C1=1/4 C2/C1=1/8 C2/C1=1/12. 0.1. 1. IDATA (µA). 10. (c) Fig. 3-5.. Comparison of (a) IOLED_ON, (b) IOLED_OFF and (c) IAVG as a function of IDATA among current-driven pixel shown in Fig. 1-1 and proposed pixel shown in Fig. 2-2 at various C2/C1 ratio during one frame period while tON = 0.33 ms and tOFF = 33 ms.. Going a step further, compared to the current-mirror circuit which can only provide a constant RSCALE, the proposed pixel circuit is obviously more outstanding because of the adjustable RSCALE and large aperture ratio. The IAVG as a function of. IDATA is shown in Fig. 3-6. The proposed pixel circuit achieves the wider range of IAVG from 2 nA to 5 µA compared with the current-mirror pixel (0.05 to 2.8 µA). Meanwhile, the RSCALE is adjusted by the IDATA. However, the current–mirror pixel circuit is able to scale down IDATA, RSCALE is constant in the whole range of IDATA. In addition, to achieve larger RSCALE requires a larger driving TFT in current-mirror pixel circuit and results in lower aperture ratio. Hence, not only high IDATA and large RSCALE for the low gray levels that can shorten programming time but also reasonable IDATA for high gray levels that can avoid large display power consumption can be obtained 23.

(35) concomitantly in proposed pixel circuit without sacrificing aperture ratio.. 1. 10. 0. IAVG (µA). 10. Current-mirror pixel T3/T4=4/1 Proposed pixel C2/C1=1/4. -1. 10. -2. 10. -3. 10. 0.1. 1. IDATA (µA). 10. Fig. 3-6. Comparison of IAVG as a function of IDATA among current-mirror pixel shown in Fig. 2-1 and proposed pixel shown in Fig. 2-2 at tON = 0.33 ms and tOFF = 33 ms.. 3.2.2 Programming Time As discussed in chapter 2, the current scaling function can effectively shorten programming time. In the section, the total programming time (TPROG) is calculated based on Eq. 2-1 to Eq. 2-6 and the parameters are listed in the Table 3-3. The TPROG as a function of display size is shown in Fig. 3-7. Without current scaling function (RSCALE = 1), a XGA display requires TPROG of 89 ~ 90 µs to charge up the conventional current-driven pixel circuit which is four times longer than the scan pulse width (TSCAN) of 21.7 µs at 60 Hz frame rate. Therefore, conventional current-driven pixel circuit is inapplicable for a large size and a high resolution display. In contrast, the current-driven pixel circuit with current scaling function (RSCALE = 20) can reduce the TPROG effectively. Furthermore, as display resolution 24.

(36) increases to UXGA, the TPROG is 7 ~ 8 µs which is lower than TSCAN of 10 µs even for display diagonal of 40 inch. Hence, the proposed pixel circuit with cascaded structure of storage capacitors and build-in current scaling capability can allow the realization of a high resolution and large size current-driven AMOLED display.. (a) XGA RSCALE=1. (c) XGA RSCALE=20. (b) XGA RSCALE=4. (d) UXGA RSCALE=20. TPROG (us). 100. 10. 1 0. 10. 20. 30. 40. Display diagonal (in.). Fig. 3-7.. TPROG as a function of display diagonal with a scan line made from Cu at (a) XGA RSCALE = 1, (b) XGA RSCALE = 4, (c) XGA RSCALE = 20 and (d) UXGA. RSCALE = 20.. 25.

(37) Table 3-3.. The parameters including TFT materials and OLED device for calculating total programming time. OLED device. TFT material. VDATA. (V). 5. C□. (µF/m2). 150. CE. (V-1). 0.44. R□. (Ω/sqr). 0.075. CV. (lm/W). 427. COV. (nF/m). 0.2. L. (cd/m2). 100. Cn η. 1.1 (%). 5. ps : Z = 30. 3.3 Summary We have designed an adaptive current scaling pixel circuit with a-Si:H TFT technology for shortening programming time delay without sacrificing aperture ratio. From the calculation of the total programming time, we can infer that the proposed pixel circuit has an outstanding ability to improve programming time delay even though the resolution and display size are more than 1600*1200 and 40 inch, respectively. In addition, the adaptation rate of RSCALE can be adjusted by tuning the ratio of the two cascaded capacitors without sacrificing pixel aperture ratio. In comparison with conventional current-driven and the current-mirror pixel circuits, the widest range of IAVG from 2 nA to 5 µA for IDATA ranging from 0.1 to 10 µA can be achieved by the proposed adaptive current scaling pixel circuit. As a result, both the current scaling function and the reasonable power consumption can be easily accomplished.. 26.

(38) Chapter 4 Fabrication and Measurement Instruments 4.1 a-Si:H TFT Fabrication Process In this section, a prototype to characterize the features of the current scaling pixel structure is fabricated by the standard processes of a conventional inversed-staggered back-channel-etch a-Si:H TFT technologies. Typical process flow for inversed-staggered back-channel-etch a-Si:H TFT [Fig. 4-1] 1.. Gate metal deposition on the glass substrate by sputtering method.. 2.. Mask #1 : TFT gate electrodes formation, Fig. 4-1(a).. 3.. Deposition of gate dielectric layer, Fig. 4-1(b).. 4.. Sequential deposition of a-Si:H and n+ a-Si:H layers are formed by Plasma Enhanced Chemical Vapor Deposition (PECVD), Fig. 4-1(c).. 5.. Mask #2 : active island definition, Fig. 4-1(d).. 6.. Source/Drain metal deposition by sputtering method.. 7.. Mask #3 : Source/Drain electrodes definition, Fig. 4-1(e).. 8.. n+ a-Si:H back-channel-etch by the dry etching process, Fig. 4-1(f).. 9.. Deposition of SiNx layer.. 10. Mask #4: Indium-tin-oxide (ITO) electrode contact hole definition, Fig. 4-1(g). 11. Deposition of ITO layer. 12. Mask #5: ITO electrode definition, Fig. 4-1(h).. 27.

(39) (a). (b). (c). (d). (e). (f). (g) (h) Fig. 4-1. Process flow for inversed-staggered back-channel-etch a-Si:H TFT. 4.2 Organic Light Emitting Diode Fabrication Process After the fabrication of the current scaling pixel circuit, an OLED device is deposited onto the TFT backplane to demonstrate the unique performance of the current scaling pixel circuit. The well-known structure of bottom-emission OLED device, ITO / CuPc / NPB / Alq3 / LiF / Al, is chosen because of its advantages such as high efficiency and stability. All of the device architectures and material structures are shown in Fig. 4-2. These small molecule layers are deposited sequentially by a vacuum evaporation process in a chamber to form several parallel thin films which 28.

(40) are important for the lifetime of the device as shown in Fig. 4-3.. N O. O N. Al O. N. N. N. Alq3. NPB. N N N. N. N. Cu. N. N. N. CuPc. Fig. 4-2.. The schematic architecture and molecular structures of bottom-emission OLED device.. Fig. 4-3.. Thermal coater system for OLED fabrication.. 4.3 Measurement System After fabricating the current scaling pixel circuit and an OLED device, the 29.

(41) experiments were conducted to confirm that the fabricated sample performs in agreement with the original design. The instruments including electrical properties analysis system, testing circuitry system and ConoScope will be introduced in the following subsections. 4.3.1. Electrical Properties Analysis System The electrical property analysis system mainly consists of Agilent 4156A. semiconductor analyzer and 41501B pulse generator as shown in Fig. 4-4. An Agilent 4156A semiconductor analyzer with a probe station is used to analyze the electrical properties of a circuit such as I-V measurement or bias-temperature-stress (BTS). The ground probe station is furnished with an electrically isolated, water-cooled thermal plate within an optical shielding box. The plate can be controlled by Temptronic TPO315A thermal controller between 25°C and 300°C. The source measurement units (SMUs) are used to control voltage sources where current flowing through can be measured. The voltage or current sources supplied by Agilent 4156A semiconductor analyzer can be transmitted through SMU to the pixel circuit and the output voltage or current will be detected concomitantly. In addition, the 41501B pulse generator is employed to create wave function signals which Agilent 4156A semiconductor analyzer cannot provide. Consequently, combining Agilent 4156A semiconductor analyzer with 41501B pulse generator can advance the application for electrical property analysis.. 30.

(42) Optical shielding box. Agilent 4156A semiconductor analyzer. Probe station. Water-cooled thermal plate. Fig. 4-4.. 41501B pulse generator. Electrical property analysis system with Agilent 4156A semiconductor analyzer, 41501B pulse generator, and probe station.. 4.3.2. Testing Circuitry Systems The testing circuitry system is composed by a function generator and a. micro-ampere (µA) level power supply to drive the adaptive current scaling pixel AMOLED device. The function generator can generate rectangular, triangular and sine waves with frequency limitation of 2 MHz as shown in Fig. 4-5. Due to the amplitude of signal wave is not high enough to turn on the switching TFT, the adjustable amplifier circuit is necessary to amplify the amplitude to a proper voltage level. After amplifying, the signal passing through buffer and inverse circuits can synchronously produce the non-inverse and inverse signals for the operation of adaptive current scaling pixel AMOLED device. On the other hand, in the µA level power supply there are 24 channels and the resolution of 100 nano-ampere (nA) can be achieved shown in Fig. 4-6. By using the variable resistor, the output current can be adjusted from 1 uA to 1 milli-ampere (mA).. 31.

(43) Fig. 4-5.. The GFG-8020H function generator.. Fig. 4-6.. The micro-ampere level power supply.. 4.3.3. ConoScope The ConoScope is used for visual performance evaluation such as luminance,. contrast ratio, color shift, gray scale and so on shown in Fig. 4-7. In principle, the light from the test area will be focused by a set of lenses so that all beams emerging from the sample in the same direction will meet in one spot in the so called focal plane. Hence, all parallel beams can be projected on one spot in the focal plane by the ConoScope lens. The resulting figure is called the "conoscopic figure". It represents that each spot on the focal plane corresponds to one specific direction of the viewing cone. The conoscopic figure directly shows color and luminance as they would have been plotted in a polar coordinate system shown in Fig. 4-8.. 32.

(44) Fig. 4-7.. The visual performance evaluation system of ConoScope instrument.. The conoscopic figure as a result of the interfering light beams for all propagations. All parallel rays forming one spot in the focal plane. Sample. Fig. 4-8.. Conoscopic lens. Measurement spot. Illustrations of ConoScope detector.. 33.

(45) Chapter 5 Experimental Results and Discussions After simulation and fabrication, the experiments were implemented to examine the calculation. In this chapter, the electrical characteristics and reliability among conventional current-driven, current-mirror and adaptive current scaling pixel circuits were compared and the feature was characterized by optical microscope shown in Fig. 5-1. Besides, OLED materials were deposited onto the a:Si:H TFT panel to form single pixel AMOLED devices so as to analyze the visual performance.. (a). 34.

(46) (b). (c) Fig. 5-1. A photograph of (a) current-driven, (b) current-mirror and (c) adaptive current scaling pixel circuits fabricated by a-Si:H TFT technologies.. 5.1. Electrical Characteristics. 5.1.1. Current Scaling Ratio. As the discussed simulation results in Chapter 3, the proposed adaptive current scaling pixel circuit revealed the outstanding current scaling function in comparison with conventional current-driven and current-mirror pixel circuits. Next, we would 35.

(47) measure the pixel circuits with different ratios of cascaded storage capacitors and geometric sizes of TFT to observe the variation of current scaling ratio. First, in the proposed pixel circuit, the device parameters and measurement conditions were listed in Table 5-1 and Table 5-2. The RSCALE as a function of IDATA at various ratio of C2/C1 was shown in Fig. 5-2. From the measurement results, when the ratio of C2/C1 was equal to 1/4, the RSCALE increased from 1.8 to 950 as IDATA decreased from 10 to 0.2 µA shown as the dot line in Fig. 5-2. It was clearly indicated that not only the large RSCALE at low gray levels but also low RSCALE at high gray levels were achieved so that the RSCALE was adjusted by input data current. On the other hand, when IDATA was fixed, the larger ratio of C2/C1 yielded larger the increasing rate of. RSCALE. The results were also identical to the above simulation. Hence, an adaptive current scaling pixel circuit was successfully demonstrated.. Table 5-1. The parameters of fabricated device for proposed pixel circuit. Device parameter Wa/Lb (T1). (µm). 50/4. W/L (T2). (µm). 30/4. W/L (T3). (µm). 50/4. W/L (T4). (µm). 40/4. C1. (pF). 2.5. C2. (fF). 208 ~ 625. a. channel width of TFT b channel length of TFT. 36.

(48) Table 5-2. The parameters used in the condition of measurement. Supplied signals. VSCAN1. (V). 0~30. VSCAN2. (V). 0~30. Vdd. (V). 30. IDATA. (µA). 0.2 ~ 10. Frame time. tON. (ms). 0.33. tOFF. (ms). 33. Measurement Simulation (a) C2/C1=1/4 (b) C2/C1=1/8. 3. RSCALE. 10. (c) C2/C1=1/12. RSCALE =. 2. 10. IOLED_ ON IOLED_ OFF. 1. 10. 0. 10. 0.1. 1. IDATA (µA). 10. Fig. 5-2. Comparison of RSCALE as a function of IDATA among measurement and simulation results at various C2/C1 (a) 1/4, (b) 1/8 and (c) 1/12 in proposed pixel circuit shown in Fig. 2-2.. As mentioned before, the current scaling ratio was adjusted by tuning the ratio of. C2/C1. To investigate the variation of current scaling ratio with different geometric 37.

(49) size of TFTs, we would focus on different channel width of T1, T3 and T4 to evaluate. RSCALE variation while T2 was ignored due to the less current passing through T2. In the following case, the channel length of all TFTs, channel width of T2, the capacitance of C1 and C2 were fixed in 4 µm, 30 µm, 2.5 pF and 312 fF, respectively. (1) In the case of T1: The RSCAL was dependent on IDATA with different channel width of T1 shown in Fig. 5-3 (a). With increasing the channel width of T1, the RSCALE was increased as the channel width of T3 and T4 were 50 and 40 µm. Since the turn-on resistance of T1 (RT1) was decreased with increasing the channel width of T1, VB-ON was close to VA resulted in the lower VB-ON was. Based on Eq. 2-11, the lower VB-ON would cause significant decrease of VB-OFF. Therefore, the lower IOLED_OFF was achieved by increasing the channel width of T1. In other words, the larger RSCALE was obtained in the longer channel width of T1. (2) In the case of T3: According to Eq. 2-7, in the constant current passing through driving TFT (T3), the longer channel width of T3 caused the lower VB-ON. As mentioned of the above case, the lower VB-ON would result in larger RSCALE. Hence, in the experimental result, the larger RSCALE was accompanied with the longer channel width of T3 as shown in Fig. 5-3 (b). (3) In the case of T4: When the channel width of T4 increased, the turn-on resistance of T4 (RT4) would decrease. In the non-addressing state, the current passing through T4 caused the voltage drop (VT4) across the T4. When the channel width of T4 was decreased, the low RT4 was obtained so that low VT4 was achieved. Hence, the VA in the non-addressing state was equal to Vdd – VT4. Since T3 operated in the saturation region, if the drain voltage of T3 (VA) was gradually increasing, the IOLED_OFF was 38.

(50) also simultaneously increased due to the kink effect. It would be derived that the influence of kink effect on the longer channel width of T4 was more significant resulted in the larger IOLED_OFF and the measurement result was shown in Fig. 5-3 (c). With the analysis of the above, we could conclude that the current scaling ratio would be adjusted by not only the cascaded storage capacitors but also the channel width of T1, T3 and T4. The longer channel width of T1 and T3 and the shorter channel with of T4 would cause the larger current scaling ratio. Hence, to be optimum current scaling ratio, we should consider both the ratio of cascaded capacitance and the channel width of TFTs.. 10. 2. W T1 = 50 µm W T1 =100 µm. RSCALE. R SCALE = 10. 1. 10. 0. 0.1. 1. IDATA (µA). (a). 39. I O LED_ O N I O LE D_ OFF. 10.

(51) 10. 2. W T3= 50 µm W T3= 100 µm. RSCALE. W T3= 150 µm. RSCALE = 10. 1. 10. 0. 0.1. I O L E D_ O N I O L E D_ O FF. 1. 10. IDATA (µA). (b) 10. 2. W T4 = 20 µm. W T4 = 40 µm. RSCALE. RSC ALE = 10. 1. 10. 0. 0.1. I O L E D_ O N I O L E D_ O FF. 1. 10. IDATA (µA). (c) Fig. 5-3.. The RSCALE as a function of IDATA at various channel width of (a) T1, (b) T3 and (c) T4 in proposed pixel circuit shown in Fig. 2-2.. The purpose of current scaling function was to shorten programming time with. 40.

(52) high programming data current charged the parasitic capacitor and storage capacitor at the low gray levels. The dependence of OLED current with different the ratio of. C2/C1 on IDATA during a frame period was shown in Fig. 5-4 and ensure that tON and tOFF were 0.33 and 33 ms in one frame period, respectively. In the addressing state, the IOLED_ON was equal to IDATA no matter the C2/C1 ratio changed from 1/4 to 1/12. During the transition from addressing state to non-addressing state, at IDATA of 0.2 µA, the OLED driving current in the non-addressing state, IOLED_OFF, was scaled down to 0.17, 5 and 20 nA while the ratio of C2/C1 was equal to 1/4, 1/8 and 1/12, respectively. It revealed that the larger ratio of C2/C1 caused significant decrease of IOLED_OFF so that the result corresponded to Eq. 2-9. On the other hand, at IDATA of 10 µA, the. IOLED_OFF was scaled down to 4.8, 6.9 and 8.0 µA while the ratio of C2/C1 was equal to 1/4, 1/8 and 1/12, respectively. It meant that the amount of current drop at lower IDATA was more than that at higher IDATA due to the lower IDATA passed through T3, the lower. VB-ON was. Hence, the voltage drop of. ∆ VSCAN 1 ⋅. C 2 || COV − T 2 C1 + C 2 || COV − T 2. was relatively larger than VB-ON resulted in the larger current drop of IDATA so that the larger RSCALE was obtained at lower gray levels.. 41.

(53) 10. 1. C 2/C 1=1/4, 1/8,1/12. tON = 0.33 ms. IOLED_ON (µA). tOFF = 33 ms. 10. 10. 0. -1. 0.1. 1. IDATA (µ A). 10. IOLED_OFF (µA). (a). 10. 1. 10. 0. 10. -1. 10. -2. 10. -3. 10. -4. C2/C1=1/12 C2/C1=1/8 C2/C1=1/4. 0.1. 1. 10. IDATA (µA) (b) Fig. 5-4.. The (a) IOLED_ON and (b) IOLED_OFF as a function of IDATA at various C2/C1 during a frame period in proposed pixel circuit shown in Fig. 2-2.. 42.

(54) As described in Chapter 3, the conventional current-driven pixel circuit does not have the capability of current scaled down no matter the geometric size of TFTs changed or not. In the experimental results, the parameters of conventional current-driven pixel circuit and measurement condition were listed in Table 5-3 and Table 5-2, respectively. The OLED current of conventional current-driven pixel circuit in the addressing state was the same with Fig. 5-4 (a). When pixel circuit worked in the non-addressing state, the IOLED_OFF was still identical to IDATA regardless of the channel width of driving TFT (T4) increased from 50 to 150 µm shown in Fig. 5-5.. Table 5-3. The parameters of fabricated device for conventional current-driven pixel circuit. Device parameter Wa/Lb (T1). (µm). 100/4. W/L (T2). (µm). 100/4. W/L (T3). (µm). 100/4. W/L (T4). (µm). 50/4~150/4. C1. (pF). 2.5. a. channel width of TFT. b. channel length of TFT. 43.

(55) IOLED_OFF (µΑ) IOLED_OFF (µΑ) IOLED_OFF (µΑ). 10. W T4 = 150 µm. 1 0.1 10 W = 100 µm T4 1 0.1 10 WT4 = 50 µm 1 0.1 0.1. 1. 10. IDATA (µA). Fig. 5-5.. The IOLED_OFF as a function of IDATA during a frame period at various channel width of T4 = 150, 100 and 50 µm in the current-driven pixel circuit shown in Fig. 1-3.. As to conventional current-mirror pixel circuit, the OLED current was dependent on the IDATA with different geometric sizes of T3 during a frame period as shown in Fig. 5-6 and the parameters and measurement condition of current-mirror pixel circuit were listed in Table 5-4 and Table 5-2. In the addressing state, the IOLED as a function of IDATA was shown in Fig. 5-6 (a). Clearly, the ratio of IDATA/IOLED was direct proportion to geometric size ratio of T3/T4. In the case of T3/T4 = 1/2, IOLED enlarged from 0.15 to 5.7 µA while the IDATA increased from 0.2 to 10 µA. In ideal condition, the ratio of IDATA/IOLED was equal to the ratio of T3/T4. However, in this case, the. IOLED was larger than that of ideal condition due to the high Vdd induced kink effect resulted in the increase of IOLED. In the non-addressing state, although the IOLED still kept linear relationship with IDATA, the IOLED in the addressing state was lower than 44.

(56) that in the non-addressing state because of the discharging of storage capacitor resulted in the decreasing of T4 gate voltage.. IOLED (µA). 10. T3/T4 = 4/1 T3/T4 = 2/1 T3/T4 = 1/1. 1. 0.1 0.1. 1. 10. IDATA (µA) (a). IOLED (µA). 10. T3/T4 = 4/1 T3/T4 = 2/1 T3/T4 = 1/1. 1. 0.1. 0.01. 0.1. 1. 10. IDATA (µA). (b) Fig. 5-6.. The IOLED as a function of IDATA in the (a) addressing state and (b) non-addressing state at various T3/T4 = 4/1, 2/1 and 1/1 in a conventional. 45.

(57) current-mirror pixel circuit shown in Fig. 2-1.. Table 5-4. The parameters of fabricated device for current-mirror pixel circuit. Device parameter Wa/Lb (T1). (µm). 100/4. W/L (T2). (µm). 100/4. W/L (T3). (µm). 50/4~200/4. W/L (T4). (µm). 50/4. C1. (pF). 2.5. a. channel width of TFT. b. channel length of TFT. According to Eq. 2-1 to 2-4 and Table 3-3, the comparison of the total programming time among current-driven, current-mirror and proposed pixel circuit was listed in the Table 5-5. Clearly, proposed pixel circuit could be effectively suppressed to 8.4 µs at luminance of 100 cd/m2 XGA display while the conventional current-driven and current-mirror pixel circuits were 90 and 14.6 µs as scan pulse width was 21.7 µs at 60 Hz frame rate. On the other hand, at low gray level such as luminance of 20 cd/m2, the total programming time of proposed pixel circuit was 16.4 µs which was shorter than the scan pulse width of 21.7 µs. Hence, the proposed pixel circuit had a capacity for shortening the programming time.. 46.