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以新穎降電場結構改善低溫多晶矽薄膜電晶體特性之研究

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國 立 交 通 大 學

電 子 工 程 學 系 電 子 研 究 所

碩 士 論 文

以新穎降電場結構改善低溫多晶矽薄膜電

晶體特性之研究

Study on the Novel Drain-Relief Structures in

Low-Temperature Polycrystalline Silicon Thin

Film Transistors to Improve the Device

Characteristics

研 究 生:廖 大 傳

指導教授:鄭 晃 忠 教授

中華民國 九十四 年 七 月

(2)

Study on the Novel Drain-Relief Structures in Low-Temperature

Polycrystalline Silicon Thin Film Transistors to Improve the

Device Characteristics

研 究 生 : 廖大傳 Student : Ta-Chuan Liao

指導教授 : 鄭晃忠 博士 Advisor : Dr. Huang-Chung Cheng

國立交通大學

電子工程學系 電子研究所 碩士論文

A Thesis

Submitted to Department of Electronics Engineering and Institute of Electronics

College of Electrical Engineering and Computer Science National Chiao-Tung University

in Partial Fulfillment of the Requirements for the Degree of Master in

Electronics Engineering July 2005

Hsinchu, Taiwan, Republic of China

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