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A 0.6-V 30 GHz CMOS Quadrature VCO Using Microwave 1:1:1 Trifilar Transformer

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88 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 22, NO. 2, FEBRUARY 2012

A 0.6-V 30 GHz CMOS Quadrature VCO Using

Microwave 1:1:1 Trifilar Transformer

Jin-Siang Syu, Student Member, IEEE, Hsi-Liang Lu, and Chinchun Meng, Member, IEEE

Abstract—A 30 GHz trifilar-transformer-coupled quadrature

voltage-controlled oscillator (QVCO) is proposed in this letter using 0.13 m CMOS technology. The trifilar transformer pro-vides dc decoupling as well as ac mutual coupling from drain, gate, and source nodes. The mutual coupling increases the overall quality factor while the gate/drain-to-source coupling provides quadrature coupling. The proposed 1:1:1 trifilar transformer realization has lower ohmic loss than the conventional trifilar transformer realization and is especially suitable for high-fre-quency applications. As a result, the proposed 30 GHz QVCO has a 195 dBc Hz figure of merit (FOM) and a maximum 41.6 dB sideband rejection (SBR) at a 0.6 V supply.

Index Terms—Quadrature voltage-controlled oscillator (QVCO), sideband rejection (SBR), trifilar transformer.

I. INTRODUCTION

A

QUADRATURE signal generator is the key compo-nent in an RF transceiver, e.g., an / downconverter, a single-sideband upconverter, or a sub-harmonic mixer. A quadrature voltage-controlled oscillator (QVCO) using two identical VCOs with quadrature-phase coupling is a popular method for high-frequency quadrature signal generation. Con-ventionally, a transistor-coupled QVCO includes parallel [1] and series QVCO structures [2], [3]. Unlike the parallel QVCO with a strong trade-off between the phase noise and phase accuracy, both top-series (TS) and bottom-series (BS) QVCO structures can lessen this trade-off. Further, the BS QVCO has better phase noise performance since the resonator phase shift (RPS), which is the phase angle between the current injected into the tank and the tank voltage, equals 0 while the RPS of the TS QVCO is typically 90 [4]. Unfortunately, this cascode configuration is unsuitable for a low-voltage operation. To replace the BS coupling transistors, a passive transformer had been utilized for the quadrature signal generation [5]. The transformer-coupled QVCO can be treated as a modified version of the BS QVCO with better voltage headroom and eliminates the flicker noise of the coupling devices.

In our previous work [6], a trifilar-transformer-coupled QVCO combining both gate-to-drain -enhanced coupling

Manuscript received August 10, 2011; revised October 16, 2011; accepted December 08, 2011. Date of publication January 24, 2012; date of current version February 15, 2012. This work was supported by the National Science Council of Taiwan under Contracts NSC 98-2221-E-009-033-MY3, NSC 99-2221-E-009-049-MY3, and NSC 98-2218-E-009-008-MY3, and by the Ministry of Education (MoE) Aim for the Top University (ATU) Program under Contract 95W803.

The authors are with the Department of Electrical Engineering, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: ccmeng@mail.nctu.edu. tw).

Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/LMWC.2011.2180369

Fig. 1. (a) Schematic of the QVCO using microwave trifilar transformers (b) layout of the 1:1:1 trifilar transformer.

[3] and gate/drain-to-source quadrature-phase coupling [5] was first proposed, as indicated in Fig. 1(a), while the are 1.6/0.5/0.5 nH, are 0.6/0.6/0.4 and at of 6/13/13 GHz for drain/gate/source inductors, respectively. However, in a conventional trifilar trans-former (with a turn ratio of 2:1:1), metal bending and metal crossing for a multi-turn inductor cause additional ohmic loss and degrade the quality factor of the inductor [7]. Further, the radius should be reduced to have proper inductance at high frequencies but the quality factor of the inductor is then degraded [7]. Thus, a newly proposed 1:1:1-turn-ratio layout in this letter is more suitable for high-frequency applications. A 30 GHz CMOS QVCO is thus demonstrated using the 1:1:1 trifilar transformers and achieves a figure of merit (FOM) of

.

II. CIRCUITDESIGN

The schematic of the main QVCO core is shown in Fig. 1(a), while Fig. 1(b) shows the layout of the 1:1:1 differential trifilar transformer. In Fig. 1, the are the differential ports connected to the gate/drain/source nodes of the VCO core, respectively, where or 2 for the two identical transformers. Note that, all the signal ports (drain, gate, and source) of the tri-filar transformer are at the same side while the three dc bias (ac ground) are fed from the center-tapped nodes, located at the other side. Thus, the wire connections from the trifilar trans-former to active devices can be minimized.

The phase noise and phase accuracy of the QVCO can be optimized by using different line width and line spacing for

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SYU et al.: A 0.6-V 30 GHZ CMOS QUADRATURE VCO USING MICROWAVE 1:1:1 TRIFILAR TRANSFORMER 89

Fig. 2. (a) Output buffer and dummy buffer (b) simulated equivalent loading capacitances and capacitive loading variation due to buffer.

Fig. 3. Die photo of the QVCO using microwave trifilar transformers.

suitable coupling strengths, instead of different turn ratios. The gate-to-drain coupling should be high enough to assure of a good inductor quality factor and overall phase noise. However, the gate/drain-to-source coupling provides a mutual coupling between - and -VCOs and suffers from trade-offs between phase error and phase noise properties. Thus, the source line should be designed slightly away from the gate/drain lines to reduce the coupling strength. After fine-tuning, the trifilar trans-former has an outer diameter of 140 with the metal thickness of 3.3 . The line widths ( / / ) are 9/12/3 and line spacing ( / ) are 2/7 , respectively, where -and - are indicated in Fig. 1(b). The corresponding cou-pling coefficients , , and are 0.67, 0.35, and 0.3, re-spectively.

To fairly compare the two different layouts (the conventional 2:1:1 and newly proposed 1:1:1 types), the same oscillation frequency of 30 GHz and similar frequency tuning range are designed. As a result, the equivalent tank parallel resistance of the QVCO (at resonance) using the 1:1:1 layout is around 1.6 times higher than that using the 2:1:1 layout. The corresponding simulated phase noise proper-ties are indicated in Fig. 4(b) in Section III. The phase noise is then improved by around 4 dB at 1 MHz offset frequency. Note that, the chosen 2:1:1 trifilar transformer for comparison has the coupling coefficients , , and of 0.5, 0.5, and 0.25, respectively. Different turn ratios of the two cases result in different optimal design of coupling strengths.

A common-source (CS) buffer amplifier with an inductive load is used here to maintain the high-frequency response. For area saving, only one CS amplifier is employed in each / -VCO, say and , as shown in Fig. 2(a). However,

Fig. 4. (a) Output signal spectrum and (b) phase noise spectrum of the QVCO using microwave trifilar transformers.

this placement may cause significant signal imbalance. Thus, a dummy transistor with an open drain node is employed at the other port of each VCO, i.e., and . The simulated load capacitance of both CS buffer and open-loaded dummy are shown in Fig. 2(b). After fine-tuning, at a target-oscillation band of around 20 to 30 GHz, the capacitance loading is mini-mized. Note that, parasitic capacitance matching can be further improved by connecting the drain bias of the dummy transistor to at the cost of additional power consumption.

A standard single-sideband upconversion passive mixer is im-plemented to fairly measure / phase error of the QVCO [1] to avoid the measurement inaccuracy resulting from amplitude/ phase mismatches in wires and connectors at high frequencies. Besides, assuming the sideband rejection (SBR) in an upcon-version is totally dominated by the quadrature phase error ( ) of the LO oscillator

(1) Once the SBR is measured, the equivalent worst-case phase error can be obtained by (1).

III. MEASUREMENTRESULTS

Fig. 3 shows the die photo of the QVCO utilizing a pair of microwave trifilar transformers. The die size is 1.1 0.8 while the QVCO core only occupies 180 450 . The supply voltage of the VCO core is 0.6 V with the core current consumption of 13 mA, while each CS buffer consumes 1.6 mA from a 1.2 V supply. Both the output signal spectrum and the phase noise spectrum are measured by Agilent E5052A signal

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90 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 22, NO. 2, FEBRUARY 2012

TABLE I PERFORMANCECOMPARISON

Fig. 5. Output spectrum at RF port of the single-sideband upconverter with a 41.6 dB sideband rejection.

Fig. 6. (a) Oscillation frequency and output power (b) phase noise at 1 MHz offset and sideband rejection of the proposed QVCO.

source analyzer with Agilent N5507A microwave downcon-verter (1.5 to 26.5 GHz) and Agilent 11970A (26.5 to 40 GHz) waveguide harmonic mixer modules. Fig. 4(a) shows the output signal spectrum around 30 GHz while the phase noise of the proposed QVCO is at 1 MHz offset frequency, as shown in Fig. 4(b). Note that, the difference between the simulated and measured data may result from the inaccuracy of the CMOS device flicker noise model. Fig. 5 shows the output frequency spectrum measured by Agilent E4448A spectrum analyzer at the RF port of the upconverter with a 41.6 dB side-band rejection (SBR) while the IF frequency is 200 MHz. The differential-quadrature IF signals are generated from off-chip passive quadrature hybrid (SMC DQK-705; 150–300 MHz) and differential transformer baluns (Tyco Electronics H-9; 2–2000 MHz). Besides, phase shifters are also employed to compensate the phase error of the balun, hybrid, and wire con-nections to probes. As a result, a 41.6 dB SBR is equivalent to a phase error of approximately 0.95 calculated from (1). The LO leakage results from slightly unbalanced buffer loading,

phase error in passive IF balun, and also the device mismatches in the QVCO and the upconversion mixer.

The oscillation power and frequency of the proposed QVCO with respect to the tuning voltage are shown in Fig. 6(a). The output power of the QVCO stays around at fre-quency ranging from 28.5 to 30.3 GHz and falls to

at 26.8 GHz. Note that, the simulated output power of the VCO core (without buffers) is . Besides, the phase noise at 1 MHz offset frequency and the SBR with respect to the tuning voltage are shown in Fig. 6(b). As a result, the phase noise at 1 MHz offset frequency is at most while the maximum SBR is 41.6 dB, and at least 29 dB covering the whole oscillation frequency band. The performance benchmark of the proposed QVCO and the state-of-the-art QVCOs [5], [6], [8]–[10] are summarized in Table I. Thus, both the FOM and of the proposed QVCO are better than that of other QVCOs.

IV. CONCLUSION

A pair of 1:1:1 trifilar transformers in the proposed 30 GHz QVCO are used for high-frequency, low-area, and low-voltage operations. The 30 GHz QVCO achieves FOM and maximum SBR of 41.6 dB with the VCO core area of only 180 450 . REFERENCES

[1] A. Rofougaran, J. Rael, M. Rofougaran, and A. A. Abidi, “A 900 MHz CMOS LC-oscillator with quadrature outputs,” in IEEE ISSCC Dig.

Tech. Papers, 1996, pp. 391–393.

[2] P. Andreani, A. Bonfanti, L. Romano, and C. Samori, “Analysis and design of a 1.8 GHz CMOS LC quadrature VCO,” IEEE J. Solid-State

Circuits, vol. 37, no. 12, pp. 1738–1747, Dec. 2002.

[3] D. Baek, T. Song, E. Yoon, and S. Hong, “8 GHz CMOS quadra-ture VCO using transformer-based LC-based LC tank,” IEEE Microw.

Wireless Compon. Lett., vol. 13, no. 10, pp. 446–448, Oct. 2003.

[4] Y. Zhang, P. Upadhyaya, L. Peng, D. Rector, and D. Heo, “Analysis of resonator phase shift for two series LC quadrature VCOs,” Electron.

Lett., vol. 44, no. 1, pp. 26–27, Jan. 2008.

[5] A. W. L. Ng and H. C. Luong, “A 1-V 17 GHz 5-mW quadrature VCO based on transformer coupling,” IEEE J. Solid-State Circuits, vol. 42, no. 9, pp. 1933–1941, Sep. 2007.

[6] J.-S. Syu, C. C. Meng, and G.-W. Huang, “SiGe HBT quadrature VCO utilizing trifilar transformers,” in IEEE ASSCC Dig., 2008, pp. 465–468.

[7] J. Yang, C.-Y. Kim, D.-W. Kim, and S. Hong, “Design of a 24 GHz CMOS VCO with an asymmetric-width transformer,” IEEE Trans.

Cir-cuits Syst. II, vol. 57, no. 3, pp. 173–177, Mar. 2010.

[8] S.-L. Jang, C.-C. Shih, C.-C. Liu, and M.-H. Juang, “A 0.18m CMOS quadrature VCO using the quadruple push-push technique,” IEEE

Mi-crow.Wireless Compon. Lett., vol. 20, no. 6, pp. 343–345, Jun. 2010.

[9] I.-S. Shen, T.-C. Huang, and C. F. Jou, “A low phase noise quadrature VCO using symmetrical tail current-shaping technique,” IEEE Microw.

Wireless Compon. Lett., vol. 20, no. 7, pp. 399–401, Jul. 2010.

[10] C.-Y. Kim, J. Yang, D.-W. Kim, and S. Hong, “A K-band quadra-ture VCO based on asymmetric coupled transmission lines,” in IEEE

數據

Fig. 1. (a) Schematic of the QVCO using microwave trifilar transformers (b) layout of the 1:1:1 trifilar transformer.
Fig. 2. (a) Output buffer and dummy buffer (b) simulated equivalent loading capacitances and capacitive loading variation due to buffer.
Fig. 6. (a) Oscillation frequency and output power (b) phase noise at 1 MHz offset and sideband rejection of the proposed QVCO.

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