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Flexible and low cost design for a flyback AC/DC converter with harmonic current correction

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Hsing-Fu Liu, Member, IEEE, and Lon-Kou Chang, Member, IEEE

Abstract—This study presents a new simple flyback ac/dc

con-verter with harmonic current correction and fast output voltage regulation. In the proposed ac/dc converter, an extra winding wound in the transformer provides two key advantages. The size of the bulk inductor used in the conventional boost-based power factor correction cell can be significantly reduced in the proposed converter. The voltage across bulk capacitor can be held under 450 V by tuning the transformer winding ratio even though the converter operates in a wide range of input voltages (90 V 265 V/ac). This new converter complies with IEC 61000-3-2 under the load range of 200 W, and can achieve fast output voltage regulation.

Index Terms—IEC 61000-3-2 regulations, power factor

correc-tion (PFC), switching mode power supplies.

I. INTRODUCTION

A

C/DC converters can be designed to have high power transfer efficiency. This characteristic enables ac/dc con-verters to be used as the primary power supplies in modern electronic products, such as personal computers, computer peripherals, and test instruments. Furthermore, to suppress the quantities of harmonic current emissions, the ac/dc converters must embed a function with power factor correction or har-monic current correction.

There are at least four main demands when designing the con-verters in wide range input (90 265 Vrms): 1) the line current harmonics must satisfy agency standards, 2) the primary side dc bus voltage should be less than 450 V/dc to reduce the size of the dc bus capacitor, 3) the feedback control bandwidth should cover the line frequency to minimize low frequency output rip-ples and advanced dynamic response, and 4) the circuit should be simple and flexible to enhance reliability in practical appli-cations.

In recent years, many studies have presented techniques re-garding harmonic current correction in ac/dc converters. These proposed solutions can be classified into two classes. One class yields sinusoidal input line current [1] while the other yields nonsinusoidal input line current [2]. The class with sinusoidal line current has almost a unity power factor but requires a com-plex topology or control circuit [1], [3]. Fig. 1 schematically shows an ac/dc converter belonging to the sinusoidal input line current class.

Manuscript received January 2, 2003; revised June 17, 2004. The work was supported by The Ministry of Education, Taiwan, R.O.C., under Grant EX-91-E-FA06-4-4 91X 104. Recommended by Associate Editor K. Smedley.

The authors are with the Electrical and Control Engineering Department, National Chiao-Tung University, Hsingchu 300, Taiwan, R.O.C. (e-mail: lauren.ece88g@nctu.edu.tw).

Digital Object Identifier 10.1109/TPEL.2004.839879

Fig. 1. Classical ac/dc converter with PFC function.

Fig. 2. Prior single stage ac/dc PFC converter.

The other one with nonsinusoidal line current has a simple topology based on a single-stage single-switch. Although they [5]–[9] lacks unity power factor, it complies with IEC 61 000-3-2 [4]. A family of such circuits was described in [5]–[9]. The family circuits often have a common configu-ration, a boost circuit applied in a dc/dc converter, as shown in Fig. 2. This feature successfully simplifies a conven-tional two-power-stage with power factor corrector into a one-power-stage corrector.

This study proposes a new converter with the configuration shown in Fig. 3. The new converter satisfies the input harmonic current constraints given by IEC 61 000-3-2 and provides a fast output regulating response. A multi-winding transformer is em-ployed in the proposed converter. This arrangement has three advantages. First, the size of the bulk inductor can be further reduced. Second, the line harmonic currents can be reduced. Third, the phase difference between the fundamental component of the line current and line voltage closely approaches zero. Fur-thermore, the voltage across the bulk capacitor can be arranged to a reasonable value under 450 V/dc by adjusting the turn-ratio of two primary windings. Therefore, this design can adapt to large line voltage variation. The structure and operation prin-cipal of a new converter is explained in the following section, and the practical experimental results are shown in Section V.

II. PROPOSEDCIRCUIT

Fig. 4 shows the proposed new flyback ac/dc converter with harmonic current correction function and tight output regulation. The circuit is a single-stage single-switch ac/dc 0885-8993/$20.00 © 2005 IEEE

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Fig. 3. Proposed single stage ac/dc PFC converter.

Fig. 4. Proposed simple flyback ac/dc converter.

Fig. 5. Operation modes.

converter, which comprises single switch , an input filter , , and , a bulk capacitor , a soft-switching inductor , and a transformer with two primary windings and . The winding , inductor , diode and , switch , and bulk capacitor comprise a boost circuit. The winding and , bulk capacitor , switch , diode , and output capacitor form a flyback converter.

The function of inductor in the proposed circuit is different from that of the boost inductor presented in the converters of [2]–[10]. Actually, provides partial soft switching functions for diodes and , to suppress the harmonic current by in-creasing the conduction time for from time to in Fig. 5, and to reduce the voltage across the bulk capacitor.

The inductor has a soft-switching function on and , as mentioned in [10]. Fig. 6 shows that when turns off, changes to reverse bias and proceed soft off since the current

has gradually reduced to zero at the reverse bias time or . Therefore, to overcome the problem of the reverse re-covery effect of , a suitable inductance of must be se-lected. Contrarily, softly turns on when the current grad-ually increases from zero at time .

Fig. 6. Current and Voltage waveforms in M1M3.

The winding provides the voltage-boost function for bulk capacitor during the period from to , as illustrated in Fig. 5. During this period, when turns off, turns on and the charge current flows from the power line source to through , , and . At this moment, the residue magnetic energy stored in the transformer will also induce current as a falling ramp waveform, as illustrated in Fig. 6. Furthermore, the in-creasing current keeps storing the magnetic energy in . The magnetic energy stored in passes to winding through winding , and induces a portion of current when is turned on.

The turns-ratio, , of the transformer can determine not only the starting conduction angle of the line current but also the voltage across a bulk capacitor . Furthermore, the induc-tance and volume of are significantly smaller than the pri-mary windings or of the transformer.

The control circuit can be designed by using a fixed-fre-quency simple voltage-mode control or a conventional peak-current control. The experiment results have demon-strated that even using a simple control method, the line current of the proposed ac/dc converter can comply with the standard IEC 61 000-3-2, and the converter also provides fast load dynamic response.

III. BASICOPERATIONTHEORIES

The fundamental operating principle of the proposed con-verter is to store the magnetic energy in windings when switch turns on, and then to deliver it to bulk capacitor and secondary winding when switch turns off. The entire operation principle of the circuit can be explained in three oper-ation modes. Fig. 5 shows six operoper-ation modes in a line cycle. Only three modes are left after combining the similar modes,

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This mode holds when . Currents and have not yet been induced. The converter operates as a conventional flyback converter. Fig. 7 shows the current conducting path in mode with turned on and off. Fig. 7 shows that the transformer does not sink the current from the power line. Rather, the converter sinks the current from the bulk capacitor . shows the voltage across on and is approximated to a constant value during a line cycle in the steady state and can be obtained as

(1)

where .

The voltage-second balance criteria is applied to the flyback transformer, and thus the total voltage-second should be zero in one time period in steady state. Additionally, another required assumption is that the flyback transformer operates in the CCM mode such that

(2) where , , and are the number of turns used in winding

, , and .

From (1) and (2), the boundary time of can be obtained by

(3) Let

(4) Then is in the range, .

Integrating the winding inductor voltages of and over the duty on and off periods yields

(5)

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B. Operation Modes and

This mode holds when .

In the duty on period, turns on and current flows through the winding , , , and . Simultaneously, discharges via winding and . The conducting paths are as shown in Fig. 8(a) and (b) since the induced voltage exceeding , is none zero current initially, as displayed in Fig. 8(a) and

Fig. 7. Current loop in modeM : (a) t < t  t ,S turns on and (b)t < t  t S , turns off.

reduces to zero linearly and then continues to be zero, as shown in Fig. 8(b).

When turns off, causes to flow via winding , and and to charge the bulk capacitor . Simultane-ously, turns to on state and delivers the magnetic power to the output circuit, as shown in Fig. 8(c). The conduction of causes the output capacitor connected to two terminals of winding . Therefore, the output current linearly reduces during the duty off period. In this operation, is nonzero even at the end of the duty-off period. Consequently, in mode the current of winding operates in the continuous cur-rent mode, denoted by CCM. Based on the CCM of and voltage-second balance, the duty ratio is the same as that in

mode .

Integrating the voltages of the winding inductors of , , and yields the following winding currents:

(7)

(4)

Fig. 8. Current loop in modeM : (a) t < t  t S1 turns on, (b)t < t  t and S1 turns on, and (c)t < t  t S1 turns off.

where

(9) where

.

C. Boundary Condition Between CCM and DCM

The boundary between CCM and DCM occurs just as reaches zero at the end of the switching period. Since the ca-pacitance of is large, the value of the voltage is al-most kept constant. Throughout the period, when is in the off period, the current generated by the line power in-creases, and accelerates the decrease of according to Am-pere’s law. If the duty ratio remains unchanged in Mode , then the current at the end of equals the current at the end of mode . This approxi-mation yields

(10)

where is the load current

At the boundary, is denoted by , which can be ob-tained by

(11) where

Then is in the range .

D. Operation Modes and

This mode holds when . The large

cur-rent increases the rate of decay of . The current falls to discontinuous current mode (DCM) in this operational mode. Fig. 9 shows four different current flow paths in a switching cycle. The energy stored in winding during the duty on pe-riod of are distributed to the winding and winding in the duty off time period. During a switching cycle, and are ruled as in mode . However, reduces to zero be-fore the end of the duty off period of .

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Fig. 9. Current loops in modeM : (a) t < t  t ,S turns on, (b) t < t  t ,S turns on, (c) t < t  t ,S turns off, and (d) t < t  t ,S turns off.

The winding currents and voltages of inductor and trans-former are given as

(12) otherwise (13) where otherwise (14) (15) (16) (17) (18) where

Employing the voltage-second balance theorem for winding and in mode in steady state, all of (15)–(18) give the

Simplifying the above equation, the duty ratio can be ob-tained by

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Fig. 10. Starting conduction angle.

where

and in .

IV. ANALYSIS OFCONVERTEROPERATION

A. Primary Current and Duty Ratio

In the converter circuit the filter capacitance is designed as a low pass filter to bypass the switching signal to ground and to pass the line power signal to the converter. Consequently, the primary component of approximates to the primary com-ponent of . From (7) and (12), and display a linear relation when the angle of the line power signal exceeds the con-duction angle. Therefore, can be controlled to be linearly re-lated to during the conduction periods.

The secondary winding of the transformer operates in CCM during modes and and in DCM during mode . The calculation of duty ratio can be simply obtained from (2), when winding operates in modes and . However, the duty ratio becomes more complicate as given in (19) for mode , since the current enters DCM. The value of duty ratio in mode is smaller than in modes and . Furthermore, the duty ratio will be smallest when the peak presents, since increases and decreases when increases from zero to the peak value.

B. Starting Conduction Angle

The value is called a starting conduction angle (SCA), as shown in Fig. 10. A smaller SCA leads to higher power factor and lower THD. Equation (3) shows that the SCA increases with increasing product of and . This phenomenon implies that power factor or THD decreases with increasing or . Fig. 11 shows the relationship be-tween and SCA under various duty ratios and two different winding ratios of .

C. Voltage Across Bulk Capacitor

Equation (1) shows that the voltage across bulk capacitor, , varies with , SCA, , and but does not vary

Fig. 11. Curve of starting conduction angle,V =V , D and N =N at N =N = 2.

Fig. 12. Curve of starting conduction angle,V , and n =n at V o = 48 V.

with the output load. In most applications, all the design calcu-lations are always based on the given values of and . Thus, the voltage can be determined by selecting the preferred , SCA, or . In practical applications, the voltage is kept under 450 v for commercial considerations. Fig. 12 provides designers with a convenient graphical design aid for obtaining the eclectic selections of , SCA, and for certain line voltage ranges.

According to Fig. 5, the current is zero in model because the sum of and is smaller than when

is in the off state. The diode continues off until the sum of and exceeds . Therefore, SCA decreases with decreasing . Two methods can be used to reduce . One method uses a smaller number of winding turns for , and the other uses a larger inductance in . The larger inductance can resist to charge , thus achieving lower .

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Fig. 13. MaxL =L and duty cycle.

D. Inductor

The inductor is designed to provide the partially soft-switching function for diodes and . When the current decreases, inductor causes the current to linearly de-crease to zero, and the diode turns off without any switching-loss. Furthermore, the inductor causes to increase lin-early from zero, and the diode turns on without switching-loss. To guarantee the partial soft-switching, functions above, current must reduce to zero before switch turns off.

Employing the voltage-second theorem in for one switching cycle, (15)–(18) in mode yields

(20)

let and . Then simplifying

(20) can give (21). The is a period of switching cycle

(21) Fig. 13 provides the designer a selection aid of to guarantee the partially soft-switching function working to and .

V. EXPERIMENTALRESULTS

An experimental prototype has been established to demon-strate the circuit operation and the analysis results presented above. The experimental circuit can operate in 85 265 V/ac input voltage range and generate an output voltage of 48 v/dc and an output power of 96 W. The turn ratio of is 2.38/2/1 and the inductance ratio of is 0.17, where

Fig. 14. Harmonic main contents of the line current.

Fig. 15. Line current and line voltage waveforms atVac = 110 V and ouput= 48 V=2 A.

H and transformer core PQ32/20 is used. The trans-former core employed in previous similar converter should be EER35 in [6], [7]. Although some previous similar converters have similar transformer core size to the proposed converter for similar output power and switching frequency, the values of the boost inductors, 58 240 H in [6] or 1.4 mH in [7], are several times greater than the value of in the proposed con-verter. The sizes of the boost inductors employed in [6], [7] thus are several times greater than that of when flowing through a similar line current. The converters in [8] or [9] use similar smaller boost inductor 30 H, but the line current harmonic dis-tribution is higher than that produced by the proposed converter. Fig. 14 shows that the detailed harmonic distributions of the ex-perimental circuit using two different power line voltages are significantly below the levels required by class D.

Fig. 15 shows the line current in a line-cycle, revealing that its harmonic distribution complies with a standard of IEC 61 000-3-2. Fig. 16 shows the dynamic response from a 3/8 to 3/4 full load in 110 v/ac input voltage. The output voltage of prototype shows a fast response and stable regulation. Fig. 17 shows the voltages across bulk capacitor for different input voltages at full load. The experimental results demonstrate that the bulk capacitor voltage was ranged between 60 70% higher than the line voltage. Furthermore, a lower percentage can be achieved by carefully selecting the winding ratio. The voltage of the bulk capacitor is shown to depend on both and turn ratio , but irrelative to load current.

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Fig. 16. Dynamic response waveforms for output voltage Vo, line current iac, output current Io: Ch1 ! Vo = 48 V, Ch2 ! iac, Ch3 ! Io = 0:75 A=1:5 A.

Fig. 17. Voltage rating of bulk capacitor and line voltage. VI. CONCLUSION

This study introduces an ac/dc converter with a new struc-ture. The proposed converter has harmonic current correction, fast dynamic response and tight voltage regulation. The new converter is implemented using a single-stage single-switch and simple control loop. Therefore, the proposed structure is simple. Conventional converters use a two primary winding transformer. However, the proposed design incorpo-rates an additional primary winding to replace the primary function of the bulk inductor. This change achieves a nearly 50% saving in magnetic material volume and weight while comparing to the one of two-stages approach (PFC plus dc/dc) shown in Fig. 1. The experimental results have demonstrated that the current of the proposed converter line complies with standard IEC 61 000-3-2 and there is tight voltage regulation under load change. The voltage across the bulk capacitor can be kept under 450 V by adjusting the turn-ratio in a full range operation (85 V 265 V/ac). This new structure can also be extended to other converters, such as forward converters.

REFERENCES

[1] L. Dixon Jr, “High power factor preregulators for off-line supplies,” in

Proc. Unitrode Power Supply Design Sem., 1991.

[2] J. A. C. Garcia, R. Prieto, P. Alou, and J. Uceda, “Power factor correc-tion: a survey,” in Proc. IEEE PESC’01 Annu. Meeting, 2001, pp. 8–13. [3] M. H. L. Chow, Y. S. Lee, and C. K. Tse, “Single-stage single-switch isolated PFC regulator with unity power factor, fast transient response and low voltage stress,” in Proc. IEEE PESC’98 Annu. Meeting, 1998, pp. 1422–1428.

[4] Electromagnetic Compatibility (EMC), International Std. IEC61000-3-2, 2001.

[5] R. Redl, L. Balogh, and N. Sokal, “A new family of single-stage iso-lated power-factor correct converter with fast regulation of the output voltage,” in Proc. IEEE PESC’94 Annu. Meeting, 1994, pp. 1137–1144. [6] L. Huber and M. M. Jovanovic, “Single stage single switch isolated power supply technique with input current shaping and fast output voltage regulation for universal input voltage range application,” in

Proc. IEEE APEC’97 Annu. Meeting, 1997, pp. 272–280.

[7] J. Sebastián, M. M. Hernando, P. Villegas, J. Diaz, and A. Fontán, “Input current sharper based on the series connection of a voltage source and a loss free resistor,” in Proc. IEEE APEC’98 Annu. Meeting, 1998, pp. 461–467.

[8] F. S. Tsai, P. Markowski, and E. Whitcomb, “Off-line flyback converter with input harmonic current correction,” in Proc. IEEE INTELEC’96

Annu. Meeting, 1996, pp. 120–124.

[9] Q. Zhao, F. C. Lee, and F.-S. Tsai, “Voltage and current stress reduc-tion in single-stage power factor correcreduc-tion ac/dc converters with bulk capacitor voltage feedback,” IEEE Trans. Power Electron., vol. 17, pp. 477–484, Jul. 2002.

[10] G. Hua, “Consolidated soft switching ac/dc converter,” U.S. Patent 579 038 9, Aug. 1998.

Hsing-Fu Liu (M’00) received the M.S. degree in

electrical engineering from Chung Yuan Christian University, Chungli, Taiwan, R.O.C., in 1991 and is currently pursuing the Ph.D. degree at National Chiao-Tung University, Hsingchu, Taiwan.

He was employed in the Computer andCom-munications Research Labs, Industrial Technology Research Institute, Hsinchu, from 1991 to 1995, where his research focused on soft-switching tech-niques, high-density dc/dc converter, and ac/dc power factor correction circuits. In 1995, he joined Philips Electronics, Chungli, Taiwan, as Senior Designer developing ac/dc and dc/dc power circuits for new model PC-monitors. In 1998, he joined Delta Electronics, Chungli, where he was involved in developing switching-mode rectifiers for communication power systems. From 2000 to 2004, he was with Analog Integrations Corporation, Hsinchu, as the Manager of the Application Engineering Department. His interests include high frequency soft-switching techniques, passive and active snubber circuits, ac/dc power factor correction circuits, LED’s lighting power, and modeling simulation on power electronics.

Lon-Kou Chang (M’87) received the B.S. degree in

electronics engineering from Chung Yuan Christian University, Chungli, Taiwan, R.O.C, in 1975, the M.S. degree in electronics engineering from the National Chiao-Tung University (NCTU), Hsinchu, Taiwan, in 1977, and the Ph.D. degree in electrical engineering from the University of Maryland, College Park, in 1995.

Since 1983, he has been with NCTU, where he is currently an Associate Professor of electrical and control engineering. From 1982 to 1985, he was a part-time Electrical Supervisor for the Tri-Service General Hospital, Taipei, Taiwan. He was also an R&D Consultant of Sunpentown Int. Co., Taiwan, from 1996 to 1998. His research interests include circuit design and analysis of power electronics, chipset implementation of power circuits, CAD in circuit design, and related applications.

數據

Fig. 1. Classical ac/dc converter with PFC function.
Fig. 5. Operation modes.
Fig. 7. Current loop in mode M : (a) t &lt; t  t , S turns on and (b) t &lt; t  t S , turns off.
Fig. 8. Current loop in mode M : (a) t &lt; t  t S1 turns on, (b) t &lt; t  t and S1 turns on, and (c) t &lt; t  t S1 turns off.
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