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Preface, Contents

Bit Logic Instructions 1

Comparison Instructions 2

Conversion Instructions 3

Counter Instructions 4

Data Block Instructions 5

Logic Control Instructions 6

Integer Math Instructions 7

Floating Point Math Instructions 8

Move Instructions 9

Program Control Instructions 10

Shift and Rotate Instructions 11

Status Bit Instructions 12

Timer Instructions 13

Word Logic Instructions 14

Appendix

Overview of All LAD Instructions A SIMATIC

Ladder Logic (LAD) for S7-300 and S7-400 Programming

Reference Manual

This manual is part of the documentation package with the order number:

6ES7810-4CA06-8BR0

Programming Examples B

Index Edition 11/2002

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Copyright © Siemens AG 2002 All rights reserved The reproduction, transmission or use of this document or its contents is not permitted without express written authority.

Offenders will be liable for damages. All rights, including rights created by patent grant or registration of a utility model or design, are reserved.

Siemens AG

Disclaimer of Liability

We have checked the contents of this manual for agreement with the hardware and software described. Since deviations cannot be precluded entirely, we cannot guarantee full agreement. However, the data in this manual are reviewed regularly and any necessary corrections included in subsequent editions. Suggestions for improvement are welcomed.

connected equipment against damage. These notices are highlighted by the symbols shown below and graded according to severity by the following texts:

!

Dangerindicates that death, severe personal injury or substantial property damage will result if proper precautions are not taken.

!

Warningindicates that death, severe personal injury or substantial property damage can result if proper precautions are not taken.

!

Cautionindicates that minor personal injury can result if proper precautions are not taken.

Caution

indicates that property damage can result if proper precautions are not taken.

Notice

draws your attention to particularly important information on the product, handling the product, or to a particular part of the documentation.

Qualified Personnel

Only qualified personnel should be allowed to install and work on this equipment. Qualified persons are defined as persons who are authorized to commission, to ground and to tag circuits, equipment, and systems in accordance with established safety practices and standards.

Correct Usage

Note the following:

!

WarningThis device and its components may only be used for the applications described in the catalog or the technical description, and only in connection with devices or components from other manufacturers which have been approved or recommended by Siemens.

This product can only function correctly and safely if it is transported, stored, set up, and installed correctly, and operated and maintained as recommended.

Trademarks

SIMATIC®, SIMATIC HMI® and SIMATIC NET® are registered trademarks of SIEMENS AG.

Third parties using for their own purposes any other names in this document which refer to trademarks might infringe upon the rights of the trademark owners.

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Preface

Purpose

This manual is your guide to creating user programs in the Ladder Logic (LAD) programming language.

This manual also includes a reference section that describes the syntax and functions of the language elements of Ladder Logic.

Basic Knowledge Required

The manual is intended for S7 programmers, operators, and maintenance/service personnel.

In order to understand this manual, general knowledge of automation technology is required.

In addition to, computer literacy and the knowledge of other working equipment similar to the PC (e.g. programming devices) under the operating systems MS Windows 95, MS Windows 98, MS Windows Millenium, MS Windows NT 4.0 Workstation, MS Windows 2000 Professional or MS Windows XP Professional are required.

Scope of the Manual

This manual is valid for release 5.2 of the STEP 7 programming software package.

Compliance with IEC 1131-3

LAD corresponds to the “Ladder Logic” language defined in the International Electrotechnical Commission's standard IEC 1131-3. For further details, refer to the table of standards in the STEP 7 file NORM_TBL.WRI.

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To use this Ladder Logic manual effectively, you should already be familiar with the theory behind S7 programs which is documented in the online help for STEP 7.

The language packages also use the STEP 7 standard software, so you should be familiar with handling this software and have read the accompanying

documentation.

This manual is part of the documentation package "STEP 7 Reference".

The following table displays an overview of the STEP 7 documentation:

Documentation Purpose Order Number

STEP 7 Basic Information with

• ·Working with STEP 7 V5.2, Getting Started Manual

• Programming with STEP 7 V5.2

• Configuring Hardware and Communication Connections, STEP 7 V5.2

• From S5 to S7, Converter Manual

Basic information for technical personnel describing the methods of implementing control tasks with STEP 7 and the S7-300/400 programmable controllers.

6ES7810-4CA06-8BA0

STEP 7 Reference with

• Ladder Logic (LAD) / Function Block Diagram (FDB) / Statement List (STL) for S7-300/400 manuals

• Standard and System Function for S7-300/400

Provides reference information and describes the programming languages LAD, FBD and STL, and standard and system function extending the scope of the STEP 7 basic information.

6ES7810-4CA06-8BR0

Online Helps Purpose Order Number

Help on STEP 7 Basic information on

programming and configuring hardware with STEP 7 in the form of an online help.

Part of the STEP 7 Standard software.

Reference helps on AWL/KOP/FUP Reference help on SFBs/SFCs Reference help on Organization Blocks

Context-sensitive reference information.

Part of the STEP 7 Standard software.

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The manual is complemented by an online help which is integrated in the software.

This online help is intended to provide you with detailed support when using the software.

The help system is integrated in the software via a number of interfaces:

• The context-sensitive help offers information on the current context, for example, an open dialog box or an active window. You can open the context- sensitive help via the menu command Help > Context-Sensitive Help, by pressing F1 or by using the question mark symbol in the toolbar.

You can call the general Help on STEP 7 using the menu command Help >

Contents or the "Help on STEP 7" button in the context-sensitive help window.

• You can call the glossary for all STEP 7 applications via the "Glossary" button.

This manual is an extract from the "Help on Ladder Logic". As the manual and the online help share an identical structure, it is easy to switch between the manual and the online help.

Further Support

If you have any technical questions, please get in touch with your Siemens representative or agent responsible.

http://www.siemens.com/automation/partner

Training Centers

Siemens offers a number of training courses to familiarize you with the SIMATIC S7 automation system. Please contact your regional training center or our central training center in D 90327 Nuremberg, Germany for details:

Telephone: +49 (911) 895-3200.

Internet: http://www.sitrain.com

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Worldwide, available 24 hours a day:

Beijing Nuremberg

Johnson City

Worldwide (Nuremberg) Technical Support

24 hours a day, 365 days a year Phone: +49 (0) 180 5050-222 Fax: +49 (0) 180 5050-223 E-Mail: adsupport@

siemens.com GMT: +1:00

Europe / Africa (Nuremberg) Authorization

Local time: Mon.-Fri. 8:00 to 17:00 Phone: +49 (0) 180 5050-222 Fax: +49 (0) 180 5050-223 E-Mail: adsupport@

siemens.com GMT: +1:00

United States (Johnson City) Technical Support and Authorization

Local time: Mon.-Fri. 8:00 to 17:00 Phone: +1 (0) 770 740 3505 Fax: +1 (0) 770 740 3699 E-Mail: isd-callcenter@

sea.siemens.com GMT: -5:00

Asia / Australia (Beijing) Technical Support and Authorization

Local time: Mon.-Fri. 8:30 to 17:30 Phone: +86 10 64 75 75 75 Fax: +86 10 64 74 74 74 E-Mail: adsupport.asia@

siemens.com GMT: +8:00 The languages of the SIMATIC Hotlines and the authorization hotline are generally German and English.

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In addition to our documentation, we offer our Know-how online on the internet at:

http://www.siemens.com/automation/service&support where you will find the following:

• The newsletter, which constantly provides you with up-to-date information on your products.

• The right documents via our Search function in Service & Support.

• A forum, where users and experts from all over the world exchange their experiences.

• Your local representative for Automation & Drives via our representatives database.

• Information on field service, repairs, spare parts and more under "Services".

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Contents

1 Bit Logic Instructions 1-1

1.1 Overview of Bit Logic Instructions ...1-1 1.2 ---| |--- Normally Open Contact (Address) ...1-2 1.3 ---| / |--- Normally Closed Contact (Address) ...1-3 1.4 XOR Bit Exclusive OR...1-4 1.5 --|NOT|-- Invert Power Flow ...1-5 1.6 ---( ) Output Coil ...1-6 1.7 ---( # )--- Midline Output ...1-8 1.8 ---( R ) Reset Coil ...1-9 1.9 ---( S ) Set Coil ...1-11 1.10 RS Reset-Set Flip Flop ...1-12 1.11 SR Set-Reset Flip Flop ...1-14 1.12 ---( N )--- Negative RLO Edge Detection. ...1-16 1.13 ---( P )--- Positive RLO Edge Detection ...1-17 1.14 ---(SAVE) Save RLO into BR Memory ...1-18 1.15 NEG Address Negative Edge Detection ...1-19 1.16 POS Address Positive Edge Detection ...1-20 1.17 Immediate Read . ...1-21 1.18 Immediate Write . ...1-23

2 Comparison Instructions 2-1

2.1 Overview of Comparison Instructions ...2-1 2.2 CMP ? I Compare Integer ...2-2 2.3 CMP ? D Compare Double Integer ...2-3 2.4 CMP ? R Compare Real ...2-4

3 Conversion Instructions 3-1

3.1 Overview of Conversion Instructions ...3-1 3.2 BCD_I BCD to Integer...3-2 3.3 I_BCD Integer to BCD. ...3-3 3.4 I_DINT Integer to Double Integer ...3-4 3.5 BCD_DI BCD to Double Integer...3-5 3.6 DI_BCD Double Integer to BCD...3-6 3.7 DI_REAL Double Integer to Floating-Point ...3-7 3.8 INV_I Ones Complement Integer ...3-8 3.9 INV_DI Ones Complement Double Integer...3-9 3.10 NEG_I Twos Complement Integer ...3-10 3.11 NEG_DI Twos Complement Double Integer ...3-11 3.12 NEG_R Negate Floating-Point Number ...3-12 3.13 ROUND Round to Double Integer. ...3-13 3.14 TRUNC Truncate Double Integer Part ...3-14 3.15 CEIL Ceiling . ...3-15 3.16 FLOOR Floor...3-16

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4 Counter Instructions 4-1 4.1 Overview of Counter Instructions ...4-1 4.2 S_CUD Up-Down Counter ...4-3 4.3 S_CU Up Counter . ...4-5 4.4 S_CD Down Counter. ...4-7 4.5 ---( SC ) Set Counter Value...4-9 4.6 ---( CU ) Up Counter Coil ...4-10 4.7 ---( CD ) Down Counter Coil...4-12

5 Data Block Instructions 5-1

5.1 ---(OPN) Open Data Block: DB or DI ...5-1

6 Logic Control Instructions 6-1

6.1 Overview of Logic Control Instructions ...6-1 6.2 ---(JMP)--- Unconditional Jump...6-2 6.3 ---(JMP)--- Conditional Jump...6-3 6.4 ---( JMPN ) Jump-If-Not...6-4 6.5 LABEL Label . ...6-5

7 Integer Math Instructions 7-1

7.1 Overview of Integer Math Instructions ...7-1 7.2 Evaluating the Bits of the Status Word with Integer Math Instructions ...7-2 7.3 ADD_I Add Integer . ...7-3 7.4 SUB_I Subtract Integer . ...7-4 7.5 MUL_I Multiply Integer . ...7-5 7.6 DIV_I Divide Integer . ...7-6 7.7 ADD_DI Add Double Integer . ...7-7 7.8 SUB_DI Subtract Double Integer ...7-8 7.9 MUL_DI Multiply Double Integer . ...7-9 7.10 DIV_DI Divide Double Integer ...7-10 7.11 MOD_DI Return Fraction Double Integer. ...7-11

8 Floating Point Math Instructions 8-1

8.1 Overview of Floating-Point Math Instruction ...8-1 8.2 Evaluating the Bits of the Status Word with Floating-Point Math Instructions ..8-2 8.3 Basic Instructions . ...8-3 8.3.1 ADD_R Add Real . ...8-3 8.3.2 SUB_R Subtract Real . ...8-4 8.3.3 MUL_R Multiply Real . ...8-5 8.3.4 DIV_R Divide Real . ...8-6 8.3.5 ABS Establish the Absolute Value of a Floating-Point Number. ...8-7 8.4 Extended Instructions. ...8-8 8.4.1 SQR Establish the Square . ...8-8 8.4.2 SQRT Establish the Square Root . ...8-9 8.4.3 EXP Establish the Exponential Value . ...8-10 8.4.4 LN Establish the Natural Logarithm . ...8-11 8.4.5 SIN Establish the Sine Value . ...8-12 8.4.6 COS Establish the Cosine Value . ...8-13 8.4.7 TAN Establish the Tangent Value . ...8-14 8.4.8 ASIN Establish the Arc Sine Value . ...8-15 8.4.9 ACOS Establish the Arc Cosine Value . ...8-16 8.4.10 ATAN Establish the Arc Tangent Value . ...8-17

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9 Move Instructions 9-1 9.1 MOVE Assign a Value. ...9-1

10 Program Control Instructions 10-1

10.1 Overview of Program Control Instructions ...10-1 10.2 ---(Call) Call FC SFC from Coil (without Parameters). ...10-2 10.3 CALL_FB Call FB from Box ...10-4 10.4 CALL_FC Call FC from Box ...10-6 10.5 CALL_SFB Call System FB from Box...10-8 10.6 CALL_SFC Call System FC from Box ...10-10 10.7 Call Multiple Instance ...10-12 10.8 Call Block from a Library ...10-12 10.9 Important Notes on Using MCR Functions ...10-13 10.10 ---(MCR<) Master Control Relay On ...10-14 10.11 ---(MCR>) Master Control Relay Off ...10-16 10.12 ---(MCRA) Master Control Relay Activate...10-18 10.13 ---(MCRD) Master Control Relay Deactivate ...10-19 10.14 ---(RET) Return ...10-20

11 Shift and Rotate Instructions 11-1

11.1 Shift Instructions...11-1 11.1.1 Overview of Shift Instructions...11-1 11.1.2 SHR_I Shift Right Integer. ...11-2 11.1.3 SHR_DI Shift Right Double Integer. ...11-3 11.1.4 SHL_W Shift Left Word . ...11-5 11.1.5 SHR_W Shift Right Word . ...11-6 11.1.6 SHL_DW Shift Left Double Word. ...11-7 11.1.7 SHR_DW Shift Right Double Word. ...11-9 11.2 Rotate Instructions ...11-11 11.2.1 Overview of Rotate Instructions . ...11-11 11.2.2 ROL_DW Rotate Left Double Word . ...11-11 11.2.3 ROR_DW Rotate Right Double Word . ...11-13

12 Status Bit Instructions 12-1

12.1 Overview of Statusbit Instructions. ...12-1 12.2 OV ---| |--- Exception Bit Overflow. ...12-2 12.3 OS ---| |--- Exception Bit Overflow Stored ...12-3 12.4 UO ---| |--- Exception Bit Unordered. ...12-5 12.5 BR ---| |--- Exception Bit Binary Result. ...12-6 12.6 ==0 ---| |--- Result Bit Equal 0 ...12-7 12.7 <>0 ---| |--- Result Bit Not Equal 0. ...12-8 12.8 >0 ---| |--- Result Bit Greater Than 0 ...12-9 12.9 <0 ---| |--- Result Bit Less Than 0...12-10 12.10 >=0 ---| |--- Result Bit Greater Equal 0 ...12-11 12.11 <=0 ---| |--- Result Bit Less Equal 0...12-12

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13 Timer Instructions 13-1 13.1 Overview of Timer Instructions. ...13-1 13.2 Location of a Timer in Memory and Components of a Timer...13-2 13.3 S_PULSE Pulse S5 Timer ...13-5 13.4 S_PEXT Extended Pulse S5 Timer ...13-7 13.5 S_ODT On-Delay S5 Timer ...13-9 13.6 S_ODTS Retentive On-Delay S5 Timer. ...13-11 13.7 S_OFFDT Off-Delay S5 Timer ...13-13 13.8 ---( SP ) Pulse Timer Coil ...13-15 13.9 ---( SE ) Extended Pulse Timer Coil. ...13-17 13.10 ---( SD ) On-Delay Timer Coil...13-19 13.11 ---( SS ) Retentive On-Delay Timer Coil ...13-21 13.12 ---( SF ) Off-Delay Timer Coil ...13-23

14 Word Logic Instructions 14-1

14.1 Overview of Word logic instructions ...14-1 14.2 WAND_W (Word) AND Word...14-2 14.3 WOR_W (Word) OR Word ...14-3 14.4 WAND_DW (Word) AND Double Word ...14-4 14.5 WOR_DW (Word) OR Double Word ...14-5 14.6 WXOR_W (Word) Exclusive OR Word ...14-6 14.7 WXOR_DW (Word) Exclusive OR Double Word ...14-7

A Overview of All LAD Instructions A-1

A.1 LAD Instructions Sorted According to English Mnemonics (International) . .... A-1 A.2 LAD Instructions Sorted According to German Mnemonics (SIMATIC) . ... A-5

B Programming Examples B-1

B.1 Overview of Programming Examples. ... B-1 B.2 Example: Bit Logic Instructions . ... B-2 B.3 Example: Timer Instructions. ... B-6 B.4 Example: Counter and Comparison Instructions . ... B-10 B.5 Example: Integer Math Instructions. ... B-12 B.6 Example: Word Logic Instructions. ... B-13 Index

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1 Bit Logic Instructions

1.1 Overview of Bit Logic Instructions

Description

Bit logic instructions work with two digits, 1 and 0. These two digits form the base of a number system called the binary system. The two digits 1 and 0 are called binary digits or bits. In the world of contacts and coils, a 1 indicates activated or energized, and a 0 indicates not activated or not energized.

The bit logic instructions interpret signal states of 1 and 0 and combine them according to Boolean logic. These combinations produce a result of 1 or 0 that is called the “result of logic operation” (RLO).

The logic operations that are triggered by the bit logic instructions perform a variety of functions.

There are bit logic instructions to perform the following functions:

• ---| |--- Normally Open Contact (Address)

• ---| / |--- Normally Closed Contact (Address)

• ---(SAVE) Save RLO into BR Memory

• XOR Bit Exclusive OR

• ---( ) Output Coil

• ---( # )--- Midline Output

• ---|NOT|--- Invert Power Flow

The following instructions react to an RLO of 1:

• ---( S ) Set Coil

• ---( R ) Reset Coil

• SR Set-Reset Flip Flop

• RS Reset-Set Flip Flop

Other instructions react to a positive or negative edge transition to perform the following functions:

• ---(N)--- Negative RLO Edge Detection

• ---(P)--- Positive RLO Edge Detection

• NEG Address Negative Edge Detection

• POS Address Positive Edge Detection

• Immediate Read

• Immediate Write

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1.2 ---| |--- Normally Open Contact (Address)

Symbol

<address>

---| |---

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D, T, C Checked bit

Description

---| |--- (Normally Open Contact) is closed when the bit value stored at the specified <address> is equal to "1". When the contact is closed, ladder rail power flows across the contact and the result of logic operation (RLO) = "1".

Otherwise, if the signal state at the specified <address> is "0", the contact is open.

When the contact is open, power does not flow across the contact and the result of logic operation (RLO) = "0".

When used in series, ---| |--- is linked to the RLO bit by AND logic. When used in parallel, it is linked to the RLO by OR logic.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - X X X 1

Example

I 0.0 I 0.1

I 0.2

Power flows if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1 Or the signal state is "1" at input I0.2

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1.3 ---| / |--- Normally Closed Contact (Address)

Symbol

<address>

---| / |---

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D, T, C Checked bit

Description

---| / |---(Normally Closed Contact) is closed when the bit value stored at the specified <address> is equal to "0". When the contact is closed, ladder rail power flows across the contact and the result of logic operation (RLO) = "1".

Otherwise, if the signal state at the specified <address> is "1", the contact is opened. When the contact is opened, power does not flow across the contact and the result of logic operation (RLO) = "0".

When used in series, ---| / |--- is linked to the RLO bit by AND logic. When used in parallel, it is linked to the RLO by OR logic.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - X X X 1

Example

I 0.0 I 0.1

I 0.2

Power flows if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1 Or the signal state is "1" at input I0.2

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1.4 XOR Bit Exclusive OR

For the XOR function, a network of normally open and normally closed contacts must be created as shown below.

Symbols

<address1> <address2>

<address1> <address2>

Parameter Data Type Memory Area Description

<address1> BOOL I, Q, M, L, D, T, C Scanned bit

<address2 BOOL I, Q, M, L, D, T, C Scanned bit

Description

XOR (Bit Exclusive OR) creates an RLO of "1" if the signal state of the two specified bits is different.

Example

I 0.0

I 0.0 I 0.1

Q 4.0 I 0.1

The output Q4.0 is "1" if (I0.0 = "0" AND I0.1 = "1") OR (I0.0 = "1" AND I0.1 = "0").

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1.5 --|NOT|-- Invert Power Flow

Symbol

---|NOT|---

Description

---|NOT|--- (Invert Power Flow) negates the RLO bit.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - 1 X -

Example

I 0.0

NOT I 0.2

I 0.1

Q 4.0

The signal state of output Q4.0 is "0" if one of the following conditions exists:

The signal state is "1" at input I0.0

Or the signal state is "1" at inputs I0.1 and I0.2.

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1.6 ---( ) Output Coil

Symbol

<address>

---( )

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Assigned bit

Description

---( ) (Output Coil) works like a coil in a relay logic diagram. If there is power flow to the coil (RLO = 1), the bit at location <address> is set to "1". If there is no power flow to the coil (RLO = 0), the bit at location <address> is set to "0". An output coil can only be placed at the right end of a ladder rung. Multiple output elements (max.

16) are possible (see example). A negated output can be created by using the ---

|NOT|--- (invert power flow) element.

MCR (Master Control Relay) dependency

MCR dependency is activated only if an output coil is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on and there is power flow to an output coil; the addressed bit is set to the current status of power flow. If the MCR is off, a logic "0" is written to the specified address regardless of power flow status.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - 0 X - 0

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Example

I 0.0 I 0.1

I 0.2

Q 4.0

Q 4.1 I 0.3

The signal state of output Q4.0 is "1" if one of the following conditions exists:

The signal state is "1" at inputs I0.0 AND I0.1 OR the signal state is "0" at input I0.2.

The signal state of output Q4.1 is "1" if one of the following conditions exists:

The signal state is "1" at inputs I0.0 AND I0.1

OR the signal state is "0" at input I0.2 AND "1" at input I0.3

If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0 and Q4.1 are set according to power flow status as described above.

When MCR is off (=0), Q4.0 and Q4.1 are reset to 0 regardless of power flow.

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1.7 ---( # )--- Midline Output

Symbol

<address>

---( # )---

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, *L, D Assigned bit

* An L area address can only be used if it is declared TEMP in the variable declaration table of a logic block (FC, FB, OB).

Description

---( # )--- (Midline Output) is an intermediate assigning element which saves the RLO bit (power flow status) to a specified <address>. The midline output element saves the logical result of the preceding branch elements. In series with other contacts, ---( # )--- is inserted like a contact. A ---( # )--- element may never be connected to the power rail or directly after a branch connection or at the end of a branch. A negated ---( # )--- can be created by using the ---|NOT|--- (invert power flow) element.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a midline output coil is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on and there is power flow to a midline output coil; the addressed bit is set to the current status of power flow. If the MCR is off, a logic "0" is written to the specified address regardless of power flow status.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - 0 X - 1

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Example

M 1.1 M 2.2 Q 4.0

I 1.0 I 1.1

M 1.1 has the RLO M 0.0 has the RLO

M 2.2 has the RLO of the entire bit logic combination I 1.0 I 1.1 M 0.0 I 2.2 I 1.3

I 1.0 I 1.1 I 2.2 I 1.3

NOT

( ) (#) NOT (#)

(#) NOT

1.8 ---( R ) Reset Coil

Symbol

<address>

---( R )

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D, T, C Reset bit

Description

---( R ) (Reset Coil) is executed only if the RLO of the preceding instructions is "1"

(power flows to the coil). If power flows to the coil (RLO is "1"), the specified

<address> of the element is reset to "0". A RLO of "0" (no power flow to the coil) has no effect and the state of the element's specified address remains unchanged.

The <address> may also be a timer (T no.) whose timer value is reset to "0" or a counter (C no.) whose counter value is reset to "0".

MCR (Master Control Relay) dependency

MCR dependency is activated only if a reset coil is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on and there is power flow to a reset coil; the addressed bit is reset to the "0" state. If the MCR is off, the current state of the element's specified address remains unchanged regardless of power flow status.

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Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - 0 X - 0

Example

I 0.0 I 0.1

I 0.2

R Q 4.0

T1 I 0.3

C1 I 0.4

R

R Network 3

Network 2 Network 1

The signal state of output Q4.0 is reset to "0" if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1 Or the signal state is "0" at input I0.2.

If the RLO is "0", the signal state of output Q4.0 remains unchanged.

The signal state of timer T1 is only reset if:

the signal state is "1" at input I0.3.

The signal state of counter C1 is only reset if:

the signal state is "1" at input I0.4.

If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0, T1, and C1 are reset as described above.

When MCR is off, Q4.0, T1, and C1 are left unchanged regardless of RLO state (power flow status).

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1.9 ---( S ) Set Coil

Symbol

<address>

---( S )

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Set bit

Description

---( S ) (Set Coil) is executed only if the RLO of the preceding instructions is "1"

(power flows to the coil). If the RLO is "1" the specified <address> of the element is set to "1".

An RLO = 0 has no effect and the current state of the element's specified address remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a set coil is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on and there is power flow to a set coil; the addressed bit is set to the "1" state. If the MCR is off, the current state of the element's specified address remains unchanged regardless of power flow status.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - 0 X - 0

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Example

I 0.0 I 0.1

I 0.2

S Q 4.0

The signal state of output Q4.0 is "1" if one of the following conditions exists:

The signal state is "1" at inputs I0.0 and I0.1 Or the signal state is "0" at input I0.2.

If the RLO is "0", the signal state of output Q4.0 remains unchanged.

If the example rungs are within an activated MCR zone:

When MCR is on, Q4.0 is set as described above.

When MCR is off, Q4.0 is left unchanged regardless of RLO state (power flow status).

1.10 RS Reset-Set Flip Flop

Symbol

RS

S Q

<address>

R

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Set or reset bit

S BOOL I, Q, M, L, D Enabled reset instruction

R BOOL I, Q, M, L, D Enabled reset instruction

Q BOOL I, Q, M, L, D Signal state of <address>

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Description

RS (Reset-Set Flip Flop) is reset if the signal state is "1" at the R input, and "0" at the S input. Otherwise, if the signal state is "0" at the R input and "1" at the S input, the flip flop is set. If the RLO is "1" at both inputs, the order is of primary

importance. The RS flip flop executes first the reset instruction then the set instruction at the specified <address>, so that this address remains set for the remainder of program scanning.

The S (Set) and R (Reset) instructions are executed only when the RLO is "1".

RLO "0" has no effect on these instructions and the address specified in the instruction remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a RS flip flop is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on, the addressed bit is reset to

"0" or set to "1" as described above. If the MCR is off, the current state of the specified address remains unchanged regardless of input states.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - x x x 1

Example

R RS Q M 0.0

S I 0.0

I 0.1

Q 4.0

If the signal state is "1" at input I0.0 and "0" at I0.1, memory bit M0.0 is set and output Q4.0 is "0". Otherwise, if the signal state at input I0.0 is "0" and at I0.1 is "1", memory bit M0.0 is reset and output Q4.0 is "1". If both signal states are "0", nothing is changed. If both signal states are "1", the set instruction dominates because of the order; M0.0 is set and Q4.0 is "1".

If the example is within an activated MCR zone:

When MCR is on, Q4.0 is reset or set as described above.

When MCR is off, Q4.0 is left unchanged regardless of input states.

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1.11 SR Set-Reset Flip Flop

Symbol

SR

S Q

<address>

R

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Set or reset bit

S BOOL I, Q, M, L, D Enable set instruction

R BOOL I, Q, M, L, D Enable reset instruction

Q BOOL I, Q, M, L, D Signal state of <address>

Description

SR (Set-Reset Flip Flop) is set if the signal state is "1" at the S input, and "0" at the R input. Otherwise, if the signal state is "0" at the S input and "1" at the R input, the flip flop is reset. If the RLO is "1" at both inputs, the order is of primary importance.

The SR flip flop executes first the set instruction then the reset instruction at the specified <address>, so that this address remains reset for the remainder of program scanning.

The S (Set) and R (Reset) instructions are executed only when the RLO is "1".

RLO "0" has no effect on these instructions and the address specified in the instruction remains unchanged.

MCR (Master Control Relay) dependency

MCR dependency is activated only if a SR flip flop is placed inside an active MCR zone. Within an activated MCR zone, if the MCR is on ; the addressed bit is set to

"1" or reset to "0" as described above. If the MCR is off, the current state of the specified address remains unchanged regardless of input states.

Status word

BR CC1 CC0 OV OS OR STA RLO /FC

writes: - - - x x x 1

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Example

S SR Q M 0.0

R I 0.0

I 0.1

Q 4.0

If the signal state is "1" at input I0.0 and "0" at I0.1, memory bit M0.0 is set and output Q4.0 is "1". Otherwise, if the signal state at input I0.0 is "0" and at I0.1 is "1", memory bit M0.0 is reset and output Q4.0 is "0". If both signal states are "0", nothing is changed. If both signal states are "1", the reset instruction dominates because of the order; M0.0 is reset and Q4.0 is "0".

If the example is within an activated MCR zone:

When MCR is on, Q4.0 is set or reset as described above.

When MCR is off, Q4.0 is left unchanged regardless of input states.

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1.12 ---( N )--- Negative RLO Edge Detection

Symbol

<address>

---( N )

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Edge memory bit, storing the previous signal state of RLO

Description

---( N )--- (Negative RLO Edge Detection) detects a signal change in the address from "1" to "0" and displays it as RLO = "1" after the instruction. The current signal state in the RLO is compared with the signal state of the address, the edge

memory bit. If the signal state of the address is "1" and the RLO was "0" before the instruction, the RLO will be "1" (pulse) after this instruction, and "0" in all other cases. The RLO prior to the instruction is stored in the address.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: - - - 0 x x 1

Example

N M 0.0 I 0.0 I 0.1

I 0.2

JMP CAS1

The edge memory bit M0.0 saves the old RLO state. When there is a signal change at the RLO from "1" to "0", the program jumps to label CAS1.

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1.13 ---( P )--- Positive RLO Edge Detection

Symbol

<address>

---( P )---

Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, L, D Edge memory bit, storing the previous signal state of RLO

Description

---( P )--- (Positive RLO Edge Detection) detects a signal change in the address from "0" to "1" and displays it as RLO = "1" after the instruction. The current signal state in the RLO is compared with the signal state of the address, the edge

memory bit. If the signal state of the address is "0" and the RLO was "1" before the instruction, the RLO will be "1" (pulse) after this instruction, and "0" in all other cases. The RLO prior to the instruction is stored in the address.

Status word

BR CC1 CC0 OV OS OR STA RLO /FC

writes: - - - 0 X X 1

Example

CAS1 P

M 0.0 JMP I 0.0 I 0.1

I 0.2

The edge memory bit M0.0 saves the old RLO state. When there is a signal change at the RLO from "0" to "1", the program jumps to label CAS1.

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1.14 ---(SAVE) Save RLO into BR Memory

Symbol

---( SAVE )

Description

---(SAVE) (Save RLO into BR Memory) saves the RLO to the BR bit of the status word. The first check bit /FC is not reset. For this reason, the status of the BR bit is included in the AND logic operation in the next network.

For the instruction "SAVE" (LAD, FBD, STL), the following applies and not the recommended use specified in the manual and online help:

We do not recommend that you use SAVE and then check the BR bit in the same block or in subordinate blocks, because the BR bit can be modified by many instructions occurring inbetween. It is advisable to use the SAVE instruction before exiting a block, since the ENO output (= BR bit) is then set to the value of the RLO bit and you can then check for errors in the block.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: X - - - -

Example

SAVE I 0.0 I 0.1

I 0.2

The status of the rung (=RLO) is saved to the BR bit.

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1.15 NEG Address Negative Edge Detection

Symbol

NEG M_BIT

Q

<address1>

<address2>

Parameter Data Type Memory Area Description

<address1> BOOL I, Q, M, L, D Scanned signal

<address2> BOOL I, Q, M, L, D M_BIT edge memory bit, storing the previous signal state of

<address1>

Q BOOL I, Q, M, L, D One shot output

Description

NEG (Address Negative Edge Detection) compares the signal state of <address1>

with the signal state from the previous scan, which is stored in <address2>. If the current RLO state is "1" and the previous state was "0" (detection of rising edge), the RLO bit will be "1" after this instruction.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: x - - - - x 1 x 1

Example

NEG

M_BIT Q I 0.3

M 0.0 I 0.0

( )

I 0.1 I 0.2 I 0.4 Q 4.0

The signal state at output Q4.0 is "1" if the following conditions exist:

• The signal state is "1" at inputs I0.0 and I0.1 and I0.2

• And there is a negative edge at input I0.3

• And the signal state is "1" at input I0.4

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1.16 POS Address Positive Edge Detection

Symbol

POS M_BIT

Q

<address1>

<address2>

Parameter Data Type Memory Area Description

<address1> BOOL I, Q, M, L, D Scanned signal

<address2> BOOL I, Q, M, L, D M_BIT edge memory bit, storing the previous signal state of

<address1>

Q BOOL I, Q, M, L, D One shot output

Description

POS (Address Positive Edge Detection) compares the signal state of <address1>

with the signal state from the previous scan, which is stored in <address2>. If the current RLO state is "1" and the previous state was "0" (detection of rising edge), the RLO bit will be "1" after this instruction.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: x - - - - x 1 x 1

Example

POS

M_BIT Q I 0.3

M 0.0 I 0.0

( )

I 0.1 I 0.2 I 0.4 Q 4.0

The signal state at output Q4.0 is "1" if the following conditions exist:

• The signal state is "1" at inputs I0.0 and I0.1 and I0.2

• And there is a positive edge at input I0.3

• And the signal state is "1" at input I0.4

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1.17 Immediate Read

Description

For the Immediate Read function, a network of symbols must be created as shown in the example below.

For time-critical applications, the current state of a digital input may be read faster than the normal case of once per OB1 scan cycle. An Immediate Read gets the state of a digital input from an input module at the time the Immediate Read rung is scanned. Otherwise, you must wait for the end of the next OB1 scan cycle when the I memory area is updated with the P memory state.

To perform an immediate read of an input (or inputs) from an input module, use the peripheral input (PI) memory area instead of the input (I) memory area. The peripheral input memory area can be read as a byte, a word, or a double word.

Therefore, a single digital input cannot be read via a contact (bit) element.

To conditionally pass voltage depending on the status of an immediate input:

1. A word of PI memory that contains the input data of concern is read by the CPU.

2. The word of PI memory is then ANDed with a constant that yields a non-zero result if the input bit is on ("1").

3. The accumulator is tested for non-zero condition.

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Example

Ladder Network with Immediate Read of Peripheral Input I1.1

WAND_W EN

IN2 OUT ENO IN1

16#0002 PIW1

MWx *

I 4.1 <>0 I 4.5

*

MWx has to be specified in order to be able to store the network. x may be any permitted number.

Description of WAND_W instruction:

PIW1 0000000000101010

W#16#0002 0000000000000010

Result 0000000000000010

In this example immediate input I1.1 is in series with I4.1 and I4.5.

The word PIW1 contains the immediate status of I1.1. PIW1 is ANDed with W#16#0002. The result is not equal to zero if I1.1 (second bit) in PB1 is true ("1").

The contact A<>0 passes voltage if the result of the WAND_W instruction is not equal to zero.

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1.18 Immediate Write

Description

For the Immediate Write function, a network of symbols must be created as shown in the example below.

For time-critical applications, the current state of a digital output may have to be sent to an output module faster than the normal case of once at the end of the OB1 scan cycle. An Immediate Write writes to a digital output to a input module at the time the Immediate Write rung is scanned. Otherwise, you must wait for the end of the next OB1 scan cycle when the Q memory area is updated with the P memory state.

To perform an immediate write of an output (or outputs) to an output module, use the peripheral output (PQ) memory area instead of the output (Q) memory area.

The peripheral output memory area can be read as a byte, a word, or a double word. Therefore, a single digital output cannot be updated via a coil element. To write the state of a digital output to an output module immediately, a byte, word, or double word of Q memory that contains the relevant bit is conditionally copied to the corresponding PQ memory (direct output module addresses).

!

Caution

• Since the entire byte of Q memory is written to an output module, all outputs bits in that byte are updated when the immediate output is performed.

• If an output bit has intermediate states (1/0) occurring throughout the program that should not be sent to the output module, Immediate Writes could cause dangerous conditions (transient pulses at outputs) to occur.

• As a general design rule, an external output module should only be referenced once in a program as a coil. If you follow this design rule, most potential problems with immediate outputs can be avoided.

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Example

Ladder network equivalent of Immediate Write to peripheral digital output module 5, channel 1.

The bit states of the addressed output Q byte (QB5) are either modified or left unchanged. Q5.1 is assigned the signal state of I0.1 in network 1. QB5 is copied to the corresponding direct peripheral output memory area (PQB5).

The word PIW1 contains the immediate status of I1.1. PIW1 is ANDed with W#16#0002. The result is not equal to zero if I1.1 (second bit) in PB1 is true ("1").

The contact A<>0 passes voltage if the result of the WAND_W instruction is not equal to zero.

I 0.1 Q 5.1

Network 1

MOVE

IN

ENO EN

OUT

QB5 PQB5

Network 2

In this example Q5.1 is the desired immediate output bit.

The byte PQB5 contains the immediate output status of the bit Q5.1.

The other 7 bits in PQB5 are also updated by the MOVE (copy) instruction.

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2 Comparison Instructions

2.1 Overview of Comparison Instructions

Description

IN1 and IN2 are compared according to the type of comparison you choose:

== IN1 is equal to IN2

<> IN1 is not equal to IN2

> IN1 is greater than IN2

< IN1 is less than IN2

>= IN1 is greater than or equal to IN2

<= IN1 is less than or equal to IN2

If the comparison is true, the RLO of the function is "1". It is linked to the RLO of a rung network by AND if the compare element is used in series, or by OR if the box is used in parallel.

The following comparison instructions are available:

• CMP ? I Compare Integer

• CMP ? D Compare Double Integer

• CMP ? R Compare Real

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2.2 CMP ? I Compare Integer

Symbols

CMP

== I IN2 IN1

CMP

<> I IN2 IN1

CMP

< I IN2 IN1

CMP

> I IN2 IN1

CMP

<= I IN2 IN1

CMP

>= I IN2 IN1

Parameter Data Type Memory Area Description

box input BOOL I, Q, M, L, D Result of the previous logic operation

box output BOOL I, Q, M, L, D Result of the comparison, is only processed further if the RLO at the box input = 1

IN1 INT I, Q, M, L, D

or constant

First value to compare

IN2 INT I, Q, M, L, D

or constant

Second value to compare

Description

CMP ? I(Compare Integer) can be used like a normal contact. It can be located at any position where a normal contact could be placed. IN1 and IN2 are compared according to the type of comparison you choose.

If the comparison is true, the RLO of the function is "1". It is linked to the RLO of the whole rung by AND if the box is used in series, or by OR if the box is used in parallel.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: x x x 0 - 0 x x 1

Example

CMP

>= I

IN2 IN1 MW2 MW0 I 0.1

S Q 4.0 I 0.0

Output Q4.0 is set if the following conditions exist:

• There is a signal state of "1" at inputs I0.0 and at I0.1

• AND MW0 >= MW2

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2.3 CMP ? D Compare Double Integer

Symbols

CMP

== D IN2 IN1

CMP

<> D IN2 IN1

CMP

< D IN2 IN1

CMP

> D IN2 IN1

CMP

<= D IN2 IN1

CMP

>= D IN2 IN1

Parameter Data Type Memory Area Description

box input BOOL I, Q, M, L, D Result of the previous logic operation box output BOOL I, Q, M, L, D Result of the comparison, is only processed

further if the RLO at the box input = 1

IN1 DINT I, Q, M, L, D

or constant

First value to compare

IN2 DINT I, Q, M, L, D

or constant

Second value to compare

Description

CMP ? D(Compare Double Integer) can be used like a normal contact. It can be located at any position where a normal contact could be placed. IN1 and IN2 are compared according to the type of comparison you choose.

If the comparison is true, the RLO of the function is "1". It is linked to the RLO of a rung network by AND if the compare element is used in series, or by OR if the box is used in parallel.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: x x x 0 - 0 x x 1

Example

CMP

>= D

IN2 IN1 MD4

MD0 I 0.1

S Q 4.0

I 0.0 I 0.2

Output Q4.0 is set if the following conditions exist:

• There is a signal state of "1" at inputs I0.0 and at I0.1

• And MD0 >= MD4

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2.4 CMP ? R Compare Real

Symbols

CMP

== R IN2 IN1

CMP

<> R IN2 IN1

CMP

< R IN2 IN1

CMP

> R IN2 IN1

CMP

<= R IN2 IN1

CMP

>= R IN2 IN1

Parameter Data Type Memory Area Description

box input BOOL I, Q, M, L, D Result of the previous logic operation box output BOOL I, Q, M, L, D Result of the comparison, is only processed

further if the RLO at the box input = 1

IN1 REAL I, Q, M, L, D

or constant

First value to compare

IN2 REAL I, Q, M, L, D

or constant

Second value to compare

Description

CMP ? R(Compare Real) can be used like a normal contact. It can be located at any position where a normal contact could be placed. IN1 and IN2 are compared according to the type of comparison you choose.

If the comparison is true, the RLO of the function is "1". It is linked to the RLO of the whole rung by AND if the box is used in series, or by OR if the box is used in parallel.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: x x x x x 0 x x 1

Example

CMP

>= R

IN2 IN1 MD4

MD0 I 0.1

S Q 4.0

I 0.0 I 0.2

Output Q4.0 is set if the following conditions exist:

• There is a signal state of "1" at inputs I0.0 and at I0.1

• And MD0 >= MD4

• And there is a signal state of"1" at input I0.2

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3 Conversion Instructions

3.1 Overview of Conversion Instructions

Description

The conversion instructions read the contents of the parameters IN and convert these or change the sign. The result can be queried at the parameter OUT.

The following conversion instructions are available:

• BCD_I BCD to Integer

• I_BCD Integer to BCD

• BCD_DI BCD to Double Integer

• I_DINT Integer to Double Integer

• DI_BCD Double Integer to BCD

• DI_REAL Double Integer to Floating-Point

• INV_I Ones Complement Integer

• INV_DI Ones Complement Double Integer

• NEG_I Twos Complement Integer

• NEG_DI Twos Complement Double Integer

• NEG_R Negate Floating-Point Number

• ROUND Round to Double Integer

• TRUNC Truncate Double Integer Part

• CEIL Ceiling

• FLOOR Floor

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3.2 BCD_I BCD to Integer

Symbol

BCD_I ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN WORD I, Q, M, L, D BCD number

OUT INT I, Q, M, L, D Integer value of BCD number

Description

BCD_I (Convert BCD to Integer) reads the contents of the IN parameter as a three- digit, BCD coded number (+/- 999) and converts it to an integer value (16-bit). The integer result is output by the parameter OUT. ENO always has the same signal state as EN.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: 1 - - - - 0 1 1 1

Example

Q 4.0 I 0.0

MW10

BCD_I ENO EN

IN OUT MW12

NOT

If input I0.0 is "1" , then the content of MW10 is read as a three-digit BCD coded number and converted to an integer. The result is stored in MW12. The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).

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3.3 I_BCD Integer to BCD

Symbol

I_BCD ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN INT I, Q, M, L, D Integer number

OUT WORD I, Q, M, L, D BCD value of integer number

Description

I_BCD (Convert Integer to BCD) reads the content of the IN parameter as an integer value (16-bit) and converts it to a three-digit BCD coded number (+/- 999).

The result is output by the parameter OUT. If an overflow occurred, ENO will be

"0".

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: x - - x x 0 x x 1

Example

Q 4.0 I 0.0

MW10

I_BCD ENO EN

IN OUT MW12

NOT

If I0.0 is "1", then the content of MW10 is read as an integer and converted to a three-digit BCD coded number. The result is stored in MW12. The output Q4.0 is

"1" if there was an overflow, or the instruction was not executed (I0.0 = 0).

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3.4 I_DINT Integer to Double Integer

Symbol

I_DINT ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN INT I, Q, M, L, D Integer value to convert

OUT DINT I, Q, M, L, D Double integer result

Description

I_DINT (Convert Integer to Double Integer) reads the content of the IN parameter as an integer (16-bit) and converts it to a double integer (32-bit). The result is output by the parameter OUT. ENO always has the same signal state as EN.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: 1 - - - - 0 1 1 1

Example

Q 4.0 I 0.0

MW10

I_DINT ENO EN

IN OUT MD12

NOT

If I0.0 is "1", then the content of MW10 is read as an integer and converted to a double integer. The result is stored in MD12. The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).

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3.5 BCD_DI BCD to Double Integer

Symbol

BCD_DI ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN DWORD I, Q, M, L, D BCD number

OUT DINT I, Q, M, L, D Double integer value of BCD

number

Description

BCD_DI (Convert BCD to Double Integer) reads the content of the IN parameter as a seven-digit, BCD coded number (+/- 9999999) and converts it to a double integer value (32-bit). The double integer result is output by the parameter OUT. ENO always has the same signal state as EN.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: 1 - - - - 0 1 1 1

Example

Q 4.0 I 0.0

MD8

BCD_DI ENO EN

IN OUT MD12

NOT

If I0.0 is "1" , then the content of MD8 is read as a seven-digit BCD coded number and converted to a double integer. The result is stored in MD12. The output Q4.0 is

"1" if the conversion is not executed (ENO = EN = 0).

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3.6 DI_BCD Double Integer to BCD

Symbol

DI_BCD ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN DINT I, Q, M, L, D Double integer number

OUT DWORD I, Q, M, L, D BCD value of a double integer

number

Description

DI_BCD (Convert Double Integer to BCD) reads the content of the IN parameter as a double integer (32-bit) and converts it to a seven-digit BCD coded number (+/- 9999999). The result is output by the parameter OUT. If an overflow occurred, ENO will be "0".

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: x - - x x 0 x x 1

Example

Q 4.0 I 0.0

MD8

DI_BCD ENO EN

IN OUT MD12

NOT

If I0.0 is "1", then the content of MD8 is read as a double integer and converted to a seven-digit BCD number. The result is stored in MD12. The output Q4.0 is "1" if an overflow occurred, or the instruction was not executed (I0.0 = 0).

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3.7 DI_REAL Double Integer to Floating-Point

Symbol

DI_REAL ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN DINT I, Q, M, L, D Double integer value to convert

OUT REAL I, Q, M, L, D Floating-point number result

Description

DI_REAL (Convert Double Integer to Floating-Point) reads the content of the IN parameter as a double integer and converts it to a floating-point number. The result is output by the parameter OUT. ENO always has the same signal state as EN.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: 1 - - - - 0 1 1 1

Example

Q 4.0 I 0.0

MD8

DI_REAL ENO EN

IN OUT MD12

NOT

If I0.0 is "1", then the content of MD8 is read as an double integer and converted to a floating-point number. The result is stored in MD12. The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).

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3.8 INV_I Ones Complement Integer

Symbol

INV_I ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN INT I, Q, M, L, D Integer input value

OUT INT I, Q, M, L, D Ones complement of the integer

IN

Description

INV_I (Ones Complement Integer) reads the content of the IN parameter and performs a Boolean XOR function with the hexadecimal mask W#16#FFFF. This instruction changes every bit to its opposite state. ENO always has the same signal state as EN.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: 1 - - - - 0 1 1 1

Example

Q 4.0 I 0.0

MW8

INV_I ENO EN

IN OUT MW10

NOT

If I0.0 is "1", then every bit of MW8 is reversed, for example:

MW8 = 01000001 10000001 results in MW10 = 10111110 01111110.

The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).

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3.9 INV_DI Ones Complement Double Integer

Symbol

INV_DI ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN DINT I, Q, M, L, D Double integer input value

OUT DINT I, Q, M, L, D Ones complement of the double

integer IN

Description

INV_DI (Ones Complement Double Integer) reads the content of the IN parameter and performs a Boolean XOR function with the hexadecimal mask W#16#FFFF FFFF .This instruction changes every bit to its opposite state. ENO always has the same signal state as EN.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: 1 - - - - 0 1 1 1

Example

Q 4.0 I 0.0

MD8

INV_DI ENO EN

IN OUT MD12

NOT

If I0.0 is "1", then every bit of MD8 is reversed, for example:

MD8 = F0FF FFF0 results in MD12 = 0F00 000F.

The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).

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3.10 NEG_I Twos Complement Integer

Symbol

NEG_I ENO EN

IN OUT

Parameter Data Type Memory Area Description

EN BOOL I, Q, M, L, D Enable input

ENO BOOL I, Q, M, L, D Enable output

IN INT I, Q, M, L, D Integer input value

OUT INT I, Q, M, L, D Twos complement of integer IN

Description

NEG_I (Twos Complement Integer) reads the content of the IN parameter and performs a twos complement instruction. The twos complement instruction is equivalent to multiplication by (-1) and changes the sign (for example: from a positive to a negative value). ENO always has the same signal state as EN with the following exception: if the signal state of EN = 1 and an overflow occurs, the signal state of ENO = 0.

Status word

BR CC 1 CC 0 OV OS OR STA RLO /FC

writes: x x x x x 0 x x 1

Example

Q 4.0 I 0.0

MW8

NEG_I ENO EN

IN OUT MW10

NOT

If I0.0 is "1", then the value of MW8 with the opposite sign is output by the OUT parameter to MW10.

MW8 = + 10 results in MW10 = - 10.

The output Q4.0 is "1" if the conversion is not executed (ENO = EN = 0).

If the signal state of EN = 1 and an overflow occurs, the signal state of ENO = 0.

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