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The Design of a Low Noise Amplifier for Blue Tooth Receiver Design 白欣松、陳勛祥 ; 許崇宜

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The Design of a Low Noise Amplifier for Blue Tooth Receiver Design 白欣松、陳勛祥 ; 許崇宜

E-mail: [email protected]

ABSTRACT

A 1.8V LNA (low noise amplifier) is designed for RF (radio frequency) system using TSMC 0.18μm process in this thesis. The operating frequency of the low noise amplifier is located at Blue Tooth (2.4GHz). The LNA has a single cascade structure with on-chip spiral inductors to save die area and integrated all devices in an IC. The simulation results emphasis on input/output impedance matching、isolation、power gain、linear、and power dissipation. From tuning parameters of each device, we can get the optimal value in this LNA circuit. The performance of LNA from simulation results were : noise figure 2.894dB, power gain 14.571 dB, power dissipation 4.65 mW, 1-dB compression -24 dBm.

Keywords : LNA ; spiral inductors ; RF

Table of Contents

封面內頁 簽名頁 授權書.........................iii 中文摘要............

............iv 英文摘要........................v 誌謝.........

.................vi 目錄..........................vii 圖目錄...

......................x 表目錄.........................xii 第 一章 序論 1.1藍芽簡介...................1 1.2相關研究發展現況.............

..4 第二章 通訊系統架構 2.1接收機系統簡介................6 2.2超外差式接收機.......

.........8 2.3直接降頻接收機................9 第三章 低雜訊放大器的設計考量 3.1 簡 介....................13 3.2 MOS積體電路內在雜訊...........13 3.2.1通道熱雜 訊..............13 3.2.2閘極電阻雜訊.............15 3.2.3閃爍雜訊........

.......16 3.3 雜訊指數..................17 3.4 線性度考量.............

....20 3.4.1 1-dB增益壓縮點............21 3.4.2 三階交互調變點............23 3.5增 益....................27 第四章 低雜訊放大器的架構 4.1簡介..............

......29 4.2低雜訊放大器的電路架構...........30 4.3輸入阻抗匹配網路............

..32 4.3.1 電阻匹配電路..............32 4.3.2 共閘級匹配電路.............34 4.3.3 並串回授匹配電路............35 4.3.4 電感衰減匹配電路............36 4.4串疊結構...

...............39 4.5 螺旋式電感與MIM電容...........40 第五章 模擬結果與佈局圖 5.1 序言....................44 5.2阻抗匹配模擬................45 5.3反向隔絕 度模擬...............47 5.4功率增益模擬................48 5.5雜訊指數的模擬.

..............49 5.6線性度的模擬................50 5.6.1 1-dB增益壓縮點模擬..

.......50 5.6.2 三階交互調變點模擬..........51 5.7 溫度變異模擬..............

.52 5.8 供應電壓變異模擬.............53 5.9 製程變異模擬...............54 5.10 穩 定度模擬................55 5.11佈局平面圖.................56 5.12量測考量.

.................57 第六章 結論......................58 參考文獻.

.......................60 REFERENCES

[1] Razavi B,[2000],RF MICRO ELECTRONICS, McGraw-Hill, New York.

[2] 謝俊南, “設計5.7GHz低雜訊放大器應用於802.11a之研究”,國立雲林科技大學電子與資訊工程研究所碩士論文“,民國92年 [3] 李建 鋒, “應用於無線區域網路之5.25GHz CMOS差動式低雜訊放大器”,中華大學電機工程研究所碩士論文,民國92年 [4] Yao-Huang Kao;

Chao-Hsi Chuang; Tser-YU Lin, “The effects of gate resistance on the performances of CMOS RF circuits”, Microwave Conference, 2000 Asia-Pacific , 3-6 Dec. 2000,Pages:169 — 172.

[5] Razavi B.

[2000],Design of Analog CMOS Integrated Circuits, McGraw-Hill,New York.

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[6] Chih-Lung Hsiao; Ro-Min Weng; Kun-Yi Lin, “A 1V fully differential CMOS LNA for 2.4GHz application”,Circuits and Systems, 2003.

ISCAS '03. Proceedings of the 2003 International Symposium on , Volume: 1 , 25-28 May 2003 ,Pages:I-245 - I-248 vol.1.

[7] Huang, J.C.; Ro-Min Weng; Cheng-Chih Chang; Kang Hsu; Kun-Yi Lin,“A 2 V 2.4 GHz fully integrated CMOS LNA” ,Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on , Volume: 4 , 6-9 May 2001 ,Pages:466 - 469 vol. 4.

[8] Shaeffer, D.K.; Lee, T.H., “ A 1.5-V, 1.5-GHz CMOS low noise amplifier”,Solid-State Circuits, IEEE Journal of , Volume: 32 , Issue: 5 , May 1997 ,Pages:745 - 759 [9] Yongmin Ge; Mayaram, K., “A comparative analysis of CMOS low noise amplifiers for RF applications”, Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on , Volume: 4 , 31 May-3 June 1998,Pages:349 - 352 vol.4 [10] 林哲煜, “Design of RF CMOS IC”, CIC訓練課程”,A602 [11] 洪瑞源,“高頻被動元件之研究與製作”,私立中原大學電子 工程研究所碩士論文“,民國90年 [12] Jie Long; Badr, N.; Weber, R., “ A 2.4GHz sub-1 dB CMOS low noise amplifier with on-chip interstage inductor and parallel intrinsic capacito”, Radio and Wireless Conference, 2002. RAWCON 2002. IEEE , 11-14 Aug. 2002, Pages:165 — 168.

[13] Agilent Technologies, “ADS Circuit Fundamentals Training Manual” ,CIC訓練課程,A508 [14] Choong-Yul Cha; Sang-Gug Lee, “A low power, high gain LNA topology”,Microwave and Millimeter Wave Technology, 2000, 2nd International Conference on. ICMMT 2000 , 14-16 Sept. 2000,Pages:420 — 423.

[15] Wu, Y.; Chunlei Shi; Ismail, M.; Olsson, H., “Temperature compensation design for a 2.4 GHz CMOS low noise amplifier”,Circuits and Systems, 2000. Proceedings. ISCAS 2000 Geneva. The 2000 IEEE International Symposium on , Volume: 1 , 28-31 May 2000 ,Pages:323 - 326 vol.1.

[16] El-Gamal, M.N.; Rafla, R.A., “2.4-5.8 GHz CMOS LNA's using integrated inductors”, Circuits and Systems, 2000. Proceedings of the 43rd IEEE Midwest Symposium on , Volume: 1 , 2000 , Page(s): 302 -304 vol.1 [17] Debono, C.J.; Maloberti, F.; Micallef, J., “A 1.8 GHz CMOS low-noise amplifier” , Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on , Volume: 3 , 2001 , Page(s): 1111 -1114 vol.3 [18] J. C. Huang, Ro-Min Weng, Cheng-Chin Chang, Kang Hsu, and Kun-Yi. Lin, “A 2V 2.4GHz Fully Integrated CMOS LNA”, Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on , Volume: 4 , 6-9 May 2001 [19]

El-Diwany, E.; El-Hennawy, H.; Fouad, H.; Sharaf, K. , “An RF CMOS modified-cascode LNA with inductive source degeneration”, Radio Science Nineteenth National Conference of the Proceedings NRSC 2002 , 2002 ,Page(s): 450 —457 [20] Wei Hu; Yawei Guo; Zujiang Qiu;

Lianxing Yang,” A 1.2-v 2.4-GHz 0. 18 /spl mu/m CMOS low noise amplifier”, Communications, Circuits and Systems and West Sino Expositions, IEEE 2002 International Conference on , Volume: 1 , 29 June-1 July 2002 ,Pages:470 - 473 vol.1.

參考文獻

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