ᔁॎ̚
̂රԫఙጯੰ፟ր
ၡ! ࢋ
ώ͛ࢵАޙϲᘦᑅጡᄃपࣃ߹ଠטඉர̝ᇴጯሀݭĄ҃ޢĂੵͽᖎٽ۞
៍هᄲځਫ਼ྮྃᐺጡ۞నࢍࣧநγĂ֭೩˘ྋژё̝पࣃ߹ଠטݭਫ਼ྮྃ
ᐺጡనࢍ͞ڱĄٙ೩̝ਫ਼ྮྃᐺጡనࢍ͞ڱੵࠎుՎёγ֭ͷΞᅅٽгӀϡ т Excel 5.0 ̝ཝइ྅హវր̼Ăซ಼҃̂೩నࢍड़தĄޢĂ 附上模擬與實驗結果以驗證所提ਫ਼ྮྃᐺጡనࢍ͞ڱ۞正確性與可行性。
ᙯᔣෟĈਫ਼ྮྃᐺጡనࢍăᘦᑅጡăपࣃ߹Ą
LOOP COMPENSATOR ANALYSIS AND DESIGN FOR
CURRENT-MODE-CONTROLLED SWITCH-MODE REGULATORS
Jenn-Jong Shieh
Department of Electrical Engineering, Ta Hwa Institute of Technology
Hsinchu, Taiwan 307, R.O.C.
Key Words: loop compensator, regulators, peak current.
ABSTRACT
In this paper, the mathematical models of DC regulators for peak current-mode-controlled strategy are first derived. Then, a simple concept is adopted to illustrate the principle of the loop gain compensator design, and the closed form design method for the peak current-mode-controlled DC regulators is proposed. The proposed design method is designed step by step and can be used easily. In addition, conventional computer software programs, such as Excel 5.0, can be used to systematically increase the efficiency of the design process. Finally, a prototype hardware circuit is constructed and some simulation and experimental results are presented for illustration.
˘ă݈! ֏
ܕ˟˩ѐֽĂϹೱёۡ߹ᘦᑅጡ۞నࢍ៍ه̏ు႙ࠎ నࢍ۰ٙ˞ྋĂࢋ۞ࣧЯдٺΑத৺(power stage)̈ੈ
ཱིሀݭ̶ژԫఙ̝͟ᔌјሢĂЯѩͽᑕϡ˘ਠቢّଠט
நኢֽనࢍਫ਼ྮྃᐺጡ(loop compensator)Ąᔵ̏གྷѣޝк ጯ۰೩ྋՙϹೱёۡ߹ᘦᑅ̈ੈཱིሀݭ̼̝நኢᄃ͞ڱ [1-6]ĂϤٺېၗ۩มπӮ̼ԫఙ(state-space average technique)[1-3]ٙז۞ቢّ̼ሀݭ̝࿅ٽࠎˠٙந ྋĂͷੵΞᑕϡтگᇇဦ(Bode plot)ăॲྫဦ(root locus) ᄃ؉̀ဦ(Nichols chart)ඈ͞ڱ̶ֽژᖼೱጡ۞পّ֭ͽࠎ
ဦ 1! पࣃ߹ଠטր͞ဦ
ۡ߹ᘦᑅጡਫ਼ྮྃᐺጡనࢍ۞ૄᖂγĂТॡϺΞͽࢎؠт ᓏᐛୂຏޘ(audio susceptibility)ăᏮܡԩ(output impe- dance)ᄃ࠹၆ᘦؠޘඈࢦࢋ۞̈ੈཱིఢॾĂЯѩᇃࠎ
నࢍ̍रٙܦ༚ĄΩ˘͞ࢬĂಶа͞ё̝̙ТĂۡ߹
ᘦᑅጡ̝ਫ਼ྮྃᐺጡనࢍΞડ̶ࠎᑅଠטݭ(voltage mode control)ᄃ߹ଠטݭ(current mode control)̂ᙷĄ
݈۰ᔵٺநኢ˯ޝटٽࠎ̍रٙநྋĂ҃дந ѣΠΗπࢬᕇ(right half plane zero)̝ᘦᑅྮॡĂڱ
྿זޢ۰ٙѣ̝Αड़Ăѩࠎிٙ࠰ۢ۞ְ၁[1-3,8]ĄΩ
ଂགྷᑻ៍ᕇ֏̝Ă߹ଠטݭώ֗ӈѣᒠม࿅߹᜕̝ܲ
Αਕͷϫ݈̏ѣкछᇄથϠய߹ଠטݭ PWM ଠטϡ ICĂੵᆊॾ˩̶ܮآγ֭Ξͽ೩ֻᒠม߹ͽӀۡତᜭ જт MOSFET ̝ΑதΗጱវฟᙯ̮ІĄЯѩĂ̷ೱёᘦᑅ ጡ̙ኢߏңݭၗĂͽ߹ݭଠטࠎ˘υ̝ᔌ๕Ąᔵ
߹ଠטݭ፟טѣ˯ኜкᐹᕇĂЯࠎᗕਫ਼ྮଠטĂ
̙༊నࢍ̝ਫ਼ྮྃᐺጡໂٽֹᘦᑅጡ̙ᘦؠ[7-11]Ą ѩγĂಶ߹а፟ט̝̙ТĂ߹ଠטݭ˘ਠΞડ
̶ࠎπӮ߹ଠט(average current mode control)ᄃपࣃ
߹ଠט(peak current mode control)̂ᙷĄ҃Яޢ۰ѣ ҋજ݈㒝аྃᐺ(automatic feed forward compensation)ᄃ Տ˘̷ೱฉഇӈү߹ࢨט(pulse by pulse current limiting)
̝Αਕ[7-9]Ąᔵ̏ѣ࠹༊̝͛ᚥ೩ਫ਼ྮྃᐺጡ۞న
ࢍ͞ڱᄃඉரĂҭ̂ౌᅮགྷϤనࢍણᇴ̝ᖼೱ͞ਕந ਫ਼ྮྃᐺጡ̝నࢍ[8-12]ĄΩ˘͞ࢬĂྋژё(closed form)
̝నࢍ͞ڱΞ೩̷ֻೱྮ۞ۡᛇ˯߽၅˧ᄃሀᑢ̶ژਕ
˧Ăҭϫ݈࠹ᙯ͛ᚥ̝ଣ̪̙к֍[13-16]ĄЯѩĂώ
͛੫၆पࣃ߹ଠט፟ט̷̝ೱёᘦᑅጡĂ೩˘इᖎٽ ͷ၁ϡ̝ྋژёਫ਼ྮྃᐺጡనࢍڱ֭ր̼Ăͽ̂
಼೩ਫ਼ྮྃᐺጡనࢍ۞ܮӀّᄃΞҖّĄ
ဦ 2 पࣃ߹ଠטր̝ॡԔဦ
˟ăपࣃ߹ଠטሀݭ̝ޙϲ
̙ኢߏଳϡңଠט፟טĂਫ਼ྮྃᐺጡనࢍ̝ࢵࢋ̍
үӈޙϲ࠹၆ᑕ̝ᇴጯሀݭĄဦ 1 ٙϯࠎपࣃ߹ଠט ր͞ဦĂ࠹၆ᑕ̝ॡԔဦтဦ 2 ٙϯĄ̚R ăs sn ᄃs ̶Ҿܑࠎפᇹ߹f i ̝פᇹܡă˯̿ᄃ˭ࢫதćL
s ࠎγొྃᐺதćҌٺ̝ྮཱིтဦٙ̚ϯĄϤe
ဦ 2 ӍˠΞ
min 2
, 1 1
s n s s s
s dT R i R i
R = + (1)
s e c s n s s
s Ri RsdT v sdT
R
i1,max = 1,min+ = − (2) Ϥё(1)ᄃё(2)Ξт˭̝ᙯܼё
1 2
s s n s s e c s
R dT s dT R s v i
R = − − (3)
ॲፂᕘજநኢĂё(3)̝Чតณ̟ͽт˭̝ᕘજĈ d
D d= + ˆ
1 1
1 I ˆi
i = +
c c
c V v
v = +ˆ
n n
n S s
s = +ˆ
e e
e S s
s = +ˆ (4)
ё(4)ˢё(3)ͷనγొྃᐺதؠ̙ត(sˆe =0)Ξ
т˭̝ᘦၗᄃ̈ੈཱིજၗሀݭĄ
ࢫ ᑅ ݭ 1 − Rs
Ls
2 2Ls
̿ ᑅ ݭ 1 − Rs
s s s
L DT R
2
−
0 ࢫ̿ᑅݭ 1 −Rs
s s s
L DT R
2
− 0
ᘦၗሀݭ
s e s n s c
s DT S DT
S R V I
R = − −
1 2 (5)
̈ੈཱིજၗሀݭ
+高階項 +
−
−
= R S S Td
DT s R v i
Rs c s s n s n e) sˆ ( 2
2 ˆ ˆ ˆ
1 (6)
Я ࠎ ҂ ᇋ ̈ ੈ ཱི ̶ ژ ॡ Ădˆ<<D, iˆ1<<I1, vˆc<<Vc,
n
n S
sˆ << Ă߇ё(6)̝̚ลีΞنர̙ࢍĄЯѩĂё(6)Ξ ࢦາܑϯт˭Ĉ
ˆ ) 2 ˆ ˆ
ˆ (
1 s n
s s c
m DT s
R i R v F
d= − − (7)
̚
s e n s
m RS S T
F ( 2 )
2
= + (8)
̙Тݭё̝ᘦᑅጡ̝sˆ ˢё(7)Ξ n ˆ ) ˆ ˆ
( ˆ
ˆ Fm H1vc H2i1 H3vg H4vo
d= + + + (9)
̚H1~ H4̝ણᇴࣃтܑ˘ٙϯĄ
Ϥё(9)Ξۢ dˆ ࠎ vˆ ăc ˆi ă1 vˆ ᄃg vˆ ̝ቢّЪͷᏮˢo
ᑅ̝ត̼ณvˆ ΞͅߍٺయЇฉഇ̝ត̼ณ dˆ ̚Ąٽ֏̝Ăg पࣃ߹ଠטώ֗ӈѣҋજ݈㒝аྃᐺ̝ΑਕĄტ˯
ٙĂӍˠΞтဦ 3 ٙϯ̝पࣃ߹ଠט̈ܫཱིր
ဦĄ̚
g o
v F v
ˆ ˆ
1≡ ă
d F vo ˆ ˆ
2 ≡ ă
g L
v F i
ˆ ˆ
3≡ ă
d F iL ˆ
4≡ ᄃ
o o
o i
Z v ˆ
≡ ˆ
̝ଯጱ˜ૄٺېၗπӮሀݭ(state average model)[1-3]Ąࣃ
˘೩۞ߏ̙ኢߏपࣃ߹ଠטٕߏπӮ߹ଠטĂᔵ
༊యЇฉഇD>0.5ॡጱᘦᑅጡ̙ᘦؠ̍үĂҭΞγΐ
தྃᐺ̝Ą[3,7-8]
ˬăਫ਼ྮྃᐺጡ̝నࢍࣧந
ࢵАᑕϡᆧৈ̳ё(Mason’s gain formula)ٺဦ 3
ဦ 3 पࣃ߹ଠט̈ܫཱིրဦ
̚ Ă Ӎ ˠ Ξ ౕ ਫ਼ ྮ (closed loop) ̝ ᓏ ᐛ ୂ ຏ ޘ (audio susceptibility) Gaud ,CLᄃᏮܡԩ(output impedance) Zo,CL
т˭Ĉ
v i i CL
aud T T
F F F F T F
G + +
− +
≡ 1
) (
4 3 2 1 1
, (10)
v i
o i o CL
o T T
F F Z F T Z
Z + +
− +
≡ 1
) (
4 5 2
, (11)
̚
2 2
4
1 )
(FH H F F FF F
Tv = m v − ≅ m v (12)
F4
F F
Ti = m i (13)
Ϥ˯Ξۢ߹ଠטݭ̝ਫ਼ྮᆧৈ(loop gain)T ࠎ1 T ᄃv Ti
̝࠹ณ(T1=Ti+Tv)Ąࡶ˧ྮ̝ણᇴࠎ̏ۢĂF ăm F ᄃi F ΞึӀՐĂซ҃ۢ4 T ̝گᇇဦĄဦ 4 ٙϯࠎi አតs ̂̈ॡe T ࠹၆ᑕ̝ត̼ĄϤဦ 4 Ξۢࡶi s ͉̂Ăe
߹ଠטݭ̝ᐹᕇঐεĂӈѩॡᘦᑅጡ̝ਫ਼ྮྃᐺጡ̝
үϡтТᑅଠטݭਠĄѩγĂT ٺᕭگጡ Вॎᐛத i ωzc(=
c rc
1 rad/sec)ޢĂӈѣ-20db/dec ̝পّĄЯѩӍ ˠдઇਫ਼ྮྃᐺጡ̝నࢍॡĂΞրਫ਼ྮᆧৈ̝Ϲᐛ த(crossover frequency)ጐณؠĂͽഇրਫ਼ྮᆧৈд఼
࿅ϹᐛதॡĂրਫ਼ྮᆧৈࢋүϡࠎT Ąٽ֏̝Ăրi
ਫ਼ྮᆧৈдωzc̝ޢӈ k/s ̝ݭၗ(type)ĄЯѩΞഇ୕
ᘦᑅጡ 90°̝࠹Ҝዶྈ(phase margin)̈́ᕭੵѨᏘگ
ဦ 4 s ၆ᑕe T ̝ត̼ဦ i
(harmonics) ̝ ّ ਕ Ą Ҍ ٺ ᘦ ᑅ ጡ ٙ ᅮ ̝ Ҳ ᘦ ၗ ᄱ म (steady state error)̝ΑਕĂӍˠӈΞӀϡ݈̝ᑅݭਫ਼
ྃᐺጡ̝నࢍ͞ڱϤT ֽనࢍv F Ăֹᘦᑅጡ̝րਫ਼v
ྮᆧৈݭၗٺωzc̝݈ࠎ k/sĂтѩ˘ֽᘦᑅጡӈΞҲᘦ
ၗᄱम̝Αਕ[8,16]Ą
αăਫ਼ྮྃᐺጡ̝నࢍՎូ
ૄٺᆇጡన౯ϡᅮࢋᄃщఢࢋՐĂܔёᘦᑅጡ (flyback regulator)дፋ࣎ᘦᑅጡξಞҫѣᓝ֖ᅅࢦ۞г ҜĄЯѩĂώ͛ͽဦ 5 ٙϯ̝ᗓݭ(isolated type)ܔё ᘦᑅጡࠎనࢍ၆෪Ăֽᄲځ˯ٙ೩̝ਫ਼ྮྃᐺጡనࢍ۞
ܮӀّᄃ၁ϡّĄనࢍՎូЕт˭Ĉ
Վូ 1 ֶయЇฉഇ̝ቑಛᏴϡዋ༊̝ PWM ଠט ICĄӈ
ࡶD>0.5ĂᑕᏴϡѣࠎγొதྃᐺ̝ PWM ଠט IC ֭నࢍ߹ຏീܡR ̝ࣃĄ s
Վូ 2 ޙ ϲ ᘦ ᑅ ጡ ̝ Ч ี ฟ ྮ ᖼ ொ ב ᇴ F1~ F5ᄃ Z [1-3]Ą o
) ( 1 ˆ
ˆ
1 s
s
N N D D v
F v zc
p s g
o
∆ +
= ′
≡ ω
(14)
) (
) 1 )(
1 ( ˆ
ˆ
2 2
s s s
N N D
V d
F v zc za
p g s o
∆
− +
= ′
≡ ω ω
(15)
) (
) 1 ( ˆ
ˆ
3 2
s s
R D
D v
F i zL
g L
∆ +
= ′
≡ ω
(16)
) (
) 1 ˆ (
4 2
s s
R D
V d
F iL g zL
∆ +
= ′
≡ ω
(17)
ဦ 5! ᗓݭܔёᘦᑅጡ
) (
) 1 1 ( ˆ ˆ
5 s
s
i D
F i zc
o L
∆ +
− ′
=
≡ ω
(18)
) (
) ( 1
ˆ ˆ
2 1 1 1
s s Q s R i
Z v eq
o o
o ∆
+ +
=
≡ ω ω
(19)
̚
)2
( 1
) (
o o o
s Q s s
ω ω + +
=
∆ (20)
c D R D R R D
L Q D
Ls c
o s ( )
1
2
2 + ′
+ ′
′
= ′
ω (21)
c R R D Q L
c eq
s +
′
=
2 1 1
1 1
ω (22)
D2
R R D
Req D c Ls + ′
= ′ (23)
c Rc
zc
= 1
ω (24)
s
za DL
R D′2
ω = (25)
zL Rc
= 1
ω (26)
c L D
s o
= ′
ω (27)
c eq
o R
ω R
ω1= (28)
Վូ 3 ॲፂϤצଠវ̶̝̄ᄃ̶ϓลᇴĂϤᑅਫ਼ྮTv ՙؠਫ਼ྮྮྃᐺጡ̝ݭၗĂͽֹրਫ਼ྮᆧৈ̝
ݭၗࠎs k Ą
ဦ 6! ώ͛ଳϡ̝ਫ਼ྃᐺጡ၁னྮဦ
ϤՎូ 2 ۢצଠវF ̶̝ϓลᇴ̶ 2 ลĂ̶̄2 ลᇴ̶ 2 ล(ӣѣ˘νΗπࢬᕇωzcᄃ˘ΠΗπ ࢬᕇωza)ĄЯѩਫ਼ྮྃᐺጡੵᅮ 1 ࣎ٺࣧᕇ
̝ໂᕇγĂ͌إᅮ 1 ࣎ໂᕇᄃ 1 ࣎ᕇĄѩ γĂЯ˘ਠ̝ଠט᎕វྮ̰࠰̏ѣ˘аྃᐺ ϡ̝ྻზٸ̂ጡΞਬӀϡĂ҂ᇋјώᄃ၁ү̝ܮ ӀّĂӍˠଳϡтဦ 6 ٙϯ̝ྮΞ႕֖ਫ਼ྮྃ
ᐺጡٙᅮՐ̝ݭၗĂᏮˢᆧৈࠎ
+ +
= +
≡
) 1 (
) 1 ( ) (
1 1 ) (
) ) ( (
3 2 1
cp cz c
c s
s
c c R s s E
s s V G
ω
ω (29)
̚
2 2
1 c
cz = R
ω ,
) //
( 1
3 2
2 c c
cp= R
ω (30)
Վូ 4 ՙؠ߹ਫ਼ྮT ̝Ϲᐛதi ωciͷ̂рĂҭ
̙Ξ̂ٺ̷ೱᐛத̝˘ΗĄአតs ̂̈࠹၆гΞe አតϹᐛதωciĂҭࡶs ͉̂Ă߹ଠטݭ̝e ᐹᕇঐεĄࣃ˘೩۞ߏࡶγΐγొྃᐺ
தॡĂϹᐛதωciϤྮણᇴՙؠ̝ͷࠎ˘ؠ ࣃĄ
Վូ 5 ՙ ؠ Ᏼ ؠ ᑅ ᄃ ߹ ਫ਼ ྮ ᆧ ৈ ̝ Ϲ ᕇ ᐛ த ωcivĂҭϹᕇᐛதᅮ̬ٺᕭگጡВॎᐛதωzcᄃ
߹ਫ਼ྮᆧৈ̝ϹᐛதมωicĄ˘ਠ҃֏Ă
<
∠
−
∠Tv,ωciv Ti,ωciv 130°ߏ˘̙̝̍ᇾ۞Ą
Վូ 6 Ᏼؠዋ༊̝ωcpăωczͽ႕֖ᑅਫ਼ྮᆧৈ̝ݭ
ၗࠎk ̝ࢋՐĄ s
ᔵۡᛇ˯Ӏϡᇴࣃ͞ڱΞՐωcpᄃωczĂͽ ϫෛڱۢωcp=min{ωzc,ωza}ͷωcz=ωoӈΞ ႕֖ࢋՐĄనωzc<ωzaĂӍˠΞۢ
c R c
c
R zc c
1 )
//
( 1
3 2 2
=
=ω (31)
) (c2 c3 Ki Kv
= + (33)
̚
2 1
2 2
2
1 2
} ] ) ( 1 [
) ( 1 1 {
2 ) (
2
o civ
za civ
p g s s civ
s s
e n
v N
N D
V T R
R R S S K
ω ω
ω ω
ω +
+ + ′
=
(34)
2 1
2 2
2 2
2 }
) ( ] ) ( 1 [
) ( 1 { 2 )
( 2
o civ o
civ zL civ
s g
s s
e n i
Q D
R V R T S S K
ω ω ω
ω ω ω
+
− + + ′
=
(35)
s p g s p s s o
n R
L R V N N L
S =V = (36)
Վូ 8 ֶਫ਼ྮྃᐺϡྻზٸ̂ጡ̝Ꮾˢઐᑅ߹(bias current)̂̈ᏴؠR ̝ࣃޢГ੨Ъё(31)~(33)ĂӍ1 ˠֶԔΞ
) (
23 3
o zc
c K ω
= ω (37)
2 1 23
2=[ ( )−1]
o
K zc
c ω
ω (38)
2 2
1 R c
ωo
= (39)
̚
i v
K
K23≡ K (40)
Վូ 9 ॲፂٙనࢍ̝ਫ਼ྮྃᐺጡĂ၆ࣧАనؠ۞ଠטវ ซҖሀᑢᄃّਕീྏĄ
Վូ 10 నࢍ˟ѨᏮᕭگྮͽ႕֖ᏮႛگᑅࢋՐ ఢॾĄ[16,17]
ࣃ˘೩۞ߏ˯ਫ਼ྮྃᐺጡ̝నࢍĂΞӀϡᅅٽг Ϥт Excel 5.0 ̝ཝइ྅హវր̼Ąܑ˟ٙϯࠎώ
̝͛၁ּనࢍඕڍĄ
ܑ˟! पࣃ߹ଠטݭᗓݭܔёᘦᑅጡ̝ਫ਼ྮྃᐺጡనࢍ
ཱི ࣃ ಏҜ ොྋ ཱི ࣃ ಏҜ ොྋ
˧ྮણᇴ ࢍზਫ਼ྮ̝Ϲᐛத(ωic)[ᜈ]
Vg 48 V Wic2,1 444452551199
Vo 12 V Wic2,2 -2020.73 ̙Ъ Io 2.4 A Wic1,1 666673 rad/sec ୬Րࣃ(Wci1,1=ωci) Ls 22.5 µH Wic1,2 -666673 ̙Ъ Lp 90 µH fc 3 kHz
c 4400 µF ωciv 18840 rad/sec ҋؠࣃ R 5 ohm ωciv /ωzl 414.48
Rl 0.005 ohm ωciv /ωza 0.06 Rc 0.012 ohm ωciv /ωo 8.89 Ns/Np 0.50 ωciv /ωzc 0.9948
Vg' 24.00 ωciv /QW 3.92 fs 100.0 kHz ฟᙯ̷ೱᐛத G_Ti_Wciv 35.79 dB ωs 628000 rad/sec ਫ਼ྮྃᐺጡనࢍ
Ts 0.00001 sec R1 7.60 kohm ҋؠ sn 320000 V/sec Kv 0.005 sf 80000 V/sec C2+C3 819.4 pF PWM 3 ਔگᆵޘአតଠטጡ C3 91.7 pF ୬Րࣃ
Rs 0.3 C2 728 pF ୬Րࣃ D 0.33 యЇฉഇ R2 648.6 kohm ୬Րࣃ D' 0.67 DC_Gain_Controller 104 dB ωo 2119 rad/sec ਫ਼ྮྃᐺጡనࢍّ̝ਕෞҤᄃរᙋ
Q 2.27 ωo /ωzc 0.1119 Fm 2.08 ωo /ωzl 46.61 Fi 0.3 ωo /QW 0.44
H2 0.3 H2=Rs G_Tv /ωciv 35.79 ᅮඈٺ G_Ti _ωciv
H4 0.0222 G_Tv /ωo 66 dB
ωza 296296 G_Ti /ωo 24 dB ωzc 18939 DC_Gain_Tv 130 dB ωzl 45.5 DC_Gain_Ti 16.59 dB
QW 4802.2 R2_new 648.56 kohm R2 ̝ͅរᙋࣃ Ki 6.75 WF 18939 rad/sec
ࢍზਫ਼ྮ̝Ϲᐛத(ωic) Deg_Ti /ωciv -77.3 deg TiA 4.9618E-14 Deg_Tv /ωciv -177.3 deg
TiB -0.022053 DegTv(Ti -Tv)_ωciv 99.9 deg υื႕֖≤130°
TiC -44.56
̣ăሀᑢᄃ၁រඕڍ
Ϥё(15)ΞۢܔёᘦᑅጡхдΠΗπࢬᕇ(
ڱЪͼ̈࠹Ҝ۞୧І)ĂЯѩਫ਼ྮྃᐺጡ̝నࢍՀ߄ ጼّĄЯѩĂώ͛ͽဦ 5 ٙϯ၁ּྮĂֽᄲځ֭រᙋٙ
೩ਫ਼ྮྃᐺጡనࢍԫఙ̝ΞҖّᄃ၁ϡّĄҌٺΑதྮ
̝నࢍĂϤٺቔ಼ѣࢨͷ࠹ᙯ͛ᚥ̏ѣ࠹༊̝ଣĂώ͛
̙Гᖴ[3,8,18]Ą҃ࠎԆፋ֍Ӎˠᘦᑅጡ̝࠹ᙯ
ྮણᇴЕٺ˭Ĉ V 60
~
=36
Vg , VVo=12 ,Lp=90µH,RLP =105mΩ
5 .
=22
Ls µH,RLs =25mΩ,c=4000µF,Rc = m12 Ω kHz
=100
fs , Rs= 30. Ω, 630Sw:IRF
ЯࠎయЇฉഇٺፋ࣎̍үቑಛ࠰̈ٺ 0.5ĂЯѩᏴϡт UC 1842 ̝̙ᅮγొதྃᐺ PWM ଠט IC[7]ĄѩγĂ ࣃ˘೩۞ߏϤٺᅮγొதྃᐺ(ӈse=0)Ă߹ਫ਼
ྮT ̝ Ϲ ᐛ தi ωci Ϥ ྮ ણ ᇴ ՙ ؠ ̝ ( ٺ ѩ ּ ̚ sec
/ rad 666673
ci=
ω )Ą
ЯѩĂࡶᏴؠω =civ 2π(3k)rad/secĂR1=7.6kΩͷ
˯ඈྮણᇴˢё(37)~(39)̚ĂӍˠΞ࠹༊टٽг
ਫ਼ྮྃᐺጡٙᅮ̝ણᇴՐт˭Ĉ
C3
R2 c2 7
2 1 3 45
8 6
UC1842
7.5k
10 20k
510
2.2n 1u RS
R1
Sw
2k
ဦ 7 ᘦᑅጡ၁ᅫྮဦ
100 50 0 -50
0 -100 -200
100 50 0 -50
0 -100 -200
T1 T1
Tv
T1 T1
Tv F2 F2
Tv
100 102 104 106 108
(rad/sec) (a)
100 102 104 106 108
(rad/sec) (b) Tv, Ti, F2
(deg) (dB) (deg) (dB)
Tv
Ti T1
ဦ 8! ᘦᑅጡᑕϡٙ೩ਫ਼ྮྃᐺጡޢ̝گᇇဦ Ω
=648.6k
R2 Ăc2=728pFĂc3=91.7pF
ᘦᑅጡ̝ፋវ၁ᅫྮဦᄃگᇇဦ̶Ҿтဦ 7 ᄃ 8 ٙ ϯĄϤဦ 8 ӍˠΞۢٙ೩నࢍ̝ਫ਼ྮྃᐺጡΞֹᘦᑅጡ
ѣܕ 80°̝࠹Ҝዶྈ(phase margin)γĂ߹ਫ਼ྮT ̝Ϲ i
V0 12V
(I0: 1A/div, lms/div; V0: 100mV/div, lms/div) ဦ 9! ᘦᑅጡᏮᑅ̝ྶՎ৺ᜩᑕگԛဦ
ᐛதωciࣃቁ၁ᄃநኢ࠹Ąဦ 9 ٙϯࠎѩᘦᑅጡᏮ̝
ّਕপّဦĄϤဦ 9 ӍˠΞۢٙ೩̝ਫ਼ྮྃᐺጡ̙ኢٺՎ
৺ΐྶٕഴྶĂᘦᑅጡ࠰ѣ࠹༊։р̝ᇶၗᜩᑕγĂዋ༊
гΐˢ˟ѨᏮᕭྮቁ၁Ξ႕֖Ꮾႛگᑅ̝ࢋՐఢ ॾĄ
̱ăඕ ኢ
ώ͛ࢵАޙϲᘦᑅጡᄃपࣃ߹ଠטඉர̝ᇴጯሀ ݭĄ҃ޢĂੵͽᖎಏ۞៍هᄲځपࣃ߹ଠטඉரྃᐺጡ
۞నࢍࣧநγĂ֭೩˘ᖎಏͷ၁ϡ̝ਫ਼ྮྃᐺጡనࢍ͞
ڱĄٙ೩̝ਫ਼ྮྃᐺጡనࢍ͞ڱੵࠎుซё(step by step) γĂ֭ΞᅅٽгӀϡт Excel 5.0 ̝ཝइ྅హវր
̼Ăซ಼҃̂г೩ਫ਼ྮྃᐺጡ̝నࢍड़தĄགྷሀᑢᄃ၁ រീྏඕڍۢᑕϡٙ೩నࢍԫఙٙనࢍ۞ਫ਼ྮྃᐺጡĂ ӈֹΠΗπࢬᕇপ̷ّ̝ೱёᘦᑅጡĂϺΞᅅٽгֹ
ᘦᑅጡ႕֖ٙᅮّ̝ਕఢॾࢋՐĄ
ཱི৶͔
c ᘦᑅጡ˧ट
c ,2 c 3 ਫ਼ྮྃᐺጡट d యЇฉഇ
dˆ యЇฉഇ̈ੈཱིϹ߹ត̼ณ D యЇฉഇۡ߹ณ
F i ߹ਫ਼ྮᖼொבᇴ F j ฟྮᖼொבᇴ
F m యЇฉഇਫ਼ྮᖼொבᇴ F v ᑅਫ਼ྮྃᐺጡᖼொבᇴ ωs ฟᙯ̷ೱᐛத
G c ਫ਼ྮྃᐺጡᖼொבᇴ
CL
Gaud, ౕਫ਼ྮ̝ᓏᐛୂຏޘ H j पࣃ߹ଠטਫ਼ྮણᇴ
iˆ o ྶ߹តજณ I ಏҜੱ
L p ᘦᑅጡ˘Ѩຏ L s ᘦᑅጡ˘Ѩຏ R ྶܡ
R ,1 R 2 ਫ਼ྮྃᐺጡܡ R c ᘦᑅጡ˧ट̰ܡ
LP
R ᘦᑅጡ˘Ѩຏ̰ܡ RLs ᘦᑅጡ˘Ѩຏ̰ܡ R s פᇹ߹̝פᇹܡ s ٛёᖼೱྻზ̄
s e γొྃᐺத s f פᇹ߹̝˭ࢫத s n פᇹ߹̝˯̿த T 1 ਫ਼ྮᆧৈ
T i ߹ਫ਼ྮᆧৈ
T s ฟᙯ̷ೱฉഇ T v ᑅਫ਼ྮᆧৈ
vˆ g Ꮾˢᑅត̼ณ vˆ o Ꮾᑅត̼ณ V g Ꮾˢᑅ V o Ꮾᑅ
Z o Ꮾܡԩᖼொבᇴ
CL
Zo, ౕਫ਼ྮ̝Ꮾܡԩ ωci ߹ਫ਼ྮϹᐛத
ωciv ᑅᄃ߹ਫ਼ྮᆧৈ̝Ϲᕇᐛத ωcp ਫ਼ྮྃᐺጡໂᕇᐛத
ωcz ਫ਼ྮྃᐺጡᕇᐛத ωza צଠវΠΗπࢬᕇ ωzc ᕭگጡВॎᐛத
ᔁ
ώ ࡁ տ ຏ ᔁ ઼ ࡊ ົ གྷ ྃ ӄ Ă ࢍ ൪ በ ཱི Ĉ NSC 90-2516-S-233-001Ą
ણ҂͛ᚥ
1. Middlebrook, R. D., and Cuk, S., “A General Unified Approach to Modeling Switching-Converter Stages,”
IEEE Power Electronics Specialist Conference, Cleveland, OH, USA, pp. 18-34 (1976).
2. Middlebrook, R. D., “Small-Signal Modellng of Pulse- Width Modulated Switched-Mode Power Converter,”
Proceedings of the IEEE, Vol. 76, No. 4, pp. 343-354, (1988).
3. Severns, R. P., and Bloom, G., Modern DC-to-DC Switchmode Power Converter Circuits, Van Nostrand Reinhoid, New York (1985).
4. Kuo, C. C., and Tzou, Y. Y., “Frequency Response Curve Fitting Design of the Loop Compensator of a Switching Mode DC-DC Regulator,” The 11th Symposium on Elect- rical Power Engineering, Taipei, pp. 319-333 (1990).
5. Qiu, S. S., Filanovsky, I. M., and Lin, B. T., “A New Method of Analysis for PWM Switching Power Con- verters,” International Journal of Electronics, J. Electro- nics, Vol. 86, No. 11, pp. 1395- 1410 (1999).
6. Kislovski, A. S., Redl, R., and Sokal, N. O., Dynamic Analysis of Switching-Mode DC/DC Converters, Van Nostrand Reinhoid, New York (1991).
7. Unitrode Application Note, UC3842/3/4/5 Provides Low-Cost Current-Mode Control, U-100A (1994).
8. Wang, S. S., “Stability Analysis and Control Design of PWM Switched Mode Power Converters,” Ph. D.
Dissertations, Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan, R.O.C. (1989).
9. Ridley, R. B., Cho, B. H., and Lee, F. C., “Analysis and Interpretation of Loop Gains of Multiloop-Controlled Switching Regulators,” IEEE Transactions on Power Electronics, Vol. 3, No. 4, pp.545-554 (1988).
10. Chio, B., Cho, B. H., and Lee, F. C., “Three-Loop Control Multimodule Converter Systems,” IEEE Transactions on Power Electronics, Vol. 8, No. 4, pp.466-474 (1993).
11. Middlebrook, R. D., “A Unified Model for Current- Programmed Converter,” IEEE Transactions on Power Electronics, Vol. 10, No. 4, pp. 397-408 (1995).
12. Lin, C. S., and Chen, C. L., “Single-Wire Current-Share Paralleling of Current-Mode-Controlled DC Power Sup- plies,” IEEE Transactions on Industrial Electronics, Vol.
47, No. 4, pp. 780-786 (2000).
13. Sanders, S. R., and Verghese, G. C., “Synthesis of Averaged Circuit Models for Switched Power Converters,”
IEEE Transactions on Circuits and Systems, Vol. 38, No.
8, pp. 905-915 (1990).
14. Vincenti, D., and Jin, H., “A Generalized Approach for Input Unbalance Correction in Polyphase Converters,”
IEEE Industrial Electronics, Control and Instrumentation Conference, Orlando, FL, USA, pp. 365-369 (1995).
15. Pan, C. T., and Shieh, J. J., “A Closed form Duty Cycle Control for Advanced Static VAR Compensators,” The 2nd International Power Electronics and Motion Control Conference, Hangzhou, China, pp. 477-482 (1997).
16. Shieh, J. J., Wang, S. S., and Wu, M., “Loop Compensator Design for Combining Secondary Output Filter Switching Mode Step Down DC/DC Regulator,” The 21th Sympo- sium on Electrical Power Engineering, Taipei, Taiwan, pp.
848-852 (2000).
17. Ridley, R. B., “Secondary LC Filter Analysis and Design Techniques for Current-Mode-Controlled Converters,”
IEEE Transactions on Power Electronics, Vol. 3 No. 2, pp.
499- 507 (1988).
18. Chetty, P. R. K., Switch-Mode Power Supply Design, TAB BOOK/s, Inc., New York (1986).
2001 ѐ 04 ͡ 11 ͟! ќቇ 2002 ѐ 03 ͡ 18 ͟! ܐᆶ 2002 ѐ 08 ͡ 29 ͟! ኑᆶ 2002 ѐ 09 ͡ 09 ͟! ତצ