場強度，改善元件retention 特性與其他優點的前提下，結合兩種機制所貢獻的Δ VFB，來實現具有更大記憶窗的混雜式記憶體。且由於元件的製造過程中主要屬
Control SiO2oxide Ni electrode
Capping SiO2oxide
C60+PVK thin film Tunnel SiO2oxide
P-type Si substrate Control SiO2oxide Control SiO2oxide
Ni electrode Ni electrode
Capping SiO2oxide Capping SiO2oxide
C60+PVK thin film Tunnel SiO2oxide Tunnel SiO2oxide
P-type Si substrate P-type Si substrate
圖 7-1 混和型浮動閘極記憶體電容結構示意圖
參考文獻
[1] “2011 Overall Roadmap Technology Characteristics (ORTC) Tables,”
International Technology Roadmap for Semiconductors(ITRS), Available:
http://www.itrs.net/Links/2011ITRS/2011Tables/ORTC_2011Tables.xlsm.
[2] D. Kahung and S. M. Sze, “A floating gate and it’s application to memory devices,” Bell Syst.Tech, vol. 45, pp. 1288, 1967.
[3] G. Atwood, “Future directions and challenges for ETox Flash memory scaling,”
IEEE Trans. Device Mater. Reliab., vol. 4, no. 3, pp. 301-305, Sep. 2004.
[4] Marvin H. White, Dennis A. Adams, and Jiankang Bu, “On the go with SONOS,”
IEEE Circuits Devices Mag., vol. 16, no. 4, pp. 22-31, 2000.
[5] S. Tehrani, “Status and outlook of MRAM memory technology,” IEEE International Electron Devices Meeting(IEDM), pp. 21.6.1, 2006.
[6] J. H. Oh et al., “Full integration of highly manufacturable 512 PRAM based on 90nm technology,” IEEE International Electron Devices Meeting(IEDM), pp. 49, 2006.
[7] T. H. Hou, “Metal-oxide resistive-switching RAM technology,” McGraw-Hill 2011 Yearbook of Science and Technology, ISBN 9780071763714.
[8] J. J. Huang, C. W. Kuo, W. C. Chang, and T. H. Hou, “Transition of stable rectification to resistive-switching in Ti/TiO
2/Pt oxide diode,” Appl. Phys. Lett., vol.
96, no. 26, pp. 262901-1–262901-3, 2010.
[9] H. A. R. Wegener, A. J. Lincoln, H. C. Pao, M. R. O’Connel, and R. E. Oleksiok,
“Metal insulator semiconductor transistors as a nonvolatile storage,” IEEE International Electron Devices Meeting(IEDM), Washington, DC, 1967, Abstract 59.
[10] Stephen J. Wrazien, Yijie Zhao, Joel D. Krayer, and Marvin H. White,
“Characterization of SONOS oxynitride nonvolatile semiconductor memory devices,”
Solid State Electronics, vol. 47, no. 5, pp. 885-891, May 2003.
[11] I. Fijiwara, H. Aozasa, K. Nomoto, S. Tanaka, and T. Kobayashi, “High speed program/erase sub 100 nm MONOS memory cell,” Proc. 18th Non-Volatile Semiconductor Memory Workshop, pp. 75, 2001.
[12] M. K. Cho and D. M. Kim, “High performance SONOS memory cells free of drain turn-on and over-erase: Compatibility issue with current flash technology,”
IEEE Electron Device Lett., vol. 21, pp. 399–401, Aug. 2000.
[13] C. H. Lee, K. I. Choi, M. K. Cho, Y. H. Song, K. C. Park, and K. Kim, “A novel SONOS structure of SiO2/SiN/Al2O3 with TaN metal gate for multi-giga bit flash memories,” IEEE International Electron Devices Meeting(IEDM), pp. 613–616, 2003.
[14] H. T. Lue et al., “BE-SONOS: A bandgap engineered SONOS with excellent performance and reliability,”IEEE International Electron Devices Meeting(IEDM), pp. 547-550, 2005.
[15] P. Xuan et al., “FinFET SONOS falsh memory for embedded applications,”
IEEE International Electron Devices Meeting(IEDM), pp. 609-612, 2003.
[16] Chungho Lee, Jami Meteer, Venkat Narayanan, and Edwin C. Kan,
“Self-assembly of metal nanocrystals on ultrathin oxide fornonvolatile memory applic ations,” Journal of Electronic Materials, vol. 34, no. 1, pp. 1-11, 2005.
[17] I. C. Chen, C. Tencg, D. Coleman, and A. Nishimura, “Interface-trap enhanced gate-induced leakage current in MOSFET,” IEEE Electron Device Lett., vol. 10, no. 5, pp. 216-218, 1989.
[18] T. H. Hou , U. Ganguly, and E. C. Kan, “Programable molecular orbital states of C60 from integrated circuits,” Applied Physics Letters, vol. 89, no. 25, pp. pp.
253113-1 -253113-3, 2006.
[19] Jonathan Shaw, Yu-Wu Zhong, Kevin J. Hughes, Tuo-Hung Hou, Hassan Raza,
Shantanu Rajwade, Julie Bellfy, James R. Engstrom, Héctor D. Abruña, and Edwin Chihchuan Kan, “Integration of Self-Assembled Redox Molecules in Flash Memory Devices,” IEEE Trans. Electron Devices, vol.58, no.3, pp. 826 – 834, Mar. 2011.
[20] G. Mathur, S. Gowda, Q. Li, S. Surthi, Q. Zhao, and V. Misra, “Properties of functionalized redox-active monolayers on thin silicon dioxide—A study of the dependence of retention time on oxide thickness,” IEEE Transactions on Nanotechnology, vol. 4, no.2, pp. 278–283, Mar.2005.
[21] T. H. Hou, H. Raza, K. Afshari, D. J. Ruebusch, and E. C. Kan, “Nonvolatile memory with molecule-engineered tunneling barriers,” Appl. Phys. Lett., vol. 92, no.
15, pp. 153109, Apr. 2008.
[22] Jonathan Shaw, Qianyin Xu, Shantanu Rajwade, Tuo-Hung Hou, and Edwin Chihchuan Kan, “Redox Molecules for a Resonant Tunneling Barrier in Nonvolatile Memory,” IEEE Trans. Electron Devices, vol. 59, no. 4, pp. 1189-1198, 2012.
[23] Giorgio Cellere, Alessandro Paccagnella, Angelo Visconti, Mauro Bonanomi, S.
Beltrami, Jim R. Schwank, Marty R. Shaneyfelt, Philippe Paillet, “Total ionizing dose effects in NOR and NAND flash memories,” IEEE Trans. Nucl. Sci., vol. 54, no.
4, pp. 1066, 2007.
[24] S. Saito and A. Oshiyama, “Cohesive mechanism and energy bands of solid C60,”
Phys. Rev. Lett. vol. 66, pp. 2637, 1991.
[25] “Physical Properties of Fullerenes,” SES research, Available:
https://sesres.com/PhysicalProperties.asp
[26] B. Mishori, Yoram Shapira, A. Belu-Marian, M. Manciu, A. Devenyi, “Studies of C60 thin films using surface photovoltage spectroscopy,” Chem. Phys. Lett. vol. 264, pp. 163, 1997.
[27] G. Sberveglieri, G. Faglia, C. Perego, P. Nelli, R.N. Marks, T. Virgili, C. Taliani, R. Zamboni, “Hydrogen and humidity sensing properties of C60 thin films,” Synth.
Met., vol. 77, pp. 273-5, 1996.
[28] S. Tin and A. Lal, “Van-der Waals thin-film C60 MEMS,” Solid-State Sensors, pp.
232–235, June 2009.
[29] J. F. Moulder, W. F. Stickle, P. E. Sobol, and K. D. Bomben, “Handbook of x-ray photoelectron spectroscopy,” Jill Chastain, United States of America, 1992.
[30] B. Pevzner, A. F. Hebard, M. S. Dresselhaus, “Role of molecular oxygen and other impurities in the electrical transport and dielectric properties of C60 films,”
Physical Review B, vol. 55, no. 24, pp. 16439-16449, 1997.
[31] Sarah Paydavosi, Katherine Aidala, Patrick R. Brown, Pouya Hashemi, Timothy P. Osedach, Judy L. Hoyt , Vladimir Bulović, “High-density charge storage on molecular thin films - candidate materials for high storage capacity memory cells,”
IEEE International Electron Devices Meeting(IEDM), pp. 24.4.1 - 24.4.4 , Dec. 2011.
[32] Shashi Paul, “Realization of nonvolatile memory devices using small organic molecules and polymer”, IEEE Transactions on Nanotechnology, vol. 6, no. 2, pp.
191-195, Mar. 2007.
[33] Yusuke Tanaka, Kaname Kanai, Yukio Ouchi, Kazuhiko Seki,“Oxygen effect on the interfacial electronic structure of C60 film studied by ultraviolet photoelectron spectroscopy,” Chemical Physics Letters, vol. 441, no. 1–3, pp. 63–67, June 2007.
[34] S. L. Miller, R. D. Nasby, J. R. Schwank, M. S. Rodgers, and P. V.
Dressendorfer, “Device modeling of ferroelectric capacitors,” J. Appl. Phys., vol. 68, no. 12 , pp. 6463 – 6471, 1990.
[35] T. P. Ma, Jin-Ping Han, “Why is nonvolatile ferroelectric memory field-effect transistor still elusive?,” IEEE Electron Device Letters, vol. 23, no. 7, pp. 386-388, 2002.
[36] S. Paydavosi, H. Abdu, G. J. Supran, and V. Bulovi´c, “Performance comparison of different organic molecular floating-gate memories,” IEEE Transactions on
Nanotechnology, vol. 10, pp. 594, 2011.
簡歷
z 基本資料
姓名:黃旺駿 (Wang-Chun Huang) 性別:男
生日:民國 77 年 3 月 26 日
住址:高雄市三民區清風街 24 巷 2 號 電話:07-3838423
E-mail:[email protected] z 學歷
國立清華大學工程與系統科學系(95 年 9 月~99 年 6 月) 國立交通大學電子研究所碩士班(99 年 9 月~101 年 9 月) z 論文題目
以巴克球作為浮動閘極之有機非揮發性記憶體
Organic Nonvolatile Memory Using C60 as Floating Gate z 研究領域與執行計畫
國科會，(100~102 年) 異質整合分子/矽電子元件:高電荷密度與電致變色 分子浮動閘極記憶體之開發
Publication List
會議論文 (Conference Papers)
Wang-Chun Huang, Wun-Cheng Luo, and Tuo-Hung Hou, “Fully CMOS-compatible Chemoreceptive Neuron MOS (CυMOS) Transistor for Fluid Sensing ,” International Electron Device and Material Symposium, Taipei, Taiwan, 17-18 November, 2011.