2.3.1 C-V Characteristics of Ge MOSCAP
Fig. 2.3 shows the multi frequency C-V of Ge MOSCAPs with different PDA condition. We can see that the MOSCAPs used post deposition oxidation GeOx have smaller EOT than RTO thermal grown GeO2, which means Al2O3 layer could be an oxygen barrier that suppresses the growth of unnecessarily thick GeOx ILs. A negative flat band voltage (VFB) shift is often observed for Ge MOS capacitors, its origin has not yet been addressed [8]. The positive VFB shift is shown in post deposition oxidation GeOx samples compared with thermal grown GeO2. The larger EOT is shown in PDA O2 condition compared with PDA N2, we think that the larger EOT of PDA O2 is due to the growth of thicker GeOx ILs.
Fig. 2.4 shows the multi frequency C-V of Ge MOSCAPs with different post deposition oxidation condition. The EOT value was scaled down to 1.41nm for
HfO2/Al2O3 with post deposition oxidation GeOx 520°C 3min sample. We can see that the MOSCAPs with higher post deposition oxidation temperature have larger EOT and hump become much smaller in depletion region, we supposed that the higher post deposition oxidation temperature may increase GeOx interfacial layer thickness, which lower the capacitance value but improve the interface quality. The smaller EOT of gate stacks HfO2/Al2O3 than gate stacks Al2O3/Al2O3 is due to the higher dielectric constant of HfO2.
The oxide capacitance, EOT, flat band voltage and C-V hysteresis of all conditions are shown in Table 2.3, Table 2.4.
Although the interfacial layer GeO2 gave the low density of interface states and high comprehensive performance, a large amount of fixed charge was introduced at the interface, which caused flat band voltage shifting that has not been systematically investigated yet [9]. High density fixed charges would cause lower mobility by strong coulomb scattering and shift of the threshold voltage.
The large C-V hysteresis is observed for our samples, more specifically for HfO2
gate stacks, is caused by bulk oxide traps and is not related to the passivation of the Ge interface [10].
Fig. 2.5 (a) shows the Ge 3d XPS spectra of Al2O3/GeOx/p-Ge with PDO 520 °C 30sec, PDO 520 °C 3min, PDO 550 °C 3min and RTO thermal GeO2 520 °C 30sec.
We can see that with an increase in the post deposition oxidation time or temperature, the GeOx peak become larger, which means the GeOx layer becomes thicker. This peak energy is lower than the core level of Ge4+, indicating that the interfacial oxides could include Ge suboxides. Fig. 2.5 (b) shows the deconvolution of GeOx peak to the peak corresponding to each Ge oxidation state. We can see that with an increase in the post deposition oxidation time or temperature, the Ge3+peak become larger but the Ge4+ peak remain the same. While the RTO thermal GeO2 520 °C 30sec sample has a large Ge4+ peak, no significant components of lower oxidation states are detected.
2.3.2 Conductance Method
The conductance method, proposed by Nicollian and Goetzberger in 1967, is one of the most sensitive methods to determine Dit [11]. It is the most complete method, because it yields Dit in the depletion and weak inversion portion of the bandgap and the capture cross-sections for majority carriers . Although Terman and high-low
frequency capacitance methods could extract Dit, they will largely overestimate the Dit value on Ge because of the humps caused by “minority carrier response” in the C-V curve. Conductance method is based on measuring the equivalent parallel
conductance GP of an MOSCAP as a function of bias voltage and frequency, the C-V measurement applying gate bias a small sinusoidal voltage with frequency f and amplitude 25mV, the conductance is representing the loss mechanism due to interface trap capture and emission of carriers.
The simplified equivalent circuit of MOSCAP appropriate for the conductance method is shown in Fig. 2.6 (a). It consists of the oxide capacitance Cox , the
semiconductor capacitance CS, and the interface trap capacitance Cit . The circuit can be simplified as in Fig. 2.6 (b),
The interface trap time constant, given by
(2.3) Equations (2.1) and (2.2) are for interface traps with a single energy level in the bandgap. But in reality, interface trap are continuously distributed across the bandgap.
Capture and emission occurs primarily by traps located within a few kT/q above and below the Fermi level, leading to a time constant dispersion and giving the normalized conductance as
(2.4) From (2.2) and (2.4), conductance method is easier to extract Dit than capacitance based method, because it does not require Cs. For (2.4), when GP/ω is plotted as a function of ω, the maximum appears at ω ≈ 2/τit, and at that maximum
(2.5) GP/ω plots are repeated at different gate voltage to determine Dit from the maximum GP/ω and determine τit from ω at the peak conductance location on the ω-axis.
In the measurement, we assumed the device to consist of the parallel Cm − Gm
combination in Fig. 2.6 (c). The circuit gives GP/ω in terms of the measured capacitance Cm, the oxide capacitance Cox, and the measured conductance Gm as
- (2.6) According to τit
th e EkT , the interface trap time constant as a function of temperature determines the part of interface traps in the bandgap observable in the MOS admittance characteristic. The traps located near to midgap could be observed at higher temperatures, while traps located near the band edges could be observed at lower temperature. And for small bandgap Ge, mid gap traps are able to be observed at room temperature. The behavior of the interface trap time constant at room
temperature as a function of capture cross section is shown in Fig. 2.7, which determines the part of interface traps in the bandgap observable in the MOS admittance characteristic. The electron thermal velocity, hole thermal velocity, effective density of states of conduction band (Nc) and effective density of states of valence band (Nv) are all taken into account.
Fig. 2.8 shows the 2.5GP/ωq versus frequency of Ge MOSCAPs with different PDA condition. Fig. 2.9 shows the 2.5GP/ωq versus frequency of Ge MOSCAPs with
different post deposition oxidation condition, and the measurement is performed at room temperature. The peak value of each 2.5GP/ωq curve equals to the interface state density, and the frequency corresponding to the maximum 2.5GP/ωq can be converted to energy in the bandgap by the equation . Therefore, the interface state density versus energy in the bandgap plots can be obtained by repeated at different gate voltages to scan trap energies.
The value of capture cross section is assumed to be around 10-16 cm2 in this thesis. Dit profiles of each samples near midgap is shown in Fig. 2.10. We can see that in Fig. 2.10 (a), the post oxidation deposition samples have less interface state density than RTO thermal GeO2, while we observed that Ge 3d XPS spectra of thermal GeO2 samples have large Ge4+ peak, which means it is not necessary to have a large Ge4+
peak to passivate high-k/Ge interface, the Ge3+ peak shows better interface quality than Ge4+ peak in our studies. Also, the O2 PDA samples have less interface state densitythan N2 PDA samples, we think the reason of less interface state density may because of thicker GeOx grown after O2 PDA.
Fig. 2.10 (b) shows that the higher temperature of post deposition oxidation samples have less interface state density than the lower temperature of post deposition oxidation samples. The Dit of GeOx/Ge MOS interface controlled by the GeOx
thickness has been studied [4]. We think the less interface state density is because of the thicker GeOx interfacial layer and larger Ge3+ peak which the higher post
deposition oxidation temperature grown.
The results shows more interface state density in the midgap, this phenomenon is called “weak inversion response” [12]. In the weak inversion regime, the C-V and conductance behavior becomes more complex, as shown in Fig. 2.11. In the weak inversion regime interface traps can communicate with both the majority and minority
carrier bands, as shown on the band diagram of Fig. 2.11 (a), due to the small
minority carrier time constant as the Fermi level located near midgap, the traps being filled and emptied by the ac voltage near the Fermi level can communicate with the minority band sufficiently fast and provide minority carriers to the band. When this dual communication occurs it leads to a larger conductance response than the typical depletion response.
The presence of the weak inversion response within the typical 1kHz to 1MHz measurement frequency window depends on the bandgap energy, the capture cross section and the temperature. For the Si/SiO2 interface this effect has been shown to be present at lower frequencies at room temperature, not to occur in the 1kHz to 1MHz frequency window. But for small bandgap materials like germanium, the weak inversion response will be shown to be present in the 1kHz to 1MHz window.
Therefore, conductance method for Ge MOSCAPs will overestimate the interface state density.
From the interface trap time constantτit
, the smaller bandgap material, larger capture cross section and higher temperature lead weak inversion response more significant. Thus, the low temperature measurement can alleviate the dual communication.