Future Work

For higher frequency applications more accurate RF CMOS component models such as large size MIM capacitors and different inductance spiral inductors with higher Q-value should be built up for exactly matching network design in the future.

All parasitic effects including parasitic capacitance, resistance and inductance must be considered more carefully. A more accurate and efficient EDA tool for extracting parasitic effects is quietly important.

The concurrent dual-band LNA may be improved as gain-controllable one for higher dynamic linearity application and lower noise figure to depress the total noise figure of the receiver. As for the dual-band receiver front-end, it has been proved as feasible by the implementation in this thesis, so the fully integrated dual-band transceiver, including receiver front-end, power amplifier, up-mixer, quadrature VCO, multi-modulus frequency synthesizer, and IF Gm-C filters may be realized for future system-on-chip (SOC) design. The multi-band or wide-band transceiver innovation marching forwards SOC design, either in circuit topology or transceiver architecture will be the most challenging design in the future.

Reference

[1] Stephen Wu and Behzad Razavi, “A 900-MHz/1.8-GHz CMOS Receiver for Dual-Band Applications,” IEEE Journal of Solid-State Circuits, pp. 2178-2185, Vol. 33, December 1998

[2] Zhenbiao Li, Richard Quintal, and Kenneth K. O, “A Dual-Band CMOS Front-End With Two Gain Modes for Wireless LAN Applications,” IEEE Journal of Solid-State Circuits, pp. 2069-2073, Vol. 39, November 2004.

[3] Christina F. Jou, Kuo-Hua Cheng, Pang-Ruci Huang and Mei-Chien Chen,”

Design of a fully integrated high linearity dual-band CMOS LNA,” Electronics, Circuits and Systems, ICECS 2003, pp. 978-981, Vol. 3, 14-17 Dec. 2003

[4] Christina F. Jou, Kuo-Hua Cheng, Wei-Cheng Lien, Chun Hsien Wu, and Chin Hsien Yen, “Design of a concurrent dual-band receiver front-end in 0.18um CMOS for WLANs IEEE 802.11 a/b/g Applications,” Midwest Symposium on Circuits and Systems (MWSCAS), pp. 177 -180, Vol. 1, July, 2004

[5] Floyd, B.A., Mehta, J., Gamero, C., and Kenneth, K.O.,” A 900-MHz, 0.8-µm CMOS low noise amplifier with 1.2-dB noise figure”, Custom Integrated Circuits, 1999. Proceedings of the IEEE 1999, pp. 661-664, May 1999.

[6] Behzad Razavi,“RF Microelectronics,” Prentice Hall, 1998.

[7] Hossein Hashemi and Ali Hajimiri,“Concureent Multi-band Low-Noise Amplifiers Theory, Design, and Applications,” IEEE Transactions on Microwave Theory and Techniques, Vol.50, pp. 288-301, Jan 2002.

[8] Thomas H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits , Cambridge, U.K. : Cambridge University Press, 1998.

[9] Bosco Leung, VLSI For Wireless Communication, Prentice Hall Co. , 2002.

[10]Christina F. Jou, Kuo-Hua Cheng and Chin-Hsien Yen, “Design of a Dual-Band

Low-Noise Amplifier for WLAN Applications”, IEEE Transaction on Microwave Theory and Techniques Mini-Special Issue on: Papers of Asia-Pacific Microwave Conference (APMC 2004), New Delhi, India, Dec.

15-18, 2004.

[11] www.cic.org.tw

[12] Tsang, T.K.K.; El-Gamal, M.N.; ”Dual-band sub-1 V CMOS LNA for 802.11a/b WLAN applications,” International Symposium on Circuits and Systems, Vol. 1, pp. 217-220, May 2003.

[13] Mou Shouxian; Ma Jianguo; Yeo Kiat Seng; Do Manh Anh;” An integrated dual-band low noise amplifier for GSM and wireless LAN applications,” IEEE International Systems-on-Chip Conference, pp. 67-70, September 2003.

[14] Dong Feng; Bingxue Shi;“A 2.5-V 2.45/5.25 GHz dual-band CMOS LNA,”

International Conference on ASIC, Vol. 2, pp. 1110-1113, Oct 2003.

[15] IEEE Std 802.11, Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: High-Speed Physical Layer in the 5 GHz Band, September 1999.

[16] IEEE Std 802.11, Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: High-Speed Physical Layer Extension in the 2.4GHz Band, September 1999.

[17] IEEE Std 802.11, Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications Amendment 4: Further Higher Data Rate Extension in the 2.4GHz Band, June 2003.

[18] Behzad Razavi. RF Microelectronics, Prentice Hall, 1998.

[19] Adiseno, Mohammed Ismail, Hakan Olsson, “A Wide-Band RF Front-End for Multiband Multistandard High-Linearity Low-IF Wireless Receivers,” IEEE

[20] Chun-Hsien Wu, “Design of Sub-Harmonic Mixer For Concurrent Dual-Band Receiver Front-End,” M. S. thesis, Department of Communication Engineering, National Chiao Tung University, Hsin Chu, Taiwan, R.O.C. 2005.

[21] Kwang-Jin Koh; Mun-Yang Park; Yong-Sik Youn; Scon-Ho Han; Jang-Hong Choi; Cheon-Soo Kim; Sung-Do Kim; Hyun-Kyu Yu;” A merged structure of LNA & sub-harmonic mixer for multi-band DCR applications,” IEEE MTT-S International Microwave Symposium Digest, pp. 243-246, Vol. 1, June 2003.

[22] Chun-Chih Hou; Ching-Chi Chang; Chorng-Kuang Wang;,” A dual-band IEEE 802.11a/b/g receiver front-end using half-IF and dual-conversion,” IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, pp. 366-373, August 2004.

[23] Rao, K.R.; Wilson, J.; Ismail, M.;,” A CMOS RF Front-End for a Multistandard WLAN Receiver,” IEEE Microwave and Wireless Components Letters, pp.

321-323, Vol. 15, May 2005.

[24] Tae Wook Kim; Bonkee Kim; Kywro Lee; ” Highly linear RF CMOS amplifier and mixer adopting MOSFET transconductance linearization by multiple gated transistors,” IEEE Radio Frequency Integrated Circuits Symposium, pp.

107-110, June 2003.

[25] Barrie Gilbert, ” The MICROMIXER: a highly linear variant of the Gilbert mixer using a bisymmetric Class-AB input stage,” IEEE Journal of Solid State Circuits, Vol. 32, Issue 9, pp. 1412-1423, September 1997.

[26] Christina F. Jou, Kuo-Hua Cheng, Eing-Tsang Lu,” Design of a new RF Micromixer with low power and high performance in 0.25um CMOS technology”, IEEE Asia-Pacific Conference on Advanced System Integrated Circuits, pp. 142-145, August 2004.

[27] Ying-Tsang Lu, “The Design of A Fully Integrated Concurrent Triple-Band LNA

and Two Modified Mixer Circuits Fabricated using 0.25um CMOS Technology,” M. S. thesis, Department of Communication Engineering, National Chiao Tung University, Hsin Chu, Taiwan, R.O.C. 2004.

[28] NacEachern, L.A.; Manku, T.,” A charge-injection method for Gilbert cell biasing,” IEEE Canadian Conference on Electrical and Computer Engineering, Vol. 1, pp. 365 – 368, May 1998.

[29] Tiebout, M.; Liebermann, T.,” A 1V fully integrated CMOS transformer based mixer with 5.5dB gain, 14.5dB SSB noise figure and 0dBm input IP3”, European Solid-State Circuits, pp.577-580, Sept. 2003.

[30] Jiquing Cui; Yong Lian; Ming Fu Li; “A low voltage dual gate integrated CMOS mixer for 2.4GHz band applications,” International Symposium on Circuits and Systems, Vol. 1, pp. 964-967, May 2004.

[31] Vidojkovic, V.; van der Tang, J.; Leeuwenburgh, A.L.; van Roermund, A.,” A high gain, low voltage folded-switching mixer with current-reuse in 0.18 um CMOS,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 31-34, June 2004.