Chapter 4 Low-Voltage Micromixer
4.3 Layout and Measurement Considerations
The circuits elements of low-voltage micromixer are all on-chip except for the IF port low pass filters, so we choose the PCB (printed circuit board) on-board testing for the micromixer. The layout of low-voltage micromixer is shown in Figure 4.3.1 and chip photo is shown in Figure 4.3.2. The circuit occupies chip area of 1mm x 0.85mm. Figure 4.3.3 shows the on-board testing PCB layout. The photograph of the realized PCB with chip is shown in Figure 4.3.4.
The circuit ground and substrate are separated in the layout and the bondwire works as RF choke to prevent the circuit from the noisy substrate. In the design process the parasitic effects of bondwires and bond-pads have been taken into consideration.
Typically, the inductance of bond wire is about 1nH per 1mm length and the parasitic capacitance of a 100umx100um bond-pad is approximate 150fF to the ground. We also consider the process variation by the TT, FF and SS corner simulations with libraries provided by the foundry.
Two extra circuits are needed in the measurement of low-voltage micromixer.
First the LO ports use a differential 2.44GHz signal so we need a balun suitable for 2.44GHz to convert the signal generator output to differential form. Secondly to filter out the high frequency noise in the 10MHz output waveform, the IF low pass filters composed with lumped resistors and capacitors are made on board at the IF output pads. The simplified block diagram of PCB on-board testing is shown in Figure 4.3.5. We can follow the simplified block diagram to measure the RF and LO port input return loss, conversion gain, third-order intercept point, and noise figure of the low-voltage micromixer. It should be noted that the losses of cable, balun, SMA connectors, and PCB board itself must be taken account for calibration and calculation in measurement results.
Vss IFp Vdd IFn bulk
Vg1 RF Vg3 Figure 4.3.1 Chip layout of low-voltage micromixer
LOp LOn
Vblo Vblo
Coupling Capacitors Decoupling Capacitors IF LPF Figure 4.3.3 PCB layout for low-voltage micromixer
Figure 4.3.4 Photograph of PCB for low-voltage micromixer
Spectrum
Figure 4.3.5 Simplified block diagram of PCB on-board testing for micromixer
4.4 Experimental Results and Discussions
The low-voltage micromixer was simulated and fabricated using CMOS 0.18um process. The measurement results shows that it has 14.9 dB RF port return loss, 8.28 dB conversion voltage gain, -5.63 dBm P1dB, and 4.21 dBm IIP3. The total power dissipation of the low-voltage micromixer is 1.72mw from 1V voltage supply. Figure 4.4.1 shows the RF port input return loss is better than 10 dB between 2.1GHz and 4.2GHz, which proves the well-defined input impedance of micromixer topology.
Figure 4.4.2 shows the measured optimum LO power is 0 dBm while the simulated one is -5 dBm for the maximum conversion voltage gain. The measured conversion voltage gain is a little bit less than simulation, which may be caused by less power
compression point and third-order intercept point. Figure 4.4.3 shows the 1dB compression point and Figure 4.4.4 shows the third-order intercept point. In summary the measurement results are very close to simulations. The low-voltage micromixer has good RF port matching, high conversion gain, high linearity, and very low power consumption under 1V low power supply. The differential 10MHz IF output waveforms are shown in Figure 4.4.5. Table 4.4.1 summaries the simulation and measurement performance of the low-voltage micromixer.
0 1G 2G 3G 4G 5G
-20 -15 -10 -5 0
RF Port Input Return Loss (dB)
Frequency (Hz)
simS11RF meaS11RF
Figure 4.4.1 Comparisons between simulation and measurement of RF port input return loss
-10 -8 -6 -4 -2 0 2 4
Conversion Voltage Gain (dB)
LO Power (dBm)
simCG meaCG
Figure 4.4.2 Comparisons between simulation and measurement of conversion gain and optimum LO power
-30 -25 -20 -15 -10 -5 0
RF Input Power (dBm)
simP1dB meaP1dB
Figure 4.4.3 Comparison between simulation and measurement
-30 -25 -20 -15 -10 -5 0 5 -80
-60 -40 -20 0 20
Pout (dBm)
Pin (dBm)
sim1st sim3rd mea1st mea3rd
Figure 4.4.4 Comparison between simulation and measurement of third order intercept point
Vifp= 76.56mV
Vifn= 76.56mV
Frequency = 10MHz Figure 4.4.5 Output waveform of low-voltage micromixer
Table 4.4.1 Performance summary of low-voltage micromixer Simulation Measurement
Supply Voltage (V) 1 1
Current (mA) 1.80 1.72
RF port RL (dB) 14.2 14.9
Conversion
Voltage Gain (dB) 8.88 8.28
Noise Figure (dB) 13.0 N/A
P-1dB (dBm) -10.8 -5.63
IIP3 (dBm) 0.75 4.21
4.5 Comparisons
Table 4.5.1 shows the comparisons of this work and other low-voltage mixers.
Compared with other low-voltage mixers, this work has well-defined RF port input matching, comparable conversion gain, higher linearity and lower power dissipation under 1V low supply voltage.
Table 4.5.1 Comparisons of low-voltage mixers
Ref [29]
Topology transformer
based dual-gate folded-
switching micromixer
Chapter 5
Conclusion and Future Work
5.1 Conclusion
This thesis analyzes the design method of concurrent dual-band LNA, and this circuit is demonstrated with balanced performance in both frequency bands. A concurrent dual-band receiver front-end is composed of the former LNA and sub-harmonic mixers. The receiver front-end needs only one frequency synthesizer with turning range of around 2.4GHz for 802.11a/b/g applications. Finally a low-voltage micromixer is proposed and demonstrated with low power consumption, high conversion gain and high linearity. The three ICs have been fabricated using CMOS 0.18um process. In this thesis we have presented the design concepts, simulation results, experimental results, discussions and comparisons for the two works. All of the circuits were simulated by Eldo-RF and measured in CIC.
The concurrent dual-band LNA topology is studied and analyzed in three respects, including input matching, noise figure, and power dissipation. These characteristics are analyzed in terms of circuit elements. Some simulations are also demonstrated to prove the analysis equations. The analysis equations for single-band LAN are also provided in the thesis to make a comparison clearly for readers. This circuit is designed and implemented using CMOS 0.18um process. It achieves balanced performances in two frequency bands though the lower band has been shifted from
data reveals 7.45 dB and 6.06 dB power gain, -12.8 dB and -12.9 dB input return loss, 3.54 dB and 4.80 dB noise figure, -7.43 dBm and -9.66 dBm P1dB, and 6.84 dBm and 2.76 dBm IIP3 at 2GHz and 5.25Gz, respectively. It dissipates low power consumption of 7.21mw from 1.8V power supply.
Developing the receiver architecture inheriting from the dual-band LNA, a concurrent dual-band receiver front-end is designed and implemented based on a new RF dual-band receiver architecture for IEEE 802.11a/b/g. The new dual-band receiver architecture needs only one frequency synthesizer with tuning range of around 2.4GHz, rather two frequency synthesizers, by employing a sub-harmonic mixer which operates at 5.25GHz and needs LO signal of 2.62GHz. The dual-band receiver front-end consists of a differential concurrent dual-band LNA, which has a similar topology of the former one, a sub-harmonic mixer and a modified Gilbert-cell mixer, which are designed by the other co-agent in [20]. The two mixers adopt the same topology, which reduces the design complexity of the receiver front-end.
The front-end is also designed and implemented using CMOS 0.18um process. It performances 17.2 dB and 11.8 dB voltage gain, -15.9 dB and -15.8 dB RF port input return loss, 7.22 dB and 10.78 dB noise figure, -21.0 dBm and -15.3 dBm P1dB and -4.2 dBm and 4.9 dBm IIP3 at 2.45GHz and 5.25Gz, respectively. The total power dissipation is 28.8mw from 1.8V power supply. Compared with other dual-band front-end this work achieves comparable performances with nearly equal chip are and lower power dissipation under concurrent operation for two frequency bands.
The low-voltage micromixer, which is modified from the basic micromixer, is proposed in the thesis. The RF signal is feed between R1 and M2 by the two coupling capacitors CcRF1 and CcRF2 so that M1 and M2 can be biased separately using Vg1
and Vg2. The charge injection method can improve the micromixer gain and linearity, compensating the disadvantage of low supply voltage and low transconductance in
CMOS process. The measurement results shows that it has 14.9 dB RF port return loss, 8.28 dB conversion voltage gain, -5.63 dBm P1dB, and 4.21 dBm IIP3. The total power dissipation of the low-voltage micromixer is 1.72mw from 1V voltage supply.
The measurement results approximately meet the simulation results.
5.2 Future Work
For higher frequency applications more accurate RF CMOS component models such as large size MIM capacitors and different inductance spiral inductors with higher Q-value should be built up for exactly matching network design in the future.
All parasitic effects including parasitic capacitance, resistance and inductance must be considered more carefully. A more accurate and efficient EDA tool for extracting parasitic effects is quietly important.
The concurrent dual-band LNA may be improved as gain-controllable one for higher dynamic linearity application and lower noise figure to depress the total noise figure of the receiver. As for the dual-band receiver front-end, it has been proved as feasible by the implementation in this thesis, so the fully integrated dual-band transceiver, including receiver front-end, power amplifier, up-mixer, quadrature VCO, multi-modulus frequency synthesizer, and IF Gm-C filters may be realized for future system-on-chip (SOC) design. The multi-band or wide-band transceiver innovation marching forwards SOC design, either in circuit topology or transceiver architecture will be the most challenging design in the future.
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