Thesis Organization

This thesis discusses about the analysis and design of concurrent dual-band LNA and a concurrent dual-band receiver front-end, in chapter 2 and chapter 3, respectively.

A low-voltage CMOS micromixer is proposed in appendix A.

In chapter 2, first we introduce the design flow of concurrent dual-band LNA and analysis the characteristic of the circuit compared with single-band LNA. The input matching, noise figure and power dissipation of single-band and dual-and LNA are expressed in terms of circuit elements in section 2.3 and 2.4. Also the experimental results, discussions and circuit comparisons are also presented in the chapter.

In chapter 3, a concurrent dual-band receiver front-end with low-IF architecture for wireless LAN 802.11a/b/g applications is designed and implemented. We will start from the wireless local-area-network (LAN) standards, which occupies the dual frequency bands near 2.45GHz and 5.25GHz, in section 3.1. In section 3.3 we propose a new concurrent dual-band receiver architecture with only one frequency synthesizer. Then we present a concurrent dual-band receiver front-end designed for this architecture. The design details of the front-end which consists of a concurrent dual-band LNA, a sub-harmonic mixer and a Gilbert-cell mixer, and experimental results are presented in section 3.3 and 3.4.

In chapter 4, we propose a low-voltage micromixer. Firstly we review the topology and operation theory of basic micromixer in section 4.1. The proposed low-voltage CMOS micromixer is presented in 4.2. Section 4.3 discusses layout and measurement considerations of micromixer. Finally, the experimental results and comparisons are presented in 4.4 and 4.5.

In chapter 5 these works are summarized and concluded. Also, there is some future

Chapter 2

Concurrent Dual-Band Low-Noise Amplifier

2.1 Introduction

As wireless applications become popular, demands for RF circuits which can support multiple band standards are rapidly increasing. These demands are typically addressed by having two or three sets of key RF blocks which can handle the bands, for example, the architecture shown in Figure 2.1.1[1]. These increases die area, the number of components, and the overall foot print, which in turn increases cost [2].

Two ways to solve these problems are wideband and multi-band structures. Wideband circuits are more sensitive to out-of-band signals due to nonlinearity of transistors [3].

Therefore we choose the dual-band structure, one set of RF blocks which can operate for multiple bands, as the system solution. In the applications of wireless local-area-network (LAN), IEEE 802.11a and IEEE 802.11b/g use frequency bands of 5.15GHz~5.35GHz and 2.4GHz~2.4835GHz, respectively. To integrate the two bands into a single receiver, a dual-band wireless LAN transceiver using CMOS technologies are becoming the major design because of the figures of low-cost and high-integrated. We propose a new concurrent dual-band receiver operating at 2.45GHz and 5.25GHz [4], as shown in Figure 2.1.2. To implement the receiver, a concurrent dual-band low-noise amplifier is firstly studied and designed here. In this chapter we try to analysis the concurrent dual-band LNA by deriving the input

matching, noise figure, and power dissipation in terms of circuit elements. The analysis of single-band LNA is also reviewed to make a comparison clearly for the readers.

Figure 2.1.1 Traditional dual-band receiver with two individual paths

LNA

10MHz

VCO

I Q

I Q Dual band

antenna

Band-pass filter Sub-harmonic mixer

To Baseband Q

＋ I

－

mixer

I Q

802.11a band

802.11b/g band

Figure 2.1.2 Concurrent Dual-band receiver block diagram

2.2 Architecture

The architecture of the concurrent dual-band LNA is shown in Figure 2.2.1. To

Figure 2.2.1 Schematic of the dual-band LNA

accepted. A cascode configuration is used for better reverse isolation [5]. In detail, the common gate, M2, plays two important roles in the LNA [6].

(1) It improves the stability of the circuit by minimizing the feedback from the output to the input.

(2) It lowers the LO leakage produced by the following mixer.

To achieve both the input and noise matching simultaneously the inductive degeneration topology is used. The differences between single-band LNA and dual-band one are an excess LC tank (L1 and C1) and LC branch (L2 and C2) at the gate of M1 and the drain of M2. The LC tank resonate the gate impedance, providing the dual-band input matching. The LC branch introduces a zero in the transfer function of the LNA and performs a notch between 2.45GHz and 5.25GHz to improve the receiver’s image rejection [7]. Typically both the input and output impedance are designed to be 50Ω for measurement consideration.

The first step in designing the LNA is to determine the optimum MOS transistor size in the input stage. An expression of the width of the optimum size can be found in [8]：

3 1 1

2 3

opt

OX S SP OX S

W ⁼ ωLC R Q ^≈ ωLC R ^(2.1)

Therefore we can find the optimum size is about 280um and 130um for 2.45GHz and 5.25GHz, respectively. Owing to have better performance at two frequencies, the optimum size is chosen between that at 2.45GHz and at 5.25GHz. The following two sections we discuss some circuit performances in single-band LNA and dual-band LNA.

2.3 A Review of Single-Band LNA

The theoretical analysis of single-band LNA with inductive degeneration structure is available in some masterpiece RF textbooks [8]. To help the designer understand the operation mechanism of the single-band LNA, the formulas have been transfer to the new forms in terms of the circuit elements [9]. These formulas, including input matching, noise figure and power dissipation, are reviewed in summary here. Figure 2.3.1 is the traditional single-band cascode LNA with inductive degeneration structure.

The following analysis is based on this circuit. These will be the basis of the analytic method of the dual-band LNA in next section.

2.3.1 Input Matching

Figure 2.3.2 is the small-signal equivalent circuit of the single-band LNA.

Applying KVL to the input loop in Figure 2.3.2 we have

(

1 2

)

2

Substituting equation (2.3) into equation (2.2) yields

(

1 2

)

²

From the preceding equation it can be seem that matching occurs only at

(

1 2

)

Figure 2.3.2 Small signal equivalent circuit of the single-band LNA

2.3.2 Noise Figure

It is well-known that the noise figure of any cascade network is dominated by the first stage due to the Friis formula, then we assume that the noise is dominated by the noise from M1. We further assume that noise from M1 is dominated by thermal noise of the drain current [9]. Figure 2.3.3 shows the small-signal equivalent circuit with noise generators. From the noise analysis in [9] the relationship of v_i² and i_d² has been derived as

2

i

d

Figure 2.3.3 Small-signal equivalent circuit of single-band LNA with noise generators

2

where Gm denotes the transconductance of the whole amplifier. Also Gm has been derived in terms of Vgs, Vin and gm as

So the noise of the single-band LNA can be expressed as

( )2

At matching condition, equation (2.11) becomes

( )

²

denotes the quality factor of the input series resonant circuit.

2.3.3 Power Dissipation

In this subsection, we derive the dependence of power dissipation on technology and circuit parameters under matching condition and for a given (Vgs-Vt) which is usually fixed for a design. First

D DD

P=I V (2.13)

where ID is the drain current of M1. Since M1 operates in the saturation region, we have the equation

( )

²

Therefore we get

ox

P C W µ L

∝ ^(2.15)

From 2

Furthermore, under matching condition

( )

equation (2.6), and

2

where L andµare technology parameters, RS and ω_care constant in a certain design, and others are circuit parameters.

2.4 Analysis of Concurrent Dual-Band LNA

The concurrent dual-band LNA has been discussed and analyzed in recent years.

[3,7] Of course the circuit analysis and noise model are also been established in some published papers. However these analyses are less helpful when designing the circuits because of the unreadable equations. In this section we try to derive some formulas using the methods used in the single band LNA. The input matching, noise figure and power dissipation are analyzed in terms of circuit elements under the two assumptions described in last section [10]. Some simulations are performed in this section to prove the analysis equations. Under these equations we kindly hope the designers could have strong impressions how to link the elements and the circuit performance, even inspire the motivation for some readers to study the more difficult theoretical circuit analysis about dual-band LNA derived in the above-mentioned papers.

2.4.1 Input Matching

Figure 2.4.1 shows the small-signal equivalent circuit of dual-band LNA. Applying KCL to the input loop in Figure 2.4.1 the input impedance can be derived as following

( )

where RG denote the gate distributed resistance of M1. The input impedance is designed to match 50Ω at both resonance frequency points of interest:

s

Solving equation (2.20), the two frequency points of interest can be obtained as

( )

Figure 2.4.1 Small-signal equivalent circuit of dual-band LNA

2.4.2 Noise Figure

Now we try to analysis a dual-band low noise amplifier in the similar way shown in subsection 2.3.2. The small-signal equivalent circuit of dual-band LNA with noise generator is shown in Figure 2.4.2. Figure 2.4.3 represents Figure 2.4.2 with input-referred noise voltagev_i² and current i_i²at the input, followed by a noiseless

small-signal model of the amplifier with transconductance Gm.

First of all it is easy to prove that equation (2.11) is also suitable for dual-band LNA. The equation tells us that (NF-1) is proportional to(Z_in⋅ω)². In order to find the effect of finite Q inductor on noise, we take the series parasitic resistance of L1, which is represented as R1 , into consideration. Therefore the quality factor of L1, Q1can be expressed as shown in Figure 2.4.4 [8]. The input impedance can be derived as

,

Figure 2.4.2 Small-signal equivalent circuit of dual-band LNA with noise generators

2

v

i

2

i

i

Z

i

Z

^o

Figure 2.4.3 Representation of Figure 2.3.3 by two input noise generators

Figure 2.4.4 Purely parallel RLC tank

Figure 2.4.5 Input equivalent series RLC model

Also at matching condition, Zin matches to RS.

( )

^{2 2}

1

Re ^{s p p}

s in G m

gs

L R L

R Z R g

C X

= = + +ω (2.23)

2

1 p p

eq g s

L L L L R

= + + X (2.24)

4 2 2 Figure 2.4.5. The quality factor Qeq of the input network can be derived as

1

From equation (2.10), we have the relationship of V_inandV_gsas

in 1 m

gs in gs m

V G

V ⁼ Z j C

ω

⁼ g ^(2.27)

For matching condition, we can rewrite equation (2.27) as

gs 1 m

Submitting equation (2.29) into equation (2.28), we have

gs eq eq

in gs

V Q C

V = jC (2.30)

which implies equation (2.31)

2

Again submitting equation (2.31) into equation (2.9), we can get

2

Finally the noise figure can be derived from (2.11) with

2

The noise figure of dual-band low-noise amplifier in equation (2.33) has a similar form to that of a single-band one in equation (2.12). The design concept that noise figure can be reduced by improving the quality factor of input matching series RLC tank, Qeq , under matching condition works in dual-band LNA design as well as in single-band one. Moreover we can improve Qeq by choosing inductor L1 with better Q1. To illustrate this in practice, we simulate the noise figure of the dual-band LNA with three inductors L1, which have Q-factor from 10 to 40. It can be seen in Figure 2.4.6 that the noise figure can be improved with better Q1.

1G 2G 3G 4G 5G 6G 7G

Figure 2.4.6 Simulation result of noise figure under different Q1

2.4.3 Power Dissipation

In this section, we will derive the dependence of power dissipation in the similar method used in 2.3.3. Under matching condition of dual-band LNA, equation (2.20) which implies that

2 1

First substituting equation (2.35) into equation (2.16), we have

( )

^{2 1 2} ₂

( )

^{2 2}

Finally substituting equation (2.32) into equation (2.36), we have

2 2

We get a similar result that the power dissipation is proportional to technology parameters, some standard constants and circuit parameters as equation (2.17). We can reduce the power dissipation by using larger LS from the equation (2.37). The dual-band LNA circuit is to be simulated with three different inductors LS. Figure 2.4.7 shows the relationship of the power dissipation of the dual-band LNA and the inductance of LS. In deed the power dissipation can be reduced by increasing LS. Moreover, the variance of LS will affect the input impedance so the choice of LS

becomes the trade-off between power dissipation and input matching.

0.0 500.0p 1.0n 1.5n 2.0n

8.0m

Inductance of Ls (nH)

Figure 2.4.7 Simulation result of power dissipation under different LS

2.5 Layout Considerations

The layout skill is very important for radio frequency circuit design because it may affect circuit performance very much. In this work we discuss three topics about the layout, the elements, the connections, and the element placement. To decrease noise the MOSFET is used as multi-finger, which is made of an array of 6 2.5µm/0.18µm MOSFETs. The 0.18µm (minimum) gate length was chosen to get the highest speed, and the 2.5µm gate width was chosen as a compromise between low polysilicon gate resistance and low drain/source contact resistance. The MIM (Metal-Insulator-Metal) capacitors without shield (the capacitance of per unit area≈1fF/µm²) and hexagonal spiral inductors (the Q-value is below 18) are used in this work. The poly without silicide resistance is used for gate bias. Guard-rings are added wit all elements to prevent substrate noise and interference. A shielded signal GSG pad structure is used in RF input and RF output to reduce the coupling noise from the noisy substrate.

As for the connection lines, the power lines are considered for the current density while the signal lines are designed as short as possible. All interconnections between elements are taken as a 45∘corner. Last but not the least; the element placement also should be careful. Separate inductors away to decrease the mutual inductance. The RF input and the RF output are placed on opposite sides of the layout to avoid the high frequency signals coupling. The layout of the dual-band LNA is shown in Figure 2.5.1.

The chip size is 1.32mm x 1.18mm. The chip photo is shown in Figure 2.5.2.

Figure 2.5.1 Layout of the dual-band LNA

Figure 2.5.2 Chip Photo of the dual-band LNA

Vin Vout

Vdd

Vb

Vss

2.6 Measurement Considerations

The dual-band LNA is designed for on-wafer measurement so the layout must follow the rules of CIC (Chip Implementation Center)’s probe station testing rules.

This circuit needs two 3-pin DC PGP probes and two RF GSG probes for on-wafer measurement. The correlative rules are illustrated in Figure 2.5.1. Some other rules about layout are that the minimum distance of RF pad and DC pad are 200 um and the minimum pad size is 80um x 80um [11]. Figure 2.6.2 shows the on-wafer measurement setup with four probes. The top and bottom probes are DC PGP probes which provide the power supply voltage and bias voltage for the circuit. The left and right probes are RF GSG probes. A large coupling capacitor is needed in the input of the dual-band LNA to isolate the dc between circuit and equipment. Figure 2.6.3 is the picture of the on-wafer measurement setup with four probes. Figure 2.6.4 ~ Figure 2.6.6 show the measurement setup for S-parameters, noise figure, 1dB compression point and third-order intercept point. We use the RF IC measurement system powered by LabView to measure the linearity of the dual-band LNA. We will discuss the experimental and testing results of this circuit in following sections.

Figure 2.6.1 RF probe rules for measurement

Vin Vout Vdd

Vb Vss

Vss DC PGP Probe

DC PGP Probe

RF GSG Probe RF GSG Probe

Figure 2.6.2 On-wafer measurement test diagram

Figure 2.6.3 Picture of on wafer measurement setup with four probes

Network Analyzer Network Analyzer

On wafer DUT

On wafer DUT On wafer DUT Noise Figure

Analyzer Noise Figure

Analyzer

Noise Source

(a) (b) Figure 2.6.4 Measurement setup for (a) S-parameters (b) noise figure

Signal Generator Spectrum Analyzer

On wafer DUT

Sweep Power Detect Power

Figure 2.6.5 Measurement setup for 1 dB Compression Point

Signal Generator Spectrum Analyzer

On wafer DUT Signal Generator

Balun Sweep Power

Sweep Power

Detect Power ( 1-order and 3-order)

Figure 2.6.6 Measurement setup for third-order intercept point

2.7 Experimental Results and Discussions

The measured data reveals 7.45 dB and 6.06 dB power gain, -12.8 dB and -12.9 dB input return loss, 3.54 dB and 4.80 dB noise figure, -7.43 dBm and -9.66 dBm P1dB, and 6.84 dBm and 2.76 dBm IIP3 at 2GHz and 5.25Gz, respectively. From Figure 2.7.1 ~ Figure 2.7.4, It can be observed that the lower band of the dual-band LNA designed at 2.45GHz was shifted to 2GHz around while the higher band designed at 5.25GHz is roughly matched with simulation. The measured results reveal the fact that the most difficult part of the design is to provide exact input and output matching at both bands simultaneously with on-chip passive components. In other words the matching performance is very sensitive to variation of passive components, like inductors and capacitors. Fortunately the circuit has a fairly performance at the shifted band compared to the lower band, so the measured results at the shifted band is compared with the simulated performance at the lower band in stead of the measured results at the original band. Surely the reason why the lower band is shifted to 2GHz is also discussed in this section by modifying the original simulation results. The modified simulation gives us a reasonable explanation the difference between simulation and measurement.

The measurement results reveal that the matching network of the dual-band LNA is not as well as what we expect, so we try to modify the simulation to fit the measurement results. We consider the ±10% variation of passive components while the size of the transistors is kept the same as original simulation. There are two reasons why we have to consider the variation of passive components though the physical models of the spiral inductors and MIM capacitors provided by the foundry were used in the simulation. First only some certain size of the spiral inductors are

measured and fitted. For example, the spiral inductor of W=15um, S=2um, R= 30um, 60um, 90um, 120um, and N=1.5, 3.5, 5.5 where W is the inductor track width, S is the spacing between tracks, R is the inner radius, and N is the number of turns. The inductance of the inductors whose size is not matched to the certain size is computed by interpolation or extrapolation using other measured physical models. For instance the spiral inductor L1 with size of W=15um, S=2um, R=72um, and N=3 might be computed form the inductor models with sizes of W=15um, S=2um, R=60um, 90um, and N=1.5, 3.5. The variation of the spiral model would be unignorable if the measured models are not very accurate, especially for the matching network sensitive to passive components. The similar problem also hit the models of MIM capacitors.

The other reason is the parasitic capacitors from metal lines to substrate can not be predicted precisely though the layout parasitic extraction (LPE) had been applied on the design proceedings of the circuit design.

According to the foregoing reasons we modified the dual-band LNA with variation of passive components to fit the measurement results. The comparisons of the simulation, measurement, and modified simulation results are shown in Figure 2.7.1 ~ Figure 2.7.9. These data are summarized in Table 2.7.1. The modified S-parameters are approximately fit to the measurement results in both frequency bands except for certain magnitude difference. This implies that the variation of passive components could course the shift of the frequency band. The measured linearity performances in both bands are better than modified simulation because of the degradation of the power gain. The measured noise figure is close to the modified simulation owing to the layout technique including the guard rings and shielding RF GSG pad. The measured results show the dual-band LNA achieves balanced performance at both the lower and higher band under low power consumption.

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