Organization

This thesis is organized as follows. In chapter 2, we investigate the impact of RDF on multi-gate MOSFETs using atomistic simulation. In chapter 3, the effects of LER on multi-gate devices are assessed using Fourier synthesis. Besides, with similar approach, EOT variation is also discussed. In chapter 4, we investigate the intrinsic parameter fluctuations in multi-gate MOSFETs for several technology generations and point out the dominant variation source. Chapter 5 concludes this work.

Chapter 2

Random Dopant Fluctuation

2.1 Introduction

Since 2007, 45nm technology node high-k/metal-gate planar metal oxide semiconductor field effect transistors (MOSFETs) have been in mass production [17].

However, devices become more susceptible to stochastic disturbances. For example, if we assume the device with 20nm 20nm 20nm× × active region and channel doping

=6 10 cm× ^{18 −3}, there would be only fifty dopants inside the region. Even with the well-controlled lithographic patterns and etching processes, intrinsic fluctuation of the dopant number and placement in the channel of these highly-scaled MOSFETs will lead to significant dispersion of threshold voltage, current, and so on.

In this chapter, we will investigate random dopant fluctuation by performing 3-D “atomistic” simulation, that is, treating each dopant individually. Random dopant fluctuation can be further classified into number and position components. We will introduce random dopant fluctuation qualitatively in this section, and then quantitatively investigate their characteristics in the following sections.

Dopant number fluctuation is governed by the Poisson function [8] shown in Fig. 2.1 and its functional form is as follows：

mean mean

, where N is channel doping concentration and V is the volume of channel region.

To observe how dopant number fluctuation affects device performance, we should convert

σ

dopant number^to

σ

doping concentration ^by：

channel volume will suffer severe dopant number variation.

For position component, we may keep dopant number the same and randomly place dopants in the channel region. Fig. 2.2 and Fig. 2.3 are the demonstrations of dopant position distribution under two different doping concentrations. It can be seen that as dopant number becomes less (lightly doped devices), dopant position variation will become pronounced.

2.2 Methodologies

2.2.1 Setting the Scene

Our multi-gate MOSFETs are designed with Lg=25nm and total width (2 H× _fin+W_fin) equals to 75nm. Fig. 2.4 shows the perspective view and geometry definitions of a multi-gate SOI transistor. In our work, three aspect ratio (AR = Hfin / W_fin) devices are investigated with the same total width：Quasi-planar (AR = 0.5), Tri-gate (AR = 1) and FinFET (AR = 2). Besides, we also discuss device variability at two doping concentrations, 1 10 and 6 10 cm× ¹⁷ × ^{18 -3} . To sustain satisfactory electrostatic integrity, we use high-k gate dielectric with k = 25 and thigh-k = 2nm in lightly doped devices.

Furthermore, to capture the statistical characteristic of device fluctuation, performing Monte Carlo simulation with sufficient ensembles is required to reflect the actual phenomena. Small number of samples may result in misleading conclusions but too many samples will lead to huge computation burden. In [15], E. Baravelli et. al.

claimed 100 samples were adequate to achieve a clear trend, but in [18], A. Asenov collected 200 ones. In this work, we take 150 devices for every case.

For the convergence and efficiency concern, except for the conditions mentioned, we use drift-diffusion transport equation with constant mobility model throughout the work. Obviously, these physical models can not correctly capture the non-equilibrium carrier behavior and ballistic transport effects in such scaled devices.

However, drift-diffusion is believed to be applicable in analyzing threshold voltage variations near sub-threshold region where the fluctuations are mainly determined by device electrostatic behaviors [19]. Besides, to compensate the error induced by the constant mobility approximation (without considering mobility degradation), we

extract threshold voltage at a higher current criterion, _off W

I 300( ) nA

= L .

2.2.2 Atomistic Simulation Approaches

In this section, we will introduce three RDF simulation approaches and discuss their relationship in the following section.

Full Monte Carlo Simulation

Our full Monte Carlo approach is similar to the one described in [20]. We build a large matrix equivalent to the lattice structure in the device channel region and assign a random number for each matrix element (lattice site). By comparing each random number with the probability defined as the ratio of original dopant number ( N V× ) to the number of total lattice site, the lattice matrix can be constructed as in Fig. 2.5.

After determining the placement of dopant atoms, we need to convert dopant atom to doping concentration by dividing by the corresponding small volume around each dopant, usually equals to the mesh size. Then we can translate this lattice dopant matrix to the channel doping matrix for 3-D device simulation [21]. Theoretically, we should construct uniform mesh to ensure the dopant arrangements are randomly distributed [18]. However, we can not generate perfect uniform mesh from TCAD simulation because the TCAD mesh generator tends to create finer meshes near the

the TCAD mesh command adjustments and the averaged volume defined as the ratio of the channel-region volume to the number of total meshes inside the region. In Fig.

2.6, we illustrate the quasi-uniform meshes generated from the refined TCAD device simulations.

Monte Carlo Simulation of Dopant Number Fluctuation

Based on the Poisson’s function in (2.1), we collect data from 150 devices each with different dopant number. Then we convert individual dopant number inside the device to doping concentration and perform the conventional continuous simulations. Fig. 2.7 shows the simulation flow described above.

Monte Carlo Simulation of Dopant Position Fluctuation

To extract pure position component, we keep dopant number fixed ( N V× ) for each device and randomly place dopants in the channel region as shown in Fig. 2.2 and Fig. 2.3. Then we convert the lattice dopant matrix to the channel doping matrix as described in the full Monte Carlo section for TCAD simulation use. Fig. 2.8 is the simulation flow of this method.

Verification

To validate our simulation results, we duplicate one of the conditions in [18], planar MOSFET with W_eff = L_eff = 50nm, N_A = 5×10¹⁸ cm^-3, and t_ox = 3nm. Fig. 2.9 is one of the simulated potential distributions with randomly distributed dopants inside

the channel region. It can be seen that the potential in the SiO₂/Si interface is disturbed by the discrete dopants and this is the cause of threshold voltage variation.

From Table 2.1, except for the inconsistency in the average threshold voltage, our threshold voltage fluctuation results are in a good agreement with what has been reported in [18].

2.3 Results and Discussions

In Fig. 2.10, we perform 150 atomistic full Monte Carlo simulations and compare their average with the conventional continuous simulation. A threshold voltage lowering for the atomistic one can be seen (Table 2.2). Since in our simulations we did not consider the long-range Coulomb potential modification for each discrete dopant as described in [22], the threshold voltage lowering may come from the current percolation through the inhomogeneous potential induced by atomistic dopants [8] [18] and mobile carrier trapping due to the delta-like short-range atomistic Coulomb potential [22].

Fig. 2.11 shows the histogram plots of Vth variation before and after Source/Drain swapping. Similar to [8] with only 24 samples and biased at V_DD = 1.5V, it makes no difference when interchanging Source/Drain in both lightly and heavily doped devices. However, if we observe the threshold voltage difference for every single device before and after swapping, it can be seen that the spread of threshold voltage difference for lightly doped devices (11.8 mV) is much larger than that of the heavily doped ones (2.54 mV) as shown in Fig. 2.12. This is because dopant

arrangements are different in view of source and drain especially for lightly doped devices. The phenomenon may need to be considered in circuit applications.

In Fig. 2.13, we show the correlation between the normalized threshold voltage, derived from the full Monte Carlo RDF simulation then normalized to their average, and the dopant number for heavily and lightly doped Tri-gate devices, respectively. The correlation coefficient for lightly doped devices (0.21) is much smaller than that of the heavily doped ones (0.64). This implies that the threshold voltage fluctuations can not merely be attributed to the dopant number variations. In Fig. 2.14, we demonstrate that the threshold voltage variation obtained from the full Monte Carlo (

σ V

_th,FMC) exactly consists of two components：number fluctuation

(σ

V

_th,number) [23] and position fluctuation (

σ

Vth,position) [24]. We confirm that the number and position components are mutually independent mechanisms. It also shows that our full Monte Carlo simulation can capture both the number and position fluctuations. Using full Monte Carlo simulation would be a more efficient way to accurately determine the overall RDF. Furthermore, through the full Monte Carlo simulation algorithm, we can easily formulate this procedure by the binomial equation ：

( )

n

^k(1 )^{n k}

p k p p

k

  −

=  −

  (2.4)

, where n is the number of lattice site and p is the probability defined as the ratio of the expected dopants to the total number of lattice sites.

When

n → ∞ , np → < ∞ λ

, the binomial distribution converges to Poisson

This explains the usage of Poisson distribution in the determination of random dopant number fluctuations.

Unlike the results in [24], our calculated R_position can reach as high as 0.9 in lightly doped devices and about 0.5 in heavily doped devices. Even in the heavy doping case, the position component still accounts for nearly half of the total RDF. This means that merely treating the dopant number is not enough to accurately describe the overall RDF effects.

Fig. 2.16 (a) shows that for heavily doped devices, threshold voltage variations increase with AR for both number and position components. This is because under the same doping concentration and total width, devices with AR = 0.5 have larger channel

volume than the AR =1 and AR = 2 ones. According to (2.3), the dopant number fluctuations would aggravate in devices with smaller volume [26]. For position component, smaller volume devices have less dopant inside the channel which would enhance the position RDF mismatch as shown in Fig. 2.2 and Fig. 2.3. In Fig. 2.16 (b), we demonstrate the AR dependence of threshold voltage variations for lightly doped devices. Threshold voltage fluctuations decrease as AR increases for both number and position components. This is because under nearly identical dopant number (about 1~2 dopants for different AR devices) and poor electrostatic integrity (due to lighter channel doping) conditions, the electrostatic integrity improvement with higher AR is the dominant mechanism for the reduction of both number and position RDF [27].

In Fig. 2.17, we investigate the dependence of threshold voltage fluctuations on channel doping. Instead of monotonically increasing with higher doping concentration [5], there is a worst case occurring at a moderate doping level.

Generally speaking, higher channel doping can improve device electrostatic integrity but, at the same time, enhance RDF as well. Furthermore, better electrostatic integrity has been demonstrated to suppress the RDF [27]. It seems that for devices with better electrostatic integrity (such as AR = 2), increasing the channel doping results in less electrostatic integrity improvement but more RDF effects. For those poorer electrostatic integrity devices (such as AR = 0.5), increasing the doping may significantly improve electrostatic integrity and therefore reduce RDF. As we can see from the figure, poorer electrostatic integrity devices have a more pronounced peak.

In [28], planar MOSFETs with epitaxial and delta-doped channels were suggested to reduce random dopant-induced threshold voltage variations. As shown in Fig. 2.18 (a) (b), the RDF can be suppressed at deeper epitaxial layer, depi. Besides,

for thinner epitaxial layers, σVth increases with doping concentration. However, devices with thicker epitaxial layers would behave anomalously： Vthσ decreases with increasing doping concentration. A. Asenov et. al attributed this to the screening effect of the random dopant charge. However, we can also interpret the phenomenon using electrostatics. As shown in Fig. 2.16 (c), thinner epitaxial layer devices have better electrostatic integrity than thicker ones.

2.4 Modified Atomistic Simulation

In this section, we will introduce the concept of long-range and short-range Coulomb potential separation proposed by N. Sano et. al. [22] [29] which is a modification for the primary atomistic simulation. Then we will describe another revision of atomistic simulation proposed by [30].

Due to the delta-like dopant charge induced by the discrete dopant, the subsequent sharp Coulomb potential would violate the drift-diffusion assumptions which should be the long-range Coulomb potential and the gradually changing band-gap. Besides, this singular short-range potential may result in the strong trapping of mobile carriers and screening of ionized dopants which lowers the effective channel doping. N. Sano. et. al. argued that this is the consequence of threshold voltage lowering shown in [8] [18]. It is suggested that using their long-range potential correction can resolve these problems. Finally, they demonstrated that their atomistic results are consistent with the continuous simulation counterparts for larger devices. Fig. 2.19 shows the plot of long-range and short-range doping concentration and the corresponding functional forms are as follows︰

electron-impurity scattering events. Unfortunately, it is really time consuming and impractical for us to use.

Based on our simulations, smaller mesh size would give rise to severer carrier trapping and dopant screening. G. Roy et. al. [30] suggested that using density gradient model in the primary atomistic simulations can effectively remove either potential or carrier concentration mesh size dependence and singular dopant potential.

After using this treatment, they still can find threshold voltage lowering and this is the evidence that threshold voltage lowering is not an artificial phenomenon. From their demonstration, the density gradient modification seems to be a simpler way to accurately simulate atomistic dopant problems. However, when coupling with atomistic simulation and density gradient approximation, the simulation convergency may significantly be degraded. So far, how to provide a more practical method for

both accuracy and efficiency is still an open question.

2.5 Summary

We have provided an assessment of random dopant fluctuations in multi-gate MOSFETs using atomistic simulations. Our full Monte Carlo approach can capture both number and position fluctuations. This is a more efficient and recommended method. Besides, threshold voltage lowering with respect to the continuous simulation is observed in our work. We believe it is due to current percolation in the inhomogeneous potential profile. Furthermore, Source/Drain asymmetry is another characteristic of atomistic simulation especially in lightly doped devices. This has rarely been discussed and may limit the application of switching circuit designs.

In lightly doped devices, position variation is the dominant mechanism and devices with larger AR will lead to less fluctuation due to better electrostatic integrity.

In heavily doped devices, number and position components are comparable and the implementation of full Monte Carlo simulation is required. With higher AR, RDF becomes worse due to smaller channel volume and fewer dopants. Our study indicates that lightly doped FinFET, with its superior electrostatic integrity, is the best candidate for future multi-gate device design under the consideration of random dopant fluctuation.

Fig. 2.1 Poisson distribution of the dopant number inside the active region.

The figure includes 10000 ensembles with 94 mean dopants.

60 70 80 90 100 110 120 130 0

500 1000 1500 2000

O c c u re n c e

Atom number

0 50 100 150 200 250 300 350 400

Fig. 2.2 Top view of 3D random dopant arrangements with 120 dopants inside the region. Closed circles represent dopant atoms. Demonstrated device dimensions are L_g = 100 nm, T_SOI = 10nm and W_g = 40nm with doping =

3 10× 18cm^-3.

0 50 100 150 200 250 300 350 400 inside the region. Closed circles represent dopant atoms. Demonstrated device dimensions are L_g = 100 nm, T_SOI = 10nm and W_g = 40nm with doping = 1 10× ¹⁷cm^-3.

Fig. 2.4 Perspective view and geometry definitions of the multi-gate MOSFET used in this work.

Aspect Ratio (AR) = H /W _{fin fin}

total fin fin

W ==== 2 H×××× ++++ W

0

10

20 5

15

25

0 5 10 15 0 10 20 30

5 15 25

Channel length [nm]

Fin width [nm]

F in h e ig h t [n m ]

Fig. 2.5 Example of atomistic dopant placement in the channel region of a multi-gate MOSFET with L_g=25nm, W_fin=15nm, H_fin=30nm. Closed circle symbols represent dopant atoms.

Fig. 2.6 Our quasi-uniform meshes used for 3-D RDF device simulations in (a)

(b)

(c) (d) (e)

channel S/D

S/D

channel

channel

channel S/D

S/D S/D

S/D

Dopant number

Poisson distribution

#

dopant number1

#

dopant number2

#

dopant number3

…

Fig. 2.7 Simulation approach for dopant number fluctuation.

Fig. 2.8 Simulation approach for dopant position fluctuation.

Fig. 2.9 Potential distribution at Si/SiO2 interface with discrete dopants inside the channel. Potential distribution is distorted due to discrete dopants and this is the cause of threshold voltage variation.

Table 2.1. Comparison of the atomistic results in this work and in [18]

-0.4 -0.2 0 0.2 0.4 10

^-5

10

^-3

10

^-7

10

^-9

10

^-11

Gate Voltage [V]

D ra in C u rr e n t [A ]

Wtotal=75nm, Leff=25nm, Vds = 0.05V Triangle : conventional continum doping Line : atomistic doping

Square : atomistic doping (average)

Ioff

Fig. 2.10 Id-Vg curves for conventional simulation (Triangle), 150 atomistic simulations (solid lines) and the average of these atomistic simulations

(square).

Table2.2. Detailed data of Vth shift and Vth variations for devices with Lg = 25 nm and Wtotal = 75nm. Vth lowering is defined as Vth (atomistic) - Vth (continuous).

0

Fig. 2.11 Histogram plots of S/D swapping with 150 microscopically different (a) heavily doped and (b) lightly doped Tri-gate devices. Here forward means before S/D swapping operation and reverse means after S/D

-10 -5 0 5 10 15 20 25 30

Fig. 2.12 Histogram plots of Vth difference between S/D swapping for (a) heavily doped and (b) lightly doped Tri-gate MOSFETs

(b) (a)

Fig. 2.13 The correlation coefficients between the normalized threshold voltages and the dopant number are (a) 0.64 for heavily doped and (b) 0.21 for lightly doped Tri-gate devices.

60 70 80 90 100 110 120

1E17 1E18 1E19

for heavily and lightly doped channels.

0.5 1.0 1.5 2.0

Fig. 2.16 The AR dependence of threshold voltage fluctuations for (a) heavily doped and (b) lightly doped devices.

1E16 1E17 1E18 1E19

Fig. 2.17 Doping dependence of threshold voltage variation for 3 AR devices. Threshold voltage variations are determined by the electrostatic integrity and doping concentration.

2.0x10¹² 4.0x10¹² 6.0x10¹² 8.0x10¹²

Fig. 2.18 Threshold voltage variation as a function of the (a) doping concentration NA b

behind the epi-layer and (b) delta-doping dose Q^δ for a set of 50×50nm MOSFET’s with t = 3nm,NA

b = 1×10¹⁸ cm^-3, NA

e = 1×10¹⁵ cm^-3, at different epi-layer thickness [28]. Inset plot shows the definition of epi-layer. (c) shows

(a)

(b)

(c)

2x10¹⁸ 3x10¹⁸ 4x10¹⁸ 5x10¹⁸ 0.00

(a)

(b)

Fig. 2.19 (a) 1D representation of long-range and short-range parts of the dopant number density and (b) 3D perspective view of long-range part number density. Long-range potential does not diverge at the origin.

Chapter 3

Line Edge Roughness and

Equivalent Oxide Thickness Variation

3.1 Line Edge Roughness

3.1.1 Introduction

Due to the resolution limit of lithography, etching process or the grain characteristic of photo resist and poly gate, it’s inevitable to generate line edge roughness (LER) during device processing. This effect was negligible in the past.

However, it is becoming increasingly important for scaled devices. According to the ITRS predictions in 2007 [2], the tolerance of LER for 65nm and 32nm node is 2.6nm (3σ) and 1.3nm, respectively. Unfortunately, the best technology in the world can only provide about 5nm LER in 2003 [10]. LER will soon become comparable to device critical dimension and may worsen device short channel effects. Actually, under the prediction of recent studies [30], LER is expected to become the dominant contributor to device variation for future planar MOSFETs.

In the past, several approaches were adopted to estimate the effects of LER.

For example, P. Oldiges et al. [32] employed simplified 2D slice simulations to capture the behaviors of real ragged 3D devices. C. H. Diaz et al. [33] derived an

the model with experimental data. A. Asenov et al. [10], for the first time, provided a systematic 3D discussion of LER and investigated the relative contribution of RDF and LER to the overall intrinsic parameter fluctuations for planar MOSFETs.

However, a detailed and comprehensive exploration of LER for multi-gate transistors is still needed. Although E. Baravalli et. al. [34] [15] gave a sophisticated simulation on FinFET and concluded that fin- and gate- LER would become significant as compared to RDF below 45-nm gate length geometries, it is still unclear how LER will influence these highly geometry-dependent devices with different AR design or doping concentration. This is one of the main purposes in this work.

In the following sections, we will first introduce the methodology for the LER simulation. For a given gate length and total width, we examine the impacts of simulation parameters on the threshold voltage for heavily and lightly doped devices.

Finally, we provide a comparison of LER with RDF for different doping and device structures.

3.1.2 Methodologies

3.1.2.1 Concept

The causes of LER, such as lithography, etching and diffusion, are similar to low-pass filters during transferring the rough line pattern to devices. Due to the

The causes of LER, such as lithography, etching and diffusion, are similar to low-pass filters during transferring the rough line pattern to devices. Due to the

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