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Chapter 1 Introduction

1.2 Overview

A broadband and scalable lossy substrate model has been developed and validated for nanoscale RF MOSFETs with different finger numbers and adopting various pad structures such as lossy, normal and small pads.

Chapter 2 gives an introduction to the classification and physical mechanism of noises in MOSFETs. The noise measurement theory and measurement system configuration are also covered.

In chapter 3, we purpose an enhanced lossy substrate pad model to precisely distribute the substrate loss between the TML and pads with various metal topologies and the resulted excess noises.

In chapter 4, the intrinsic MOSFET model with relevant calibration on I-V and C-V models will be presented. The key model parameters in BSIM3 I-V and C-V models will be compared before and after calibration.

In chapter 5, we will describe a full equivalent circuit model, which include the pads,

TML, and intrinsic MOSFET. The high frequency simulation using this full circuit can realized good agreement with measured S- and Y-parameters up to 40GHz. Furthermore, the proposed lossy substrate model is scalable to fit various pad structures. The measured noise parameters (NFmin, Rn, and Yopt or Γopt) corresponding to various pad structures can be accurately simulated up to 18 GHz. This scalable lossy substrate model can consistently predict the abnormally strong finger number dependence and nonlinear frequency response of minimum noise figure (NFmin) revealed by the devices with lossy pad.

Chapter 6 will wrap up the summary for this thesis and suggestions for future work.

Appendices A and B provide more detailed explanation of certain contents. Appendix A addresses the Y-factor method for noise figure measurement. Appendix B describes the modified open and short de-embedding method.

Chapter 2 Noise Theory and Noise Measurement Technique

Noise can be defined as a kind of undesired signal for a device, circuit, or system. It is generally caused by the small current and voltage fluctuations generated within the devices themselves or from external coupling paths. Noise represents a lower limit to the electrical signal that can be amplified by a circuit without significant deterioration in signal quality.

Also, noise sets an upper limit to the useful gain of an amplifier. It is because that the gain at output stage will be self limited by the amplified noise. In this chapter, various sources of electronic noise are considered, and high frequency noise in MOSFET is of major focus that is dominated by the thermal noise. Noise theory for noise behavior analysis of two-port network will be covered. Noise models available for existing simulation tools like BSIM3 will be addressed. To the end of this chapter, noise measurement with system configuration and calibration methods will be described.

2.1 Noise Sources

The most important sources of noise in electronic devices are shot noise, generation-recombination noise, flicker noise and thermal noise. Shot noise is always associated with a direct-current flow, which generated when carriers in device cross barriers independently and randomly. It is an eminent noise source for diodes and bipolar transistors.

For MOSFETs, only DC gate leakage current contributes shot noise. However, gate leakage is normally controlled to be very small. Generation and recombination noise occurs in semiconductors in which traps and recombination centers are always involved. Fluctuation of carrier number due to random trapping and de-trapping process contributes this noise.

2.1.1 Flicker Noise

In the low frequency domain (≦100 KHz), the noise in MOSFETs is dominated by Flicker noise. The physical mechanisms responsible for Flicker noise are generally classified as carrier fluctuation model and mobility fluctuation model. In the following, three popular models in existing literature [7] will be reviewed.

1) Carrier number fluctuation model :

For carrier fluctuation model, the channel noise is originated from the random capture and emission of charge carriers through trapping and detrapping in the interface states residing at Si-SiO2. The carrier number fluctuation theory has been successful in modeling 1/f noise in n-channel devices. The equation proposed for the carrier fluctuation model is described as follow [8] .

2 2 2

2 = 2 λ2 ⎜1+αμ

⎝ ⎠

ID m t D

eff ox

DS D ox m

q kT N

S g I

I I WLC f C g ⎟ (2-1)

where Nt is the interface trap density, Cox is the gate oxide capacitance, f is the operating frequency, μeff is the effective carrier mobility, and αis the scattering parameter.

2) Mobility fluctuation model :

As for mobility fluctuation model, the channel noise is generated due to mobility variation induced channel current fluctuation. Hooge’s empirical formula was proposed to account for the mobility fluctuation model. This model, as compared with the carrier fluctuation is more appropriate to simulating the 1/f noise in p-channel devices.

3) Unified 1/f noise model :

The unified model has been proposed to cover both n-channel and p-channel devices, in 1/f noise simulation using a single model. The unified model that can be considered as a

combination of the carrier number fluctuation model and the Hooge mobility fluctuation model. It extends the carrier number fluctuation model to include the mobility fluctuation induced by the fluctuating oxide trap charges through coulomb scattering. The carrier number fluctuation and the mobility fluctuation are correlated because not only the charge carriers in the channel, but also their mobility fluctuated. The basic assumption is that trapping and detrapping of charge carriers through the oxide traps constitutes a common origin for both models. The unified model has been adopted in some public-domain compact MOSFET models, such as BSIM3 and BSIM4.

Flicker noise is also named as 1/f noise due to its noise power spectral density given by (2-2) in which a frequency dependence with slope n approaching unity is achieved

I

( ) I

m

S f K n

= ⋅f (2-2) Flicker noise is important to be considered in RF circuit design such as mixers, oscillators, and frequency dividers that are used to up convert low frequency signals to higher frequency, and may deteriorate the phase noise and signal-to-noise ratio due to simultaneous up conversion of low frequency noise. As for the operation in very high frequencies, Flicker noise generally becomes negligible and thermal noise will emerge as a major concern for RF circuit operation.

2.1.2 Thermal Noise

For MOSFET operating in high frequency domain, thermal noise becomes the dominant noise source. It is due to the random thermal motion of the electrons and the current fluctuation caused by collision of lattice. Thermal motion of carriers is ubiquitous in any electronic components as long as its temperature is not absolutely zero. Because of the thermal nature, thermal noise power turns out to be exactly proportional to the absolute

thermal noise is given by [9]

av

P 1

2 ( / )

[ hf kThf ]

hf f

= +e

−1 Δ

(2-3)

where h is Planck constant, k is Boltzmann constant, f is the operating frequency, and Δf is the frequency interval. For hf/kT << 1 (holds for general case) and based on the noisy resistor model shown in Fig. 2.1. the mean-square open circuit noise voltage and noise current can be obtained.

2

4

n av

P kT f v

= Δ = R (2-4)

2

= 4

v

n

kTRΔf

(2-5)

2 4

Δ 4

= =

n

i kT f

R kTG fΔ (2-6) Herein, every component with electrical resistivity can be considered as a resistor. With known resistance value or equivalent resistance, noise voltage or noise current can be calculated.

2.1.3 Thermal Noise in MOSFETs

In MOSFETs, the thermal noise components include channel noise (or called drain current noise), induced gate noise, and thermal noise due to terminal parasitic resistances (Rg, Rd, and Rs).

For thermal noise, the dominant contribution comes from the channel thermal noise. The most broadly accepted noise model for MOSFETs is the van der Zeil model [10]. For a MOSFET under operation, the conducting channel behaves like a voltage-controlled resistor.

This resistor contributes thermal noise at the drain terminal. The power spectral density can be derived from the drain current expression. Refer to Fig. 2.2, taking velocity saturation into

consideration, drain current at a certain position along channel direction is given by [9]

Integrating this current over the effective channel Leff, drain current can be obtained

D

Finally, power spectral density of the noise current generated by the channel resistance includes velocity saturation effect and hot-electron effects is given

D

where Te is the effective electron temperature in which hot-electron effect is considered. This is a general expression for the thermal noise in a channel. For simplicity it can be written as

2

Id d d0

S =(i ) =4kT g

f γ

Δ (2-12)

where gd0 is the drain transconductance at VDS equal to zero. For long channel devices, γ is close to unity in its triode region and decreases to about 2/3 when in saturation (i.e.

2

3 ≤ γ ≤ 1). In long channel case, gd0 is equal to the gate transconductance gm in saturation region, which leads to a familiar result

2 d

Id d0 m

(i ) 8 8

S = = kTg kTg

f 3 = 3

Δ (2-13)

Due to the carrier heating by the large electric fields in short channel devices, γ may become larger than 2 or even larger.

Besides the channel current noise, the induced gate noise has gained increasing attention.

As the operation frequency increases, contribution of this noise cannot be neglected. Noise model including this terms, thus, become essential. Induced gate noise is, as implied by the name, the noise induced by capacitive coupling from channel region to gate terminal due to the fluctuating potential. This noise can be expressed as [11]

2 g

Ig g

S =(i ) =4kT g

f γ

Δ

(2-14)

where gg is given by

2 2 gs g

d0

g = C 5g ω

(2-15)

Because the channel noise and induced gate noise have a common origin, they do have correlation. The correlation coefficient is usually expressed as

* g d

2 2

g d

c= i i i i

(2-16)

As for noise contributed from parasitic resistances, following (2-6), three noise terms corresponding to the gate, drain, and source are given by

I,Rg I,Rd I,Rs

g d

4kT 4kT 4kT

S = ; S = ; S =

R R Rs

2

(2-17)

Among them, due to the larger sheet resistance of poly-Si, gate resistance (Rg) is typically much larger than drain and source resistances (Rd and Rs). Therefore, Rg is an important noise contributor, which can greatly affect the noise figure of the device. To consider the gate resistance (Rg) impacts on channel thermal noise separately, an additional drain current noise, which is contributed from gate resistance, was shown as follows

ΔS =4kTR gId g m2 (2-18)

The gate resistance also gives rise to gate current noise as shown below

2

IG g

S =4kTR ω

Δ Cgg (2-19) The gate resistance will turn out to be a major contributor to the gate current noise in short channel device. The contributions of the gate resistance to drain current and gate current noise are correlated. The correlation coefficient is purely imaginary, i.e. c=1.0 j.

Multi-finger gate structure is widely used in RF MOSFET design to reduce Rg. In addition to high frequency noise, multiple high frequency performance parameters are related to Rg, and the maximum oscillation frequency (fmax) is one relevant example. Multi-finger gate structure can improve mentioned high frequency performance but may suffer the penalty of larger parasitic capacitance.

2.2 Two-Port Noise Theory

2.2.1 Noise Figure

sources. An accurate and reliable method to measure noise is indispensable and sometimes challenging. For device characterization and circuit performance evaluation, noise figure or noise factor is the most popular expression. Based on the two-port noisy network model and definition of noise figure (or noise factor), four noise parameters can be derived as follows.

Noise factor is defined as the signal-to-noise power ratio at the input port divided by signal-to-noise power ratio at the output port. It can be given by (2-20)

i i

o o

F S /N

≡ S /N

(2-20)

Where Si and So are input and output signals and Ni and No are input and output noise power.

From this definition, we can understand that noise factor of a network represents the degradation of signal-to-noise ratio as a signal goes through this network. Considering a network with gain G and noise Na, the noise factor can be express as

a

i i i i

o o i a i i

N +GN

S /N S /N

F = =

S /N GS /(N +GN ) GN

i (2-21)

where Na and G are the noise power and gain of the network. From above expression in (2-21), noise factor can be defined as the ratio of total noise power at the output to the output noise power, which is due to the input noise. In short, the larger noise factor means the noisier for the network. In (2-20), it shows the value of a noise factor is affected by the input noise power, which is generally contributed from the thermal noise of the source, kTΔf. This means that the noise factor depends on the source temperature. For IEEE standard regulation, 290K was specified as a standard temperature, because it makes the value of kT close to around 4 × 10-21 Joule. Generally, we use this measure in the unit of dB, defined as noise figure

NF = 10 log F (2-22)

2.2.2 Noise Parameters

The noise factor (or noise figure) is primarily affected by two factors - the source impendence at the input port of a two port network and the noise sources within the network itself. The noise factor of a two-port network with various source impedance was derived and given by the expression [12]

2

n s opt

min

s

R Y -Y F = F +

G

(2-23)

where

s s

Y = G +j Bs (2-24)

opt opt opt

Y = G +j B (2-25)

herein, Ys is the source admittance, Gs is the real part of Ys, Yopt is the optimum source admittance resulting in the minimum noise figure (NFmin), and Fmin is the minimum noise factor achieved in the network when the source admittance Ys is equal to Yopt. Rn is defined as the equivalent noise resistance, which determines the sensitivity of the noise factor with respect to the deviation of Ys from Yopt. Replacing the source admittance with its corresponding reflection coefficient at specific characterization impedance Z0 (50Ω), another common form of noise factor is obtained

2 s opt

min n 2 2

0 s opt

4R Γ -Γ

F = F +

Z (1 Γ− )1+Γ

(2-26)

opt opt

opt 0

1 1-Γ

Y = Z 1 Γ+ (2-27)

s s

0 s

1 1-Γ Y =

Z 1 Γ+ (2-28)

It is a general practice in high frequency device and circuit design to get a smaller noise factor while keep sufficient gain by varying Ys. The so-called noise parameters are the four parameters NFmin, Rn, Re(Γopt), and Im(Γopt). These parameters are determined purely by the intrinsic noise source of the network, they are unique under a certain operation frequency and bias.

2.3 Thermal Noise Model

There are two channel thermal noise models supported by BSIM3v3.2.2. One is SPICE2 model and the other is BSIM3v3 model. The model selection is accessed by the flag given the name as noiMod in BSIM3v3.2.2 [13].

Through noise model selection by specifying noimod, flicker noise and thermal noise can be calculated using SPICE2 or BSIM3v3 model. Another noise model supported by many simulators is the HSPICE model. In Agilent-ADS, BSIM3 model selected by noimod is valid when NLEV < 1 or HSPICE model will be used by setting NLEV values (NLEV=1, 2 or 3). In the mentioned models, two important physical effects were not considered - the velocity saturation effect and the hot-electron effect, and these effects generally become very significant in sub-100nm modern transistors.

SPICE2 Model

For noimod = 1 or 3, thermal noise is calculated according to [14]

8

= 3 ( + + )

Id m ds mbs

S kT g g g

(2-29) This model is the modification of old HPSICE model shown below as with NLEV < 3, this equation valid only in the saturation region, and is not suitable in the linear region.

BSIM3v3 Model

If noimod = 2 or 4, thermal noise power spectral density is calculated by [15]

2

4 μ

= eff

Id inv

eff

S kT Q

L

(2-30)

where Qinv is the channel inversion charge calculated according to the capacitance models (capMod=0, 1, 2, or 3). This model is only accuracy in long-channel devices because without taking the velocity saturation effect into consideration. This model is not suitable for the noise modeling of modern transistors.

HSPICE Model

The HSPICE noise model has different equations to calculate the flicker and thermal noises. Equation selection is through a parameter, NLEV. For NLEV smaller than 3, different flicker noise model was used but the same thermal noise equation was implemented which is given by [16]

8 3

= ⋅ m

Id

S kT g

(2-31) which is an old model and is lack of accuracy for modern devices.

If NLEV is set to 3, the noise equation is then given by [14]

8 1 2

3 β + +1

= ⋅ ⋅ − ⋅ ⋅

( ) +

Id GS T

kT a a

S V V G

a dsnoi

(2-32) where

β = eff ⋅μeffox

eff

W C

L (2-33)

1 , Linear region 0 Saturation region

= −

= ,

DS DSAT

a V

V

(2-34)

and Gdsnoi is the thermal noise coefficient with default value equal to 1.

Models mentioned above are integrated into various commercial simulators. Many other models have been proposed to consider velocity saturation effect, hot-electron effect or both [17, 18]. But they are not yet well accepted and verified. Noise simulation result comparison of different models was done in [19]. In this thesis, HSPICE model with NLEV set to 3 was used.

BSIM4 Model

There are two channel thermal noise model in BSIM4. One is a charge based model similar to that used in BSIM3v3.2 and the other is called the holistic model. These two model can be selected by setting the parameter tnoiMod [13]. The schematic for BSIM4 channel thermal noise model is shown in Fig. 2.3.

If tnoiMod =0 (charge based model) The noise current is given by

2

4 μ

= Δ

+

. ( )

Id

eff ds

eff inv

S kT f N

R V L

Q

TNOI

(2-35)

Where Rds(V) is the bias-dependent LDD source/drain resistance, and the parameter NTNOI is introduced to improve accuracy for fitting to short-channel devices.

If tnoiMod =1 (holistic model)

In this thermal noise model, all the short-channel effects and velocity saturation effect incorporated in the I-V model are automatically included and it explain the name given by

“holistic” noise model. In this model, the amplification of the channel thermal noise through Gm and Gmbs as well as the induced-gate noise with partial correlation to the channel thermal noise are all captured in the new noise partition model (Fig .2.3). The noise voltage source partitioned to the source side is given by

2 =4 θ 2 dseffΔ

d tnoi

ds

v kT V

I

f (2-36)

and the noise current source put in the channel region with gate and body amplification is expressed as

2 =4 dseffΔ [ +β .( + )]22.( +

d ds tnoi m mbs d m ds mbs

ds

V f

i kT G G G v G G G

I

+ )2 (2-37)

where

1 2

θtnoi = [ + . eff.( gsteff

sat eff

RNOIB TNOIB L V

E L ) ] (2-38) and

1 2

βtnoi = [ + . eff.( gsteff

sat eff

RNOIA TNOIA L V

E L ) ] (2-39) where RNOIB and RNOIA are model parameters with default values 0.37 and 0.577 respectively. In the end of this thesis for future work, 90m RF-CMOS technology with BSIM4 model will be adopted and different noise models can be specified by setting tnoiMod.

RF-CMOS at 90nm node and beyond will build the technology platform to support our future research work.

2.4 Flicker Noise Model

BSIM-3 Model [13]

There are two flicker noise models available for selection in BSIM-3. One is SPICE2 flicker noise model and the other is BSIM-3 flicker noise model. The flicker noise model parameters were shown in the following table.

1) SPICE2 model:

= 2

where f is the frequency, Cox is the gate oxide capacitance. Leff is the effective channel length.

2) BSIM3 model:

where Vtm is the thermal voltage, μeff is the effective mobility at the given bias condition. Leff

and Weff are the effective channel length and width, respectively. No is the charge density at the source side given by

ΔLclm is the channel length reduction due to channel length modulation and calculated by

0

clm sat ds dsat

sat

BSIM-4 Model [13]

There are two flicker noise models in BSIM-4. The parameter fnoimod is available to

specify which model to use. When fnoimod is set to 0, a simple flicker noise model, i.e. the SPICE2 model is invoked. As fnoimod =1 is specified, a unified physical flicker noise model is used. Basically, these two models follow those implemented in BSIM3v3, but there exist significant improvement on the unified model. For instance, the smooth transition over all bias regions is achieved and the bulk charge effect is considered in the improved model.

For fnoiMod=0 (a simple model)

where f is device operating frequency. This model is the same as SPICE2 flicker noise model in BSIM3. Note that Coxe used in BSIM4 is different from Cox used in BSIM3. This change accounts for the fact that BSIM4 adopts the electrical oxide thickness for most of capacitance

where f is device operating frequency. This model is the same as SPICE2 flicker noise model in BSIM3. Note that Coxe used in BSIM4 is different from Cox used in BSIM3. This change accounts for the fact that BSIM4 adopts the electrical oxide thickness for most of capacitance

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