Review of SSCG

Spread-spectrum clock generator (SSCG) is the clock generator utilizing the technique of SSC. Phase locked-loop (PLL) is a popular candidate for a clock generator in VLSI technology. Therefore, PLL becomes an important employee for SSCG. The block diagram of PLL with various modulations is shown in Fig. 1.2. The key components of the PLL are a phase frequency defector (PFD), a charge-pump (CP) current, a loop filter (LF), a voltage-controlled oscillator (VCO) and a programmable counter (PGC). There are three major SSC techniques employed in PLL. First, modulating the divider using a ΔΣ modulator [8] in a PLL like (A) or (D) in Fig. 1.2. It is called the Fractional-N based SSCG. The second type is to modulate the VCO directly like (B) in Fig. 1.2. Last, one may combine the multiphase outputs with special phase interpolation algorithms to achieve SSC function like (C) in Fig. 1.2. Here, three major techniques are reviewed.

1.1.1 Fractional-N based SSCG

The block diagram of a fractional-N based SSCG [8] is shown in Fig. 1.3. It is basically a fractional-N PLL using a ΔΣ modulator to modulate the divider. An up-down counter is used to generate a triangular modulation profile. The k-bits outputs of the counter are fed into the first-order ΔΣ modulator to control the dual modulus divider N-1/N+1. As a result, the output of the PLL can also track the triangular modulation profile and establish the function of spread-spectrum clocking. The first-order delta modulator is simply a (k+1) bits accumulator. The modulation frequency is determined by bit number and operation frequency of the up-down counter while the spread ratio is determined by bit number of the up-down counter and bit number of the accumulator. In this thesis, k=4 means that the bit number of the up-down counter is 4 and the bit number of the accumulator is 5. N=402. Therefore, the spread ratio is ±1/402=±0.124%. Besides, the reference frequency Fref=27 MHz and M=81.

The modulation frequency can be evaluated by 27 MHz/81/32=10.417 kHz. The advantage of this technique is that the spread ratio and modulation frequency can be easily adjusted by change the parameters of the up-down counter, composed of some simple digital circuits.

PFD Filter VCO

Fref 1/M Fvco

N-1/N+1

U/D K bits

1 bit ΣΔ modulator

Fig. 1.3. Block diagram of Fractional-N based SSCG.

Fig. 1.4. Block diagram of SSCG using direct VCO modulation.

Therefore, it can be integrated in the VLSI chips with few costs. However, the quantization noise of the sigma-delta modulator will degrade the jitter performance and EMI performance and needs carefully design.

1.1.2 SSCG Using Direct VCO Modulation

The block diagram of the SSCG using direct VCO modulation [3] is shown in Fig. 1.4.

It utilizes an extra charge-pump Ip2 combined the special loop filter components R1, R2, C1

and C2 to generate the triangular waveform as the modulation profile. When R1C1=R2C2, the relationship between VCO controlled voltage Vcntl and Ip2 can be found as

2 1 2

cntl 1

p

V

I = sC C . (1.1)

Therefore, the triangular waveform can be formed when Ip2 is a rectangular waveform.

In order to pass the modulation profile, the loop bandwidth of the PLL needs to be much smaller than the frequency of the triangular waveform. The advantage of this technique is that the architecture is very simple; however, the capacitors in the loop filter is so large (C1=0.33 uF and C2=0.22 uF) that makes it is hard to be integrated in the chips. Moreover, the spread ratio is related to the process parameters and the accuracy is also a concern.

1.1.3 SSCG Using a Multiphase VCO

The block diagram of the SSCG using a multiphase VCO with a spread spectrum generator is shown in Fig. 1.5 [7]. The VCO has 32 phase outputs. The spread spectrum generator picks up a sequence of suitable phases to periodically change the period of the VCO. The simplified block diagram of the spread spectrum generator is shown in the down side of Fig. 1.5. The spread spectrum generator uses a controller to adjust the up-down counter dependent on the current output phase. The up-down counter is fed into a 5-to-32 decoder to pick up one of 32 phases via 32-to-1 multiplexer and then feedback to the up-down counter with a frequency divided by 2. The advantage of this technique is that only some digital circuits are added to implement the function of SSCG and therefore, it is easy to be integrated in VLSI. But the maximal jitter is determined by the resolution of the multiphase generation. If one needs to minimize the jitter, the number of VCO phase needs to

Phase

Fig. 1.5. Block diagram of SSCG using the multiphase VCO.

Table 1.1 SSCG Performance Comparisons for Different Architectures Modulation method Sigma-delta VCO Multi-phase

EMI performance Good Good Bad

Jitter performance Moderate Good Bad

Integration Good Bad Good

Loop filter area Small Large Small Spread ratio accuracy Good Bad Moderate

Operation frequency High High Low

be increased and in the mean time, the power consumption and area will be increased as well.

In other words, it is not suitable for high frequency application like SATA. In addition, the accuracy of each phase will affect the linearity of the modulation profile and the EMI performance.

1.1.4 Performance Comparison Between Different SSCG Architectures The SSCG performance comparisons for different architectures are listed in Table 1.1.

Three architectures discussed above (1.1.1~1.1.3) are taken into consideration. Key parameters like EMI performance, jitter performance, flexibility to integration, loop filter area, spread ratio accuracy and operation frequency are compared. The Fractional-N based SSCG using a sigma-delta modulator has the most advantages among these architectures;

therefore, there are more and more literatures [9], [10], [13], [15], [22], [23], [24], [36], [37]

using this architectures. The SSCG using direct VCO modulation has advantages of good EMI and jitter performance and high operation frequency except some drawbacks like large loop filter areas, obstacles to triangular waveform generation and bad spread ratio accuracy.