The solar cell power management system is shown in Fig. 5.1. The power management system contains a PV cell, control unit, voltage regulator, clock generator, voltage generator, battery charger and rechargeable battery. The control unit decides who will supply energy to voltage regulator. The voltage regulator outputs 500mV to clock generator, three charge pump and power efficiency optimization unit. The voltage generator and battery charger is composed of charge pump. The voltage regulator, 1V generator and – 0.5V generator will supply three voltage level to computation circuitry and memory circuitry. The power efficiency optimization unit supplies a variable frequency clock to 1V generator. The PV cell and battery are also implemented in circuit model and simulated with power management system.
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Because there are two supply voltage sources of power management, we design a control unit to increase power efficiency of overall system. The schematics of control unit are shown in Fig 5.2. When the PV cell supplies energy to voltage regulator, the direction of current flow is from node 1 to node 2.
Thus the voltage of node 1 is higher then node 2. The OP will outputs “1” to inverter and the PMOS between PV cell and voltage regulator will be turned on.
In this case, the battery charger is active.
When the battery supplies energy to voltage regulator, the direction of current flow is from node 2 to node 1. Thus the voltage of node 2 is higher then node 1. The OP will outputs “0” to inverter and the PMOS between PV cell and voltage regulator will be turn off. In this case, the control unit will disable the battery charger. With decreasing the current flow back to PV cell and disabling the battery charger, the energy of battery is used efficiently.
Fig 5.1 The solar cell power management system
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Fig 5.3 The voltage level of output of regulator and output of 1V generator in the condition of loading increase and PV cell power reduce gradually
Fig 5.2 The control unit
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Fig 5.3 shows the simulation voltage level of output of regulator(Vregu) and output of 1V generator(Vpump) in the condition of loading increase and PV cell power reduce gradually. The Vregu influence by the power supply of PV cell and the loading attach to it, the range of voltage level of Vregu in the simulation condition is 450mV~580mV. The 1V generator in this simulation is connected to a constant clock. As the loading increase and PV cell power reduce, the Vpump decrease dramatically. The range of voltage level 1V generator in the simulation condition is 1.1V~570mV. The output of 1V generator Vpump will break down with constant clock supply in the condition that loading increase and PV cell power reduce.
A power efficiency optimization unit is designed to optimize the power efficiency of 1V generator. The unit will supply variable clock frequency to the 1V generator according to the output condition. In light loading case, the power efficiency optimization unit outputs low frequency clock to charge pump and reduce the power consumption. When the loading is heavy, the frequency of clock is increased for keeping the output voltage level of charge pump and prevent breakdown happen.
The power supply of efficiency optimization unit and clock system is from regulator (Vregu). The system have to be worked with power supply vary as simulation above. The 1V generator has sensitive to input frequency of clock of range 50MHz ~ 200MHz. Increase the frequency of clock can increase the light, in our simulation the frequency below 50MHz will not help to increase the efficiency even with light loading. After simulation and discussion, the frequency range of clock to supply the 1V generator is from 50MHz to 200MHz, this range is the minimum frequency range of clock generator. The clock generator have to generate this minimum range with all possible power supply condition, that is, with regulator output (Vregu) vary from 450mV ~580mV. The low voltage wide tuning range oscillator in chapter4 is designed according to this constraint.
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Assume the output of 1V generator is very light loading, the best frequency of clock supply to 1V generator to achieve maximum power efficiency is 50MHz; but the work condition of voltage regulator could be vary since the power supply of PV cell could be vary. The output voltage Vregu could be at any level within the range 450~580mV. The low frequency target is associated with 580mV, the clock generator have to be able to generate 50MHz when power supply is 580mV to guarantee the low frequency target 50MHz in all power supply cases. The high frequency target is associated with lowest power supply 450mV, the clock generator have to be able to generate 200MHz when power supply is 450mV to guarantee the high frequency target 200MHz in all power supply cases.
The proposed type I low voltage oscillator in chapter 4 has meet the high frequency target 200MHz in the power supply range, but the type I low voltage oscillator slightly miss the low frequency target 50MHz when power supply is roughly above 500mV. This performance variation, however, is still acceptable in our system. The proposed type II low voltage oscillator in chapter 4 has very wide tuning range and meet both low/high frequency targets in the power supply range perfectly. The range is much larger than the design constraint minimum range and this provide the design to handle with process variation. The type II low voltage oscillator was used to simulate with power management system, the simulation results will be shown in next section.