In order to improve the immunity of microelectronic products to achieve the strict ESD specifications, system designers can take many approaches to prevent ESD damage. One of the system design solution against system-level ESD events is to add some discrete noise-decoupling components or board–level noise filters on the printed circuit board (PCB), as shown in Fig. 2.1. For example, Fig. 2.1(a) shows the system solution to overcome the system-level ESD issue in keyboard, and Fig. 2.1(b) is used for universal series bus (USB) input/output (I/O) port.
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(a)
(b)
Fig. 2.1 The system solution to overcome the system-level ESD issue by adding extra discrete components to absorb or bypass the electrical fast transients (a) in keyboard and (b) in USB I/O port.
These discrete components are used to decouple, bypass, or absorb the transient noise generated from system-level ESD events. Therefore, the discrete components can reduce the transient energy of transient disturbance coupled on power lines of CMOS ICs inside microelectronic products. Some noise-decoupling components can even clamp the transient voltage at low level to avoid ESD damage on internal circuits of CMOS ICs. Some discrete noise-bypassing components for system-level ESD protection, such as transient voltage suppressor (TVS), or low-pass noise filters, have been reported and would discuss in the following sections [12].
2.2.1. Transient Voltage Suppressor (TVS)
Transient voltage suppressor (TVS) is commonly used to improve the system-level ESD immunity of microelectronic products. It can provide ESD energy discharge path under system-level ESD tests. TVS is located between I/O ports and connected pins of CMOS ICs
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to provide system-level ESD protection function in the PCB of microelectronic products. The main function of TVS is to absorb high peak power under ESD tests. It is acted as a surge protector. The peak pulse power of TVS can be estimated by
peak pp clamp
P I V (1)
where Ipp is the maximum lightning current that TVS can bypass, and Vclamp is the voltage when Ipp is applied across the device. Devices with lower clamping voltage during ESD stress conditions can sustain higher ESD level. Although TVS could be ESD protector, its immunity performance is not well enough compared to other discrete components. Moreover, TVS has high capacitive loading, which can cause distortion on high data rate signals. As a result, TVS is not suitable for high speed applications.
For ESD protections, there are many types of TVS components, such as varistor, metal oxide varistors (MOVs), and zener diode, etcs. Varistors are made of ceramic materials.
MOVs contain a ceramic mass of zinc oxide grains. Compare with other TVS components, MOVs have lower capacitance. However, for high speed interface applications, the capacitance of MOVs is still too high to prevent signal distortion. Moreover, MOVs has high impedance with low clamping voltage. When the voltage across this device is high, the resistance value would drop to a low level. This voltage drop across the varistor will dramatically increase as the current increase. As a result, if the ESD clamping voltage is too high, varistor is hard to protect electronic products.
2.2.2. Low-Pass Noise Filter
To meet the strict system-level ESD specification, different types of board-level noise filters have been investigated to improve the immunity of CMOS ICs inside the
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microelectronic products under system-level ESD tests [13]. Adding board-level noise filter between noise trigger source and CMOS ICs can absorb, bypass, or decouple ESD-generated energy to avoid ESD damage on EUT. Several types of board-level noise filters, such as capacitor filter, LC-like filter (2nd-order), and-section filter (3rd-order), as shown in Fig. 2.2, have been confirmed the enhancement of system-level ESD immunity. For evaluating the transient-induced latchup (TLU) level of DUT, these three different kinds of filters are investigated. Among different noise filter network, the higher-order noise filters have better performance to enhance TLU-triggered level of DUT, and thus have better immunity against system-level ESD events. Experimental data is shown in Fig. 2.3 [13].
(a) (b) (c)
Fig. 2.2 Board-level noise filter of (a) capacitor filter, (b) LC-like filter, and (c)-section filter.
Fig. 2.3 Relations between the decoupling capacitance and the TLU level of the DUT under three types of noise filter networks: capacitor filter, LC-like filter, and -section filter [13].
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2.2.3. Design Concept of Printed Circuit Board (PCB)
While discrete ESD components are used to suppress the effect of system-level ESD events, PCB design is another important topic on ESD protection design. A simple diagram was shown in Fig. 2.1. To design the printed circuit board against system-level ESD events, few concepts needs to be taken into account. First, the induced magnetic current into circuit loop will be proportional to the size of the loop [12]. Therefore, minimizing the loop size on the PCB is a critical design for ESD reliability enhancement. Second, place the circuit devices on the PCB as close as possible to minimize the lengths of signal and power lines. It can avoid receiving too much energy generating from system-level ESD events.
2.2.4. External Hardware Timer
Another method which is totally different from the previous solutions is to regularly check the system abnormal conditions by using an external hardware timer, such as watch dog timer. This additional hardware timer is often designed with registers or flip flops as a reference clock for system operation if the main program was locked or frozen due to some fault conditions. However, during system-level ESD or EFT tests, the logic states stored in the registers or flip flops of hardware timer would sometimes also be destroyed, still causing malfunction or frozen condition in the system operation. Therefore, this kind of timer is not a stable way to protect microelectronic products against system-level ESD events.