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Derivation and Design of Resonant Operation for Current Gain 42

Chapter 4 Low-Power Front-End Circuit

4.4 Transformer Design

4.3.2 Derivation and Design of Resonant Operation for Current Gain 42

for Current Gain

Before calculating for the current transfer equation, let’s take a look at resonant network[15] which is composed of two LC resonant circuits with some mutual coupling between them as shown in Fig. 4.11. The resonant frequencies are w1 and w2, respectively.

2 2 2

1 1 1

, 1 1

C L C

L =

= ω

ω

(4-14)

Let w =mw . The two resonant frequencies of this system can be derived as

Fig. 4.11 Resonant system

2 4 2 2 2

For two resonators of the same frequency wo, m=1, when there exists some coupling between them, the coupled system’s resonant frequency will depart from wo

due to the coupling coefficient. For two resonators of different resonant frequency, the systems resonant frequency will depend not only on k, but also on their separate resonant frequencies. When the resonant system resonant at the desired frequency, no matter it is of the higher resonant frequency or the lower one, the current gain can be relatively high.

Let’s consider for the model to calculate for the current transfer equation of the fabricated transformer. Since the signal is differential at the second turn, there exists a virtually short point for the transformer, the center tape, and two of the switching pairs of the front-end circuit are turned on by the LO signal. The simplified equivalent

circuit for the half path of Fig. 4.1 can be shown as Fig. 4.12. Rs and RL are the source and load impedances which are extracted from the former stage, LNA, and the following stage, switching stage, respectively. C1 and C2 are the parallel combination of the parasitic capacitances of transformer and that of the stages connected to it. With the definition of following coefficients, the transfer function would be a function of five variables, m, k, n, L1, and C1 when Rs, RL, w, and α are defined.

The current transfer function is (4-18) which is given as:

)]}

To design the transformer for resonant operation, (4-16) are assumed equal to operation frequency in turn and w is therefore solved for given m and k condition.

Iin RS C1 M C2

RS1 L1-M L2-M RS2 Iout

RL

Fig. 4.12 small signal model for current transfer function calculation

Once w2 is found, w1 is also known. The remained unknowns are the L1 and L2 values, which is equivalent to L1 and n, and C1 and C2, the last two unknowns, can be derived after these two values are defined. There are lots of possible solutions for L1 and n.

All these solutions satisfy the resonant operation condition. But among them, the rules of L1 and n combination which gives the highest possible gain need to be found out.

Since the target of the design is to find high gain solution, (4-18) is calculated for sets of L1 and n. Fig. 4.13 to Fig. 4.15 are the gain variation condition with solutions of L1

and n under certain m and k combination. The current gain is calculated for:

Rs=7.675kΩ, RL=276Ω, α=1Ω/nH case. Rs and RL is the extracted ro of LNA and operation parallel 1/gm of the switching pair.

1.07

Assumed three conditions: m=0.6 (m<1), m=1, m=1.4 (m>1) and set lower resonant frequency fL as 5.5GHz. The condition for higher gain is limited to certain turn ratio and the calculated gain becomes saturated for that turn ratio as L1 gets larger.

For larger m (w1 is higher than w2), the turn ratio for higher gain is moved to larger region than smaller m case. The current gain gets higher as k larger. No matter what the m value is, the current gain has close order of magnitude. But for m<1 and

0.239 0.761

0.935 1.11 1.28 1.46

1.63 0.587

0.413

1 2 3 4 5 6 7 8 9 10

0 1 2 3 4 5 6 7 8 9 10

Turn Ratio n

L1 (nH)

m=1.4, k=0.45, α=1 fH=10.0, f1=f2=5.92

Fig. 4.15 Current gain relative to n and L1. Set fL=5.5GHz. m=1.4, k=0.45

fL=5.5GHz case, the current gain can be larger than the turn ratio due to the resonant operation mode. Moreover, for m>1 and lower resonant frequency fH=5.5GHz case, the current gain can also be larger than the turn ratio as shown in Fig. 4.16.

For k higher, the current gain is getting lower for fH equal to 5.5GHz case. Although the current gain larger than turn ratio for m>1 case, the magnitude under this case is much lower than setting fL to 5.5GHz cases. Therefore, it is better to design fL as the

0.137

As mentioned in last few paragraphs, for fL=5.5GHz case, the current gain for different m is quite close and the gain is higher for larger k, how to make decision for these parameters? The constraint is given by the unavoidable parasitic capacitance of the transformer and that of the stages connected to transformer. C1 is typically the limit since the turn ratio larger than one means smaller L2, then calculated C2 is usually quite large. Fig. 4.17 shows the calculated C1 value for Fig. 4.13 (a) and (b).

When the coupling coefficient gets larger, the calculated resonant frequency w2

500

Fig. 4.17 Calculated C1 for different solutions (a) m=0.6, k=0.45 (b) m=0.6, k=0.65 (c) m=1, k=0.45.

becomes larger which means a larger w1. Then the C1 would become smaller as shown in Fig. 4.17(a) and (b). When m is larger, even though w2 is smaller, w1=mw2

is not necessary smaller since m increases. The m large case’s gain is limited by the C1 and achievable gain might be low.

By the inductor model of TSMC, one can estimate the parasitic capacitance of the transformer and then decide the parameters. Fig. 4.18 shows the frequency response of several inductors, by the resonant frequency of the inductor, the parasitic capacitance is estimated as 52fF for 4.7nH inductor. The parasitic of the transformer is expected to be larger than that of the inductor. Besides, the capacitance looked back into the LNA also needs to be considered. Then, the C1 limit is set as 150fF for a 4.5nH inductor. Since the C limit of higher k is smaller, and the gain level of higher k

0 2 4 6 8 10 12 14 16 18 20

-800 -600 -400 -200 0 200 400 600 800

Imag(z)

Frequency (GHz)

3.2nH 7.9nH 6.2nH 4.7nH TSMC 018 Inductor_STD

Space=2um, Width=9um, Turn=4.5

Fig. 4.18 Frequency response of TSMC inductors.

case is close to smaller k case which is easier to fabricate, the parameters is chosen as m=0.6, k=0.65, L1=4.5nH, n=2.8 from Fig. 4.13(b) and 4.17(b), and correspondingly C1=160fF, L2=0.5nH, C2=1.67pF. The calculated current gain is about 1.8.

0.20

0.50 0.55 0.60 0.65 0.70 0.75 0.80 1.6

Fig. 4.19 Gain sensitivity of the design point (a) Gain sensitivity to k and turn ratio of the selected design set (b) Gain sensitivity to L1 and C1 of the selected design set.

After the parameters have been decide, the gain variation due to the variation of the parameter values should be observed to find which parameter is more critical. Fig.

4.19 shows the gain variation. The L1 and C1 are more critical than n and k. The gain decreases quickly as the values depart from a limited range. Therefore, when design the transformer, the L1 and C1 value have to be the first priority.

What limits the current gain magnitude? One is the resistance of the metal line which is modeled by α. As shown in Fig. 4.20, the current gain is higher as the loss is less. Beside, the range of n for high gain is moved to higher region, but it is confined to be less than the square root of Rs/RL. Therefore, the loss of the inductor is smaller is preferred.

Another important factor affects gain is the source and load resistance ratio. It is desired that the source resistance is as large as possible and the load resistance is as

0.600 0.820

1.48 1.70 1.92

2.14 1.26

1.04

1 2 3 4 5 6 7 8 9 10

0 1 2 3 4 5 6 7 8 9 10

Turn Ratio n

L1 (nH)

m=0.6, k=0.65, α=0.5 fH=14.29, f1=5.99, f2=10.0

Fig. 4.20 Current gain relative to n and L1. Solve fL=5.5GHz with less loss

small as possible. As shown in Fig. 4.21, it is the current gain plot for Rs=7675 and RL=50.

The current gain is higher than RL=276 case, and the high gain region moves to higher n place. Therefore, one should make the source to load resistance ratio larger for better gain performance.

To show that the design according to resonant frequency solutions does gives relative high current gain, a simple program is written to calculate gain for sweep of all the possible combinations of variables: m, k, n, L1 when C1 limited to 150fF.

TABLE 4.1 lists the highest gain for a given m, and the relative k, n, L1 values. As shown, the fL or fH of these sets is close to 5.5GHz.

TABLE 4.1 Sweep variables to find maximum gain.

m k n L1 (nH) Gain fL (GHz) fH (GHz)

0.6 0.75 3 4.5 1.84 5.52 17.13

1 0.85 3.4 3 1.75 5.51 19.35

1.4 0.35 0.6 6.5 1.62 3.46 5.72

0.722 1.20 1.69 2.17

2.653.13 3.61

4.10

4.58

1 2 3 4 5 6 7 8 9 10

0 1 2 3 4 5 6 7 8 9 10

Turn Ratio n

L1 (nH)

m=0.6, k=0.65, α=1 fH=14.29, f1=5.99, f2=10.0

Fig. 4.21 Current gain relative to n and L1. Set Rs to RL ratio larger.

4.3.3 Physical Dimension Design of the Transformer

The self-inductance for a straight planar rectangular conductor according to [18] is ] L is the inductance in nanohenries, l is the conductor length in centimeters, geometric mean distance (GMD) and arithmetic mean distance (AMD) represent the geometric and arithmetic mean distances, respectively of the conductor cross section, μ is the conductor permeability, and T is a frequency-correction parameter which is almost equal to 1 for thin film and microwave frequencies. GMD is the distance between two imaginary filaments normal to the cross section of the conductor, whose mutual inductance is equal to the self-inductance of the conductor. AMD is the average of all possible distance within the cross section. For thin-film inductors with rectangular sections, GMD is 0.2232(a+b) and AMD is (a+b)/3. (4-19) reduces to

]] The inductance of a straight line is approximate proportional to the length of it. For a=8um, b=2.34um case, as shown in Fig. 4.22. The calculated (4-20) for this case is shown in Fig. 4.23.

The mutual inductance between two parallel conductors is a function of the length of the conductors and of the geometric mean distance between them. In general, according to [18],

Q

M =2l (4-21) where M is the mutual inductance in nanohenries, Q is the mutual-inductance parameter,

GMD is the geometric mean distance between the two conductors, which is approximately equal to the distance d between the track centers. The exact value is

...]}

Consider for Fig. 22, take these parameters into equations with 2.34um thickness, the self inductance of one straight inductor is about 0.274nH and the mutual conductance between these two conductors is about 0.191nH. The mutual conductance is positive in this case, since the current flow in each of the pairs is in the same direction. The

Fig. 4.23 Inductance magnitude varies with length for a straight inductor.

coupling coefficient k is about 0.697. This example gives us an idea of the magnitude level of the self-inductance of two inductors separated 10um.

The total inductance LT of a coil can be written as

+ − +

=L M M

LT O (4-24) where LO is the sum of the self-inductances of all the straight segments, M+ is the positive mutual inductance when current flow in two parallel conductors is in the same direction, and M- is that when opposite direction. For a planar spiral inductor, M- is mainly attributed from the opposite segments which is much far than the nearby segments that have current in the same direction, so the radius of the spiral inductor shouldn’t be too small, or the total inductance will degrade due to the negative term.

Assume the center to center distance of Fig. increases to 300um from 10um, the

OD

w1 w2 2w2+s

OD

w1 w2 2w2+s

mutual inductance becomes 0.028nH which is much lower than 0.191nH for 10um separation.

From last section, the transformer should satisfy the following requirements:

k=0.65, L1=4.5nH, n=2.8

Since the self-inductance of a straight line is almost proportional to its length, a transformer with physical turn ratio as 4 to 1 between primary turn and one of the secondary turn is designed as shown in Fig. 24. The square root of the physical turn ratio is only 2, but the width of primary turn can be set larger than the secondary turn.

Moreover, when the mutual inductance is taken into consideration, the turn ratio is expected to be closer to what is required. As from the calculation in former paragraphs, the separation between turns is around 10um for k consideration and outside dimension is around 250um from L1 requirement.

The actual character of the transformer needs to be checked with EM simulation tool. In this design, Ansoft Designer helps the verification and only few times of iterations are required to find optimum physical dimension since it should be close to the estimation. The dimension of the transformer is chosen as:

OD=260um, w1=8um, w2=10um, s=1um.

The extracted value for this transistor’s model as shown in Fig. 4.12 is:

k=0.642, n=2.76, L1=4.408nH, L2=0.578nH, R1=8.043Ω, R2=2.414Ω

Fig. 4.25 is the comparison of S21 between extracted model’s and the simulation of EM tool’s frequency response. The simulation current gain of the front-end circuit with S parameter extracted from Designer is about 2.1 while the calculated value is 1.8.

The model for the transformer is very simplified since a complex one is not useful for calculation. Therefore, there exists certain calculation difference between the model and the fabrication result.

dB(S21) Phas e( S2 1)

Fig. 4.25 Comparison of the extraction and model’s frequency response.

4.5 Chip Implementation and Measured Result

The die micrograph of the front-end circuit fabricated in 0.18-um RF CMOS technology is shown in Fig. 4.26. The size of the chip is 1.16×0.75 mm2 including bonding pads.

Measurements were conducted by the similar approach for mixer. The supply voltage VDD is set as 0.6V in the measurements. The total DC power consumption is

LO+

LO-RFin

Fig. 4.26 Micrograph of the front-end circuit.

only 0.29mW. The measured and the simulated input return loss centered at 5.5 GHz

5.40 5.45 5.50 5.55 5.60

8

Fig. 4.27 Front-end measured result (a) S11 (b) Conversion gain (c) Conversion gain versus LO power (d) Conversion gain and DC current versus VDD (e) Noise figure (DSB).

frequency band. It is found on the Smith chart that the frequency response is similar to the simulated one, though the impedance is a little higher at the center frequency. The RF signal is down-converted to 1 MHz. The measured conversion gain is 12 dB as depicted in Fig. 4.27(b). It is close to the simulation in Typical-Typical corner case.

The maximum gain condition is corresponding to LO power as -3dBm as shown in Fig. 4.27(c). Fig. 4.27(d) shows the conversion gain and DC current with different VDD. Two-tone test is done for measuring third-order intermodulation distortion. The measured IIP3 is about -2.8dBm. In the measurement, LO power is given as -3dBm, and the power consumption of active mode is 0.68mW. The measured noise figure is 11.0dB. Measurement is done through noise floor magnitude read from the instrument.

The setup is shown in Fig. 4.28. The gain of the pre-amplifier and circuit under test, the noise figure of pre-amplifier, and the noise contributed by IF amplifier (unit gain buffer) and all the connected devices are measured and used to calculate for the noise figure of the front-end circuit. The measured noise figure is about 3 dB higher than the simulated result under slow-slow corner case.

IIP3 depends on the loading impedance of the MOS as shown in Fig. 4.29(a). The optimum bias point is 0.55V for the chosen MOS size when the load impedance is around 600 Ohm. This bias point chosen is observed to be in the moderate inversion region. The measured and simulation IIP3 versus LNA’s gate voltage of the front-end

circuit is shown in Fig. 4.29(b). The highest point is about 0.54V which is around that of a single transistor. The measured IIP3 and conversion gain at 0.54V is 2.5dBm and 10dB, respectively. The linearity is improved about 5dB while trades 2dB conversion gain.

A modified version has taken this into consideration. Moreover, LO power

0.40 0.45 0.50 0.55 0.60

-10 -5 0 5 10 15 20

IIP3 (dBm)

VGLNA (mA)

0.40 0.45 0.50 0.55 0.60 -20

-15 -10 -5 0

5 Sim_TT

Meas.

IIP3 (dBm)

VGLNA (V)

SPECTRUM ANALYZER

Input

DUT

Power Supply +28V

Noise Source

(On/off)

SG (LO)

IF Amp (drive 50Ω)

IF Differential Output

RF input LO input

( always on )

Pre-amplifier

10dB Attenuator

3dB Attenuator

Fig. 4.28 Noise measurement setup.

consumption has also been lowered down. In this circuit, the circuit operates at LO power equal to -3dBm. The LO voltage amplitude at the gate of mixing pair is about 0.25V which is quite high under 0.6V supply. The modified version operates at LO power as low as -7.5dBm. The LO voltage amplitude at the gate of mixing pair is about 0.15V only.

The simulated conversion gain of the circuit in Fig. 4.27 is not high. This is much less than the original result which was used as the fabrication basis. The conversion gain of it was about 19dB. But there was something wrong with the original file when the simulation tool upgraded. Fig. 4.27 shown in the thesis has been redone. The modified version mentioned in last paragraph does not have this issue.

4.6 Summary

In this work a 5-GHz receiver front-end circuit is designed for the application of wireless sensor networks. The circuit topology is chosen available for low supply voltage as low as 0.6V. An On-chip transformer with current conversion gain is analyzed and designed to convert single-ended signal from the single transistor LNA into differential form to benefit from double balanced mixer structure. A figure of merit for LNA is also presented for the optimum design condition under low supply voltage case.

Realized in 0.18-um CMOS technology, the measured input return loss and voltage conversion gain are 16.9dB and 12dB, respectively. The input third-order intercept point (IIP3) is -2.8dBm while consuming only 0.29mW from a 0.6V supply. Table III summaries the measured results of this work and compares the performance with other three circuits. Among these, [19] is composed of a differential LNA and a double balanced mixer designed for low power purpose. [3] also adopts transformer for current conversion. [20] is a single balanced low power receiver front-end. As compared to the three circuits, this work has comparable gain and linearity while consuming the lowest power and lower supply voltage.

TABLE 4.2 also lists the simulation performance of the modified version. The bias

is improved and the simulation result is 3dBm. LO power is cut down to -9dBm, 6dB short as compare to the first version. Though the DC power consumption is close to the former work, the operation power consumption is improve, about 1/2 times of that of the original circuit.

TABLE 4.2

Summary of measured performance and comparison to other front-end circuits.

Item This Work Modified

(sim_TT)

Ref[19] Ref[3] Ref[20]

Technology CMOS 0.18um

CMOS 0.18um

CMOS 0.18um

SiGe- BiCMOS 0.35um

CMOS 0.18um RF Frequency

(GHz)

5.5 5.5 5.8 5.8 5

DC Supply Voltage (V)

0.6 0.6 1.5 1.8 1 Conversion Gain

(dB)

12 17.6 15.7 14 25

IIP3 (dBm) -2.8 3.0 -20.56 -1.6 -6.5

Noise Figure (dB) 11.0 8.8 4.8 - 12

Power Dissipation (mW)

0.29* 0.21** 17.2 13.8 0.87

* Power dissipation for standby mode. The power consumption for active mode is 0.68mW.

** Power dissipation for standby mode. The power consumption for active mode is 0.34mW.

Chapter 5

Conclusion and Future Work

5.1 Conclusion

Two circuits, fabricated in TSMC 0.18um RF CMOS technology, are proposed for the application of wireless sensor networks. One is a low power double-balanced mixer which is composed of a transconductance stage with phase splitting function and PMOS switching pairs in the folded topology. The output balance and noise contribution conditions of the transconductance stage have been analyzed theoretically and designed accordingly. The measured voltage conversion gain is 10.4dB and the total power consumption of it is 2mW from a 1V supply.

Another circuit is a 5-GHz receiver front-end circuit whose topology is chosen to suit the application of low supply voltage and low power consumption. A transformer in resonant operation is designed to have current transformation gain and to convert signal into differential form while consumes zero extra power. Besides, a single transistor low noise amplifier is adopted and carefully designed. The measured result shows the voltage conversion gain is 12dB and the total power consumption of this work is greatly cut down to only 0.29 mw from a 0.6V supply.

5.2 Future Work

About the first circuit, the frequency response of the mixer has a potential to be extended for broadband application since the input matching and output balanced condition has neglected dependence on frequencies when frequencies are low as compare to fT. The LC tank must be dismissed and replaced by an element that has broader frequency response, an inductor, for example.

For the second circuit, the physical limitation of the fabricated transformer has set a design constraint for the resonant operation current transfer gain or equivalently the

For the second circuit, the physical limitation of the fabricated transformer has set a design constraint for the resonant operation current transfer gain or equivalently the

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