Dickson Charge Pump

The Cockcroft and Walton charge pump has its limitations. To overcome the limitations, a new charge pump structure was proposed by John F. Dickson in1976 [7], as shown in Fig. 13.

The charge pump then called as “Dickson Charge Pump” because it was proposed by John F.

Dickson. Its operation theorem is similar with Cockcroft and Walton charge pump circuit. The diode chain is coupled to the inputs via capacitors in parallel in the Dickson charge pump instead of in series as Cockcroft and Walton charge pump. It needs a pair of clock input clk and clkb with reversion phases to drive the Dickson charge pump. When clk is high and clkb is at low, the diode between the capacitor connected to the clk and the capacitor connected to the clkb will be turned ON and the capacitor connected to clkb will be charged through the diode. Wen clk is at low and clkb at high, the diode mentioned will be turned OFF and the next diode will be turned ON and transfer the charge to the next stage.

VIN VOUT

Fig. 13 Dickson charge pump with diode and capacitor implementation

The Dickson charge pump with diode implementation is not sufficient for modern IC industry, it needs too much space. To overcome the size problem, a practical implementation of the Dickson charge pump is proposed as shown in Fig. 14. The diodes used before is replaced by diode-connected MOS transistors. It is more suitable for most of the

semiconductor logic process. As shown in Fig. 14, the diodes are replaced by NMOS transistors, therefore the diode forward voltage, V_D, is replaced by the NMOS threshold voltage, Vt, and the threshold voltage Vt is related to the node voltage of each stage.

V^DD

Fig. 14 Dickson charge pump with MOSFET implementation

The operation of the Dickson charge pump circuit is shown in Fig. 14. It is a typical n-stage Dickson charge pump. The input CLK and CLKB are two out-of-phase clocks with amplitude VCLK. These two clocks will increase the potential voltage in capacitors by transferring charges in the capacitor chains through diode-connected MOS transistors. The coupling capacitors will be charged and discharged during each half clock cycle. We first define Cs as the stray capacitance at each node. The coupling capacitances are given as C. The voltage difference between the voltages of the nth stage and (n+1)th nodes is given by:

' 1

n n CLK

V V

V V V

∆ = − = +

Where the voltage gain can be express as:

'

(

)

The equation above is the ideal output voltage when there is no output load and no output current delivered. When the charge pump is connected to an output load, the load current at a clock frequency f , is given by:

( )

OUT S L

I = f C + C V

V_L is the voltage drop per stage for supplying the load current. Therefore, the output voltage will be reduced an N* VL voltage. So the output voltage with load will be rewrite as follow:

Above is the operation and equations for an n-stage Dickson charge pump. Next we are going to see the drawbacks of the Dickson charge pump. The major drawback of the Dickson charge pump is the body effect[8][9]. The threshold voltage of a NMOS transistor is given by:

0

2 ln

2 ln

With the increasing stages of the Dickson charge pump, the threshold voltage will be enlarged. It leads to less voltage gain and poor efficiency. The techniques to overcome the drawback have been proposed. Such as floating well MOS transistor [10], the 4 phase charge pump and the boosted pump clock scheme to fully turn on MOS transistor to reduced the body effect [11][12]; a new clocking scheme to control the charge pump [13] and the CTS scheme. In the CTS scheme, an additional transistor is being added to the circuit, and the gate transistor will be controlled by the next stage voltage. We will discuss these solutions in the next section in detail.

2.2.3 4-Phase Charge Pump

The Dickson chare pump mentioned in previous section is suffering the disadvantage and efficiency loss due to the threshold voltage and body effect. The 4-phase charge pump [14][15]

is a solution to cancel the effect of the threshold voltage and body effect.

M0 M1 where the 4-phase charge pump differs from the Dickson charge pump it that the 4-phase charge pump added a MOSFET and a capacitor at each stage. The additional bootstrapping circuits on the gates of NMOS pass transistors are the main contributors to eliminate threshold voltage effect. By added the additional bootstrapping circuits, the gate voltages of NMOS pass transistors are boosted to a higher voltage level than the drain voltage. By doing so, the NMOS pass transistors are fully turned on. Fully turned on NMOS pass transistor allow source and drain terminals to be equalized to the same voltage potential while charge transferring through the pass transistor. The drawback of this design is the extra bootstrapping

circuits needed per pump stage and the extra clocking scheme circuit, it leads to larger chip area. But with the additional circuits, the gain of the 4-phase charge pump can be significant improved. Over the same chip area, the 4-stage charge pump can achieve higher gain and higher charge transfer efficiency.

Fig. 16 4-phase chare pump clocking scheme

The operation of the 4-phase charge pump is going to be unfolded. As we can see in the Fig. 15, clk1, clk2, clk3 and clk4 are the non-overlapping clocks. Fig. 16 shows the clocking scheme of these four clocks. In Fig. 15, in the first stage consists of M0 and C₁, when clk1 is low, the diode connected pass transistor M0 is turned on and charges the capacitor C1 to the voltage level V_DD− . Once when the voltage of node n1 is lower than V_t V_DD−V_t, the pass transistor M0 is turned on and charge C1 to V_DD− . In the next stage, which is consists of V_t M1, M2, C₁, C₂ and C_g1. When clk1 is low, clk2 is high and clk3 is low. Node n2 is pulled high by clk2 through capacitor C2 and turned on pass transistor M2. Capacitor Cg1 will be charged and push node g1 to a voltage about V_DD− . We can see that the gate of pass V_t transistor M1 is not connected direct to the drain as diode connected, it is connected to Cg1. And during next phase, clk3 changes from low to high and push the gate of M1 to a higher voltage than its drain terminal. Therefore the pass transistor M1 is fully turned on. The

threshold voltage of M1 is canceled when M1 is fully turned on to conduct. The charge will completely pass through M1 and makes nodes n1 and n2 at the same voltage level. And we analysis the n-stage 4-phase charge pump as we did with Dickson charge pump, the output voltage is given by:

(

)

OUT DD clk

S S

I

V V n C V

C C C C f

⎡⎛ ⎞ ⎤

= + ⎢⎣⎜⎝ + ⎟⎠− + ^osc ⎥⎦ (11)

The threshold voltage Vt is canceled and the efficiency of the charge pump is improved with the bootstrapping circuit attached.