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Chapter 3 Analysis and Design of Trench LDMOSFET

3.5 Efficiency Analysis

For application of LCD display, To design a power MOSFET, reverse voltage is 150V and lower on-resistance, to use LDMOSFET and Trench LDMOSFET technology.

According to the above-mentioned discussion, we choose to use Trench LDMOSFET to conform to characteristic of power device, and find a parameter set of Trench LDMOSFET, which compares efficiency with LDMOSFET. Efficiency equation of power MOSFET is composed of breakdown voltage and on-resistance. This equation is as follows.

2

_ ( )

_ Re tan

Breakdown Voltage V Efficiency

On sis ce m cm

= Ω − ( 3.4 )

By equation 3.4 [20], efficiency of power MOSFET determines breakdown voltage and on-resistance whether better or worse device. If efficiency is getting large, it shows better power MOSFET, on the other hand, efficiency is getting small, it shows worse power MOSFET.

Trench LDMOSFET compares data of efficiency with LDMOSFET. It is shown in Table 3.2. Parameter of Trench LDMOSFET is 5 times efficiency of LDMOSFET, breakdown voltage is 159V, specific on-resistance is 11.3 mΩ-cm2, this is a better design.

Table 3.2 Parameter comparison of Power MOSFET

Power MOSFET

Parameter Condition Breakdown Voltage ( V )

CHAPTER 4

Optimal design of Trench LDMOSFET

4.1 Introduction to experiment methods

In order to gain optimal design, we can choose 3 kinds of experiment methods commonly. Experiment methods include trial-and-error, one factor at a time, and Taguchi Methods. A well planned set of experiments, in which all parameters of interest are varied over a specified range, is a much better approach to obtain systematic data.

Mathematically speaking, such a complete set of experiments ought to give desired results. Usually the number of experiments and resources (materials and time) required are prohibitively large. Often the experimenter decides to perform a subset of the complete set of experiments to save on time and money. However, it does not easily lend itself to understanding of science behind the phenomenon. The analysis is not very easy (though it may be easy for the mathematician/statistician) and thus effects of various parameters on the observed data are not readily apparent. In many cases, particularly those in which some optimization is required, the method does not point to the best settings of parameters. A classic example illustrating the drawback of design of experiments is found in the planning of a world cup event, say football. While all matches are well arranged with respect to the different teams and different venues on different dates and yet the planning does not care about the result of any match (win or lose). Obviously, such a strategy is not desirable for conducting scientific experiments.

Firstly, trial-and-error performs a series of experiments each of which gives some understanding. This requires making measurements after every experiment so that analysis of observed data will allow him to decide what to do next parameters should be varied and by how much. Many a times such series does not progress much as negative results may discourage or will not allow a selection of parameters which ought to be changed in the next experiment. Therefore, such experimentation usually ends well before the number of experiment reach a double digit. The data is insufficient to draw any significant conclusions and the main problem of understanding the science still remains unsolved.

Secondly, the adaptive one-factor-at-a-time method requires some experimental trials. The method provides estimates of the conditional main effects of each experimental factor but cannot resolve interactions among experimental factors. The adaptive one-factor-at-a-time approach provides no guarantee of identifying the optimal factor settings. Both random experimental error and interactions among factors may lead to a sub-optimal choice of factor settings.

Thirdly, Dr. Taguchi of Nippon Telephones and Telegraph Company, Japan has developed a method based on orthogonal array experiments which gives much reduced variance for the experiment with optimum settings of control parameters. Thus the marriage of design of experiments with optimization of control parameters to obtain BEST results is achieved in the Taguchi Method [21]. Orthogonal Arrays (OA) provide a set of well balanced (minimum) experiments and Dr. Taguchi's Signal-to-Noise ratios

(S/N), which are log functions of desired output, serve as objective functions for optimization, helping in data analysis and prediction of optimum results.

4.2 Procedure of Taguchi Methods

Taguchi methods is a scientifically disciplined mechanism for evaluating and implementing improvements in products, processes, materials, equipment, and facilities.

These improvements are aimed at improving the desired characteristics and simultaneously reducing the number of defects by studying the key variables controlling the process and optimizing the procedures or design to yield the best results.

The method is applicable over a wide range of engineering fields that include processes that manufacture raw materials, sub systems, products for professional and consumer markets. In fact, the method can be applied to any process be it engineering fabrication, computer-aided-design, banking and service sectors etc. Taguchi method [21,22] is useful for tuning a given process for best results. The optimal design have seven steps procedure are as follows.

Step 1 Current Situation Analysis

Now breakdown voltage and specific on-resistance of Trench LDMOSFET gets 159V and 11.3mΩ-cm2 respectively as shown in Figure 4.1 and Figure 4.2, and this

device has lower efficiency is about 14. If customers request high efficiency (high voltage and lower on-resistance) of power device, we need to design again, using Taguchi methods to gain best efficiency and save time and cost.

Figure 4.1 Breakdown voltage of original Trench LDMOSFET

Figure 4.2 On-resistance (Ron) of original Trench LDMOSFET

V

GS

= 5V

Ron,sp= 11.3mΩ

ΩΩ-cmΩ 2

V

GS

= 0V

Breakdown Voltage= 159V

Step 2 To draw Cause and Effect Diagram

A Cause-and-Effect Diagram is a tool that helps identify, sort, and display possible causes of a specific problem or quality characteristic. It graphically illustrates the relationship between a given outcome and all the factors that influence the outcome.

This type of diagram is sometimes called an "Ishikawa diagram" because it was invented by Kaoru Ishikawa, or a "fishbone diagram" as shown in Figure 4.3 because of the way it looks. It is useful for identifying and organizing the known or possible causes of quality, or the lack of it. The structure provided by the diagram helps team members think in a very systematic way. Some of the benefits of constructing a Cause-and-Effect Diagram are that it helps determine the root causes of a problem or quality characteristic using a structured approach, encouraging group participation and utilizes group knowledge of the process, using an orderly, easy-to-read format to diagram Cause-and-Effect relationships, indicating possible causes of variation in a process and design, increasing knowledge of the process by helping everyone to learn more about the factors at work and how they relate, identifying areas where data should be collected for further study. It is a method for categorizing possible causes of a problem, and shows only a few possible causes to illustrate the concept. Therefore, A problem is how to gain best efficiency, main possible causes include both structure and parameter. In the cause of saving cost, parameters of power device have concentration of p-base and depth of trench, and furthermore concentration and thickness of drift layer are modified as shown in Figure 4.4.

Figure 4.3 Format of Cause and Effect Diagram

Figure 4.4 Analysis of Cause and Effect Diagram

Problem

Man

Machinery

Materials Methods

How to gain best efficiency

Man Machinery

Materials

Methods

Draft layer Thickness

Draft layer Concentration Trench Depth

P_Base Concentration

Step 3 To choose Factor, Level, and Orthogonal Arrays

The principle behind the Taguchi approach is that as an engineering task, it is considerably easier to adjust the mean level of some response variable to a target value than it is to reduce the variation of the response variable. Consequently, Taguchi techniques focus priority on the reduction of variation by paying considerable attention to how the variability of the response changes as the factor levels change. In optimal design, factors included in experimentation are divided into two sets. For control factors, these are factors that are easy and inexpensive to control in the design of the product. For noise factors, these are factors which may affect the response of interest but which are difficult to control when the product is being manufactured. A particular combination of levels of the control factors is termed robust if variation in the response is small despite uncontrolled variation in the levels of the noise factors. So, we only list control factor and level is as shown in Table 4.1.

Table 4.1 Data of control factor and level

Level

Control Factor Level 1 Level 2

A: Concentration of Draft layer (Epi layer) unit: 1E15cm-3 3 (A1) 6 (A2) B: Thickness of Draft layer (Epi layer) unit: um 4 (B1) 5 (B2) C: Concentration of P-Base unit: 1E15cm-3 4 (C1) 7 (C2) D: Depth of Trench unit: um 2 (D1) 3 (D2)

Orthogonal Array is a statistical method of defining parameters that convert test areas into factors and levels as shown in Table 4.2, Table 4.3 and Figure 4.5. Test Design using Orthogonal Array creates an efficient and concise test suite with fewer test cases without compromising test coverage [23].

Orthogonal Arrays are represented by:

(

Factors

)

L

Runs

Levels

( 4.1 )

Runs: The number of rows or number of test cases in the array that will be enerated by the Orthogonal Array technique. Each row represents a test case.

Levels: The maximum number of values in an Orthogonal Array that can be taken on by any single factor.

Factors: The number of columns or the number of parameters/variables in an array that need to be tested in the system.

Table 4.2 Orthogonal Arrays for L8(27)

Table 4.3 Interaction for L8

Figure 4.5 Linear Graph for L8(27) Points stand for control factor

Lines stand for interaction of control factor

L8 Interaction Column

Column 1 2 3 4 5 6 7

1 (1) 3 2 5 4 7 6

2 (2) 1 6 7 4 5

3 (3) 7 6 5 4

4 (4) 1 2 3

5 (5) 3 2

6 (6) 1

7 (7)

2

3 4

5

1 6

7

Step 4 Filling in OA with suitable parameter to simulate these experiment

Control factors have concentration of drift layer (3E15, 6E15cm-3), thickness of drift layer (4, 5um), concentration of P-base (4E15, 7E15 cm-3), and depth of trench (2, 3um). 2 level design is selected to fill in Orthogonal arrays with condition of control factors. Finally, we want to finish these simulation experiments, and fill out the form ( L8(27) ) with breakdown voltage and on-resistance, computing efficiency of 8 times of simulation experiment as shown in Table 4.4

Table 4.4 Data of simulation experiments

L8(27) Orthogonal Arrays

Column Result of Experiment

Experiment

Step 5 Analysis of variance

Analysis of variance (ANOVA) [24,25] is a general technique for separating the total variation in a set of measurements into the variation due to measurement noise and the variation due to real differences among the alternatives being compared. It provides us with a technique for comparing these two components of the variation in all of the measurements to determine if the variation between systems is statistically larger than the variation due to the measurement noise within a system. If the variation due to actual differences among the alternatives is enough larger than the variation due to measurement noise, then we can say that there is a statistically significant difference in the performance of the systems tested. The key is determining how much is "enough larger" to be statistically significant. In other words, when F ratio is getting large, P value become small as shown in Table 4.5.

Table 4.5 Analysis of Variance table

Analysis of Variance for Means (Efficiency)

Source DF Seq SS Adj SS Adj MS F P

Explaining glossary

DF: Degrees of Freedom Seq SS: Sequential Sum of Square

Adj SS: Adjust Sum of Square

Adj MS: Adjust Mean Square

F : F ratio

P: P value ( Confidence index=1-P )

Table 4.5 Analysis of Variance table

Analysis of Variance for Means (Efficiency)

Source DF F P Noticeable

Factor( • )

Rank Remark

A: Epi Con. 1 0.02 0.89 • 4

B: Epi Thickness 1 0.13 0.753 • 3

C: P-Base Con. 1 2.51 0.254 1

D: Trench Depth 1 0.24 0.674 • 2

Interaction(A*C)

(Epi Con.*P-Base Con.)

1 0.47 0.564

Residual Error 2

Total 7

Step 6 Optimal Condition

The optimal condition is determined by selecting the best levels of most influential design parameters which have a significant impact on the output performance or quality characteristic which is critical in the eyes of the customer. Here, the optimal condition for A1, B2, C2, and D2 are obtained as shown in Figure 4.6 and Figure 4.7 [26,27].

Figure

Figure 4.6 Response graph of control factor

Mean of Efficiency

Figure 4.7 Response graph of interaction ( Epi Con.*P-Base Con. )

Based on these results, we should set the factors at:

Design parameter A : Concentration of Epi – level 1 ( A1 )

Step 7 Prediction and Confirmation Experiment

From the predicted mean value, the data (i.e. response or quality characteristic) was generated. The predicted mean value at the optimal condition was 25.825. And then to do an simulation experiment that tests the hypothesis. The experiment must be unbiased in nature, meaning that the scientist cannot create an experiment that will favor the outcome that they have predicted in their hypothesis. The result of confirmation experiment is 25 as shown in Figure 4.8 and Figure 4.9, and predicted value is 25.825 [27], to calculate this error value is 3.3% as shown in Table 4.6.

Therefore, this optimal condition is confirmed that is effective.

Figure 4.8 Breakdown voltage of optimal Trench LDMOSFET

V

GS

= 0V

Breakdown Voltage= 317V

Figure 4.9 On-resistance (Ron) of optimal Trench LDMOSFET

Table 4.6 The contrast of original and optimal Trench LDMOSFET Confirmation

Experiment

Epi Con.

(1E15cm-3) Epi Thickness (um)

Base Con.

(1E15cm-3)

Trench Depth (um)

Efficiency Prediction (Simulation)

Original 3 5 6 2.5 14

( 159/11.3 )

Optimal 3 5 7 3 25

( 317/12.7 )

25.825

V

GS

= 5V

Ron,sp= 12.7mΩ

ΩΩ-cmΩ 2

CHAPTER 5

Conclusions and Suggestions of Future Work

5.1 Conclusions

In this study, we focus on how to improve structure of LDMOSFET that become a higher breakdown voltage and lower on-resistance of power device. Advantage of Trench LDMOSFET is confirmed that improve disadvantage of LDMOSFET. In other words, characteristics of Trench LDMOSFET play a more important role in the switching process. It works turn-off process, the breakdown voltage becomes large, and it works turn-on process, the on-resistance becomes small.

In addition, in order to design optimal Trench LDMOSFET to use Taguchi methods. It is a process and product optimization method that is based on 7-steps of planning, conducting and evaluating results of matrix experiments to determine the best levels of control factors. The primary goal is to keep the variance in the output very low even in the presence of noise inputs. Thus, the processes and products are made robust against all variations. Finally, a successful design is demonstrated. Compared with the mainstream commercial MOSFET, the design not only has small device area (low cost), but also has higher efficiency at its designed operation condition. Therefore, Trench LDMOSFET method provides higher breakdown voltage and lower on-resistance on application of LCD display or other electric products.

5.2 Suggestions of Future Work

(1). In the thesis, we don’t make Trench LDMOSFET to confirm result of simulation experiments, and look forward to finish this power device. To compare difference between real device and simulation device.

(2). Trench LDMOSFET in simulation experiments, thermal effect and leakage current are not simulated, this is a fly in the ointment. If thermal effect and leakage current of device model are built, this device can be accurately predicted.

(3). Threshold voltage (Vth) can also be controlled not only by the gate oxide thickness but also by the back ground doping (The density of P-body for the n-channel Trench MOSFET). And it increase in proportional to a square root of the background doping. The drain current increases in proportion to (VGS–VGS(th))2 in the saturation region. We change gate oxide thickness and concentration of P-body, and adjust Vth to match well.

References

[1] B. J. Baliga, Power Semiconductor Devices, Copyright 1996 by PWS.

[2] ISE TCAD, Two-Dimensional Device Simulation Program, Version 10.0.

[3] S. Hidalgo, J. Fernandez, P.Godignon, J. Rebollo, and J. Millan, “Power Lateral DMOS Transistor Test Structures”, ICMTS vol. 6, pp. 33-38, Mar. 1993.

[4] Bart Van Zeghbroeck, Principles of Semiconductor Devices, Copyright 2004 by University of Colorado.

[5] A. Appels and H. M. J. Vaes, ''HV Thin Layer Devices (RESURF Devices)'', in Proc. Intl. Electron Devices Meeting, pp. 238-241, 1979.

[6] A. W. Ludikhuize, ''A Review of RESURF Technology'', Proc. Intl. Symp. Power Semiconductor Devices & Integrated Circuits, pp. 11-18, 2000.

[7] T. Efland, S. Malhi, W. Bailey, O. K. Kwon, and W. T. Ng, ''An Optimized RESURF LDMOS Power Device Module Compatible with Advanced Logic Processes'', Proc. Intl. Electron Devices Meeting, pp. 237-240, 1992.

[8] A. Parpia and C. A. T. Salama, ''Optimization of RESURF LDMOS Transistors an Analytical Approach'', vol. ED-37, no. 3, pp. 789-796, 1990.

[9] T. Efland, S. Malhi, W. Bailey, O. K. Kwon, and W. T. Ng, ''An Optimized RESURF LDMOS Power Device Module Compatible with Advanced Logic Processes'', Proc. Intl. Electron Devices Meeting, pp. 237-240, 1992.

[10] Der-Gao Lin; Tu, S.L.; Yee-Chaung See; Pak Tam, ”A novel LDMOS structure with a step gate oxide”, IEDM, pp.963-966, 1995.

[11] ISE TCAD, Two-Dimensional Dessis Simulation Program, Version 10.0.

[12] Sang-Koo Chung, “An Analytical Model for Breakdown Voltage of Surface Implanted SOI RESURF LDMOS”, IEEE Transactions on electron devices, Vol.

47, No. 5, May 2000

[13] K. G. Pani Dharmawardana and Gehan A. J. Amaratunga, “Modeling of High Current Density Trench Gate MOSFET”, IEEE Transactions on electron devices, Vol. 47, No. 12, 2000.

[14] Yuanzheng Zhu; Liang, Y.C.; Shuming Xu; Pang-Dow Foo; Sin, J.K.O “Folded gate LDMOS transistor with low on-resistance and high transconductance”, Electron Devices, IEEE Transactions on, Volume 48, pp.2917-2928, 2001.

[15] Jongdae Kim, Tae Moon Roh, Sang-Gi Kim, Il-Yong Park, Yil Suk Yang, Dae-Woo Lee, Jin-Gun Koo, Kyoung-Ik Cho, and Young Il Kang, “A Novel Process for Fabricating High Density Trench MOSFETs for DC-DC Converters”, ETRI Journal, Volume 24, Number 5, October 2002.

[16] Yoshiro Baba, Satoshi Yanagiya, Yutaka Koshino, and Yuso Udo, “High Voltage Trench Drain LDMOS-FET Using SO1 Wafer”, IEEE Cat. no.94CH3377-9, pp.183-186,1994.

[17] Youngmin Kim, “MOSFET Performance Degradation Induced by a Trench Isolation Oxide Step”, Journal of the Korean Physical Society, Vol. 42, No. 6, pp.

821_824, June 2003.

[18] Jongdae Kim, Sang-Gi Kim, Tae Moon Roh, Hoon Soo Park, Jin-Gun Koo, and Dae Yong Kim, “Characteristics of P-channel SOI LDMOS Transistor with Tapered Field Oxides”, ETRI Journal, Volume 21, Number 3, September 1999.

[19] Won-So Son, Sang-Gi Kim, Young-Ho Sohn, and Sie-Young Choi, “A New SOI LDMOSFET Structure with a Trench in the Drift Region for a PDP Scan Driver IC”, ETRI Journal, Volume 26, Number 1, February 2004.

[20] G.R.Wang, “The Design of 200V Trench LDMOSFET”, Thesis of NTHU,ENE.

Master, 2005.

[21] Wei-Chung Weng, Fan Yang, Veysel Demir, and Atef Elsherbeni, “Optimization using Taguchi Method For Electromagnetic Applications”, ESA SP-626, October 2006.

[22] S. F. Peik and Y. L. Chow, “Genetic Algorithms Applied to Microwave Circuit Optimization”, 1997 Asia-Pacific Microwave Conference, vol. 2, pp. 857-860, Dec. 1997.

[23] Sloane, Neil J. A. A Library of Orthogonal Arrays. Information Sciences Research Center, AT&T Shannon Labs. 9 Aug. 2001.

[24] Jiju Antony, V. Somasundarum and Craig Fergusson, “Applications of Taguchi approach to statistical design of experiments in Czech Republican industries”, IJPPM Vol. 53 No. 5, pp.447-457, 2004.

[25] Kumar, “Quality improvements through design of experiments: a case study”, Quality Engineering, Vol. 12 No. 3, pp. 407-16, 2000.

[26] Roy, R., Design of Experiments Using the Taguchi Approach, Wiley, New York, NY, 2001.

[27] MINITAB, Design of Experiment (Taguchi Methods), Version 14. (Free 30 day Trial)

個人 個人 個人

個人簡歷 簡歷 簡歷 簡歷

姓名:林宏春 性別:男

生日:民國 62 年 2 月 18 日 籍貫:台灣省台中縣

學歷:國立雲林科技大學 電子工程技術系 (81.9-85.6)

國立交通大學 電機學院 IC 設計產業研發碩士班 (95.2-97.1)

碩士論文題目:

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溝渠式橫向金氧半場效電晶體分析與最佳化設計之研究 設計之研究 設計之研究 設計之研究

Study on the analysis and optimization design of

Trench LDMOSFET

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