Chapter 4 The Characteristics and Analysis of N-MOSFET
4.2 J-V characteristics
Fig. 4-4 shows the transistor ID –VD characteristics as a function of V –g Vt for the 1000
℃ RTA-annealed HfSix/HfSiON n-MOSFETs. Fig. 4-5 displays ID –V characteristics of the g
HfSix/HfSiON n-MOSFETs. A low Vt of only 0.14 V was measured from the linear ID –V g
plot, which agrees with the low Φm,eff of 4.27 eV from the C–V measurements. Fig. 4-6 shows the electron mobility extracted from the measured ID –V curves of the n-MOSFETs. g
A peak electron mobility of 216cm2/V·s was obtained for the HfSix/HfSiON n-MOSFETs.
-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 0
5 10 15 20
25
HfSiX(20/50nm)@1000oCRTA HfSiX (20/10nm)@1000oCRTA HfSiX(20/5nm)@1000oCRTA
Capacitance (fF/
µm
2)
Voltage (V)
Fig. 4-1 C–V characteristics for high-temperature RTA formed HfSix/HfSiON with various amorphous Si.
-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 0
5 10 15 20
25 Al gate HfSi
X
(20/5nm)@1000
oCRTA
Capacitance (fF/ µ m
2)
Voltage (V)
Fig. 4-2 C–V characteristics for high-temperature RTA formed HfSix (20/5nm) HfSiON and low-temperature Al/HfSiON capacitors.
-2.0 -1.5 -1.0 -0.5 0.0 10
-1010
-810
-610
-410
-2Al gate @low Temperature HfSiX(20/50nm)@1000oCRTA HfSi
X (20/10nm)@1000oCRTA HfSiX(20/5nm)@1000oCRTA
Voltage (V) G a te Cu rrent Density (A/cm
2)
Fig. 4-3 J - g V characteristics for high-temperature RTA formed HfSig x/HfSiON and low-temperature Al/HfSiON capacitors.
0.0 0.5 1.0 1.5 2.0 2.5
Fig. 4-4 ID –VD characteristics of HfSix/HfSiON n-MOSFET. The amorphous Si on HfSiON was 5 nm and gate length was 10 µm.
-1.0 -0.5 0.0 0.5 1.0 1.5 2.0 10
-1010
-810
-610
-410
-2HfSi
X(20/5nm)@1000
oCRTA HfSi
X/HfSiON n-MOSFET I
d(A)
V
g(V)
V
ds= 0.1 V
Fig. 4-5 Id–Vg characteristics of HfSix/HfSiON n-MOSFET.
0.0 0.2 0.4 0.6 0.8 1.0 0
200 400 600 800
HfSi
X
(20/5nm)@1000
oCRTA Universal
HfSi
x
/HfSiON n-MOSFET
Effective field (MV/cm) µ eff ( cm 2 /V -se c )
Fig. 4-6 Electron mobility of HfSix/HfSiON n-MOSFETs.
Chapter5 Conclusion
In the experiment, we have obtained good device performance of IrxSi/HfSiON p-MOSFETs with a high Φm,eff of 4.95 eV, a small Vt of −0.15 V, a peak hole mobility of 84 cm2/V・s, and 1000℃RTA thermal stability. For NMOSFET, a low Φm,eff of 4.27eV, threshold voltage of 0.14V, and a mobility of 216cm2/V·s are obtained. They are obviously that the processes can be integrated in current technology. On the other hand, we will study hard to decrease EOT by replacing the high-κgate dielectrics in the future. The threshold voltages of devices are needed to decrease, and avoid the Fermi-Level pinning. However, the research of this work proved that this is an effective way to meet the ITRS roadmap after 2008.
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[4-3] D. S. Yu, K. C. Chiang, C. F. Cheng, A. Chin, C. Zhu, M. F. Li, and D. L. Kwong,
“Fully silicided NiSi : Hf/LaAlO3/ Smart-Cut-Ge-On-Insulator n-MOSFETs with high
electron mobility”, IEEE Electron Device Lett., vol. 25, no. 8, pp. 559–561, Aug. 2004.
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[4-5] A. Veloso, K. G. Anil, L. Witters, S. Brus, S. Kubicek, J.-F. de Marneffe, B. Sijmus, K.
Devriendt, A. Lauwers, T. Kauerauf, M. Jurczak, and S. Biesemans, “Work function engineering by FUSI and its impact on the performance and reliability of oxynitride and Hf-silicate based MOSFETs”, in IEDM Tech. Dig., pp. 855–858, 2004.
[4-6] S. J. Rhee, C. S. Kang, C. H. Choi, C. Y. Kang, S. Krishnan, M. Zhang, M. S. Akbar, and J. C. Lee, “Improved electrical and material characteristics of hafnium titanate multi-metal oxide n-MOSFETs with ultra-thin EOT (∼ 8 Å) gate dielectric application,” in IEDM Tech. Dig., pp. 837–840, 2004.
Vita
姓名：黃俊哲 性別：男
出生年月日：民國 73 年 8 月 15 日 籍貫：台灣省台南縣
住址：台南縣佳里鎮安西里安西 56-32 號 學歷：國立清華大學工程與系統科學系
(民國 91 年 9 月~民國 95 年 6 月) 國立交通大學電子研究所固態電子組 (民國 95 年 9 月~民國 97 年 6 月)
論文題目：
金屬矽化物-高介電常數介電質-半導體場效應電晶體之電性研究
The Research of Electrical Characteristics of FUSI Gate-High-