Measured Results of the Flip-Chip Packaging Structure with underfill Injection….50

Chapter 4 Investigation of the Flip-chip Package with BCB Underfill for W-band

4.3 Measured Results of the Flip-Chip Packaging Structure with underfill Injection….50

The losses in the flip-chip interconnects with underfill include mismatch loss and real loss. Mismatch loss is mainly due to the dielectric constant change from the underfill. To reduce the impact from the underfill, the dimensions of the chip transmission line were modified, and compensation designs on the substrate transmission line were adopted. Figure 4.4 shows comparison of the flip-chip interconnects with and without underfill. The flip-chip with BCB has lower loss than the flip-chip with epoxy at high frequencies. The S₁₁ and S₂₁ of the flip-chip structure with BCB were better than 18 dB and 0.6 dB, respectively, from DC to 100 GHz. As for the case of flip-chip sample without underfill, an S21 of 0.66 dB was observed.

The corresponding contribution to the overall S₂₁ at 90 GHz were further extracted to be 0.14 dB from the CPW trace on GaAs substrate, 0.26 dB from CPW on Al2O3, and 0.26 dB from the transition. It was then concluded that the optimized design can effectively reduce the mismatch loss.

The real loss includes metal loss (LM), dielectric loss, and radiation loss. The

radiation loss can be neglected because it is very small. The dielectric loss is composed of chip loss (L_C), substrate loss (L_S) and underfill loss (L_UF). After the underfill injection, the extra dielectric loss induces and degrades the transmission properties. Hence, to investigate the influence of underfill injection, the loss factor is calculated using (1) [60]:

2 2

Loss Factor = 1S11 S21 (1)

The underfill loss can be calculated by subtracting the loss of the flip-chip without underfill from the loss of flip-chip with underfill. The losses of chip, substrate, and metal in the flip-chip structure are also extracted by electromagnetic simulation for comparison. Figure 4.5 shows the comparison of the loss factors between the metal, chip, substrate, epoxy, and BCB. As can be seen, the major losses are metal loss and underfill loss. The epoxy loss is near the metal loss. The BCB loss is lower than epoxy loss. The flip-chip package with BCB shows a lower insertion loss of 0.11 dB/mm compared to the epoxy loss of 0.24 dB/mm at 100 GHz. These results demonstrate that underfill materials with lower dielectric loss tangents, such as BCB, can effectively reduce the RF loss of the flip-chip assembly caused by the underfill.

Given that fact that the metal loss contributed the most to the total loss as shown in Fig. 4.5, it is worth mentioning that for Si Complementary Metal–oxide–

semiconductor (CMOS) process where much narrower traces are encountered, the improvement in overall loss due to BCB might not be as pronounced since the metal loss are much higher for such cases.

4.4 Reliability Test Results of the Flip-chip Packaging Structure with Underfill Injection

The flip-chip interconnect structure with BCB underfill has demonstrated excellent RF performance as described in previous section. However, reliability is also of great concern to the industry. Thermal property analysis was performed by thermal cycling with temperature changes from -55 ^OC to 125 ^OC with a dwell time of 15 minutes (the specifications of the JEDEC standard) [61]. During the thermal cycling test, the DC resistance of the transmission line was measured after every 200 cycles as shown in Fig. 4.6. The flip-chip structure with BCB passes a 1000 cycle thermal cycling test. The contact resistance showed little change and no samples failed after 1000 cycles. Table. 4.2 shows the shear force test results before and after 1000 cycle thermal cycling tests. The results revealed that the flip-chip interconnects without underfill fractured at a shear force of 173 g, which is not acceptable for commercial applications. After BCB injection, the shear force for failure was effectively increased to 1305 g. The shear force of the flip-chip structure degraded after thermal cycling due to the thermal stresses induced by CTE mismatch. The flip-chip structure without underfill has a lower shear force resistance and the mechanical reliability was seriously degraded. However, the shear force resistance was enhanced because the stress was redistributed by the underfill. BCB injection into flip-chip structures improves the reliability and excellent RF performance is retained after the packaging process.

4.5 Summary

BCB was successfully injected into the flip-chip structures using the no-flow underfill process. The package with BCB underfill showed better RF performance with an insertion loss of better than 0.6 dB and a return loss of 18 dB up to 100 GHz, in addition to lower dielectric loss. Furthermore, thermal cycling and shear force testing showed that BCB injection could effectively improve the reliability of the flip-chip interconnect structure. Excellent RF performance with improved reliability demonstrates that BCB is a good underfill material for MMW package applications.

Table 4.1 Material properties of underfills, chip and substrate

Dielectric Materials

Dielectric Constant

Dielectric Loss CTE (ppm/℃) Moisture Uptake (wt％)

(a)

(b)

Fig. 4.1 (a) A schematic and (b) an SEM image of the cross section of the flip-chip structure with BCB underfill injection.

Fig. 4.2 The design parameters for the flip-chip structure with BCB injection.

Fig. 4.3 The no-flow underfill process flow for flip-chip structure

Fig. 4.4 Measured S-parameters of the flip-chip interconnects without UF and with BCB or epoxy underfill injection.

Fig. 4.5 LM(Gold), LC(GaAs) and LS(Al2O3) of the flip-chip interconnect structure as extracted from EM simulation; the LBCB and LEpoxy as extracted from the measurement for comparison.

Fig. 4.5 Thermal cycling test results of the flip-chip interconnect with and without BCB underfill injection.

Table 4.2 Shear force test results

Before TCT After TCT (1000 cycle)

Without underfill 173 g 19 g

With BCB 1305 g 1244 g

Chapter 5 Flip-Chip Packaging of Low-Noise Metamorphic High Electron Mobility Transistors on Low-cost Organic Substrate

The rapid growth of high-frequency wireless communication demands high-performance packaging structures at low cost. A flip-chip interconnect is one of the most promising technologies owing to its low parasitic effect and high performance at high frequencies. In this chapter, the in-house fabricated In0.6Ga0.4As Metamorphic High Electron Mobility Transistor (mHEMT) device was flip-chip-assembled using a commercially available low-cost organic substrate. The packaged device with the optimal flip-chip structure exhibited almost similar DC and RF results to the bare die. An exopy-based underfill was applied to the improvement of reliability with almost no degradation of the electrical characteristics. Measurement results revealed that the proposed packaging structure maintained NFmin of 3 dB with 6 dB of associated gain at 62 GHz. Such a superior performance after flip-chip packaging demonstrates the feasibility of the proposed low-cost organic substrate for commercial high-frequency applications up to the W-band.

Besides, the impact of bonding temperature on the device performance was also experimentally investigated. While the DC performance was not as sensitive, serious degradation in RF performance was observed at high bonding temperature. Such degradation was mainly due to the thermal-mechanical stress resulting from the mismatch of CTE between the GaAs chip and the polymer substrate. Quantitative

assessment was also performed through equivalent circuit extraction from S-parameter measurements.

5.1 Background and Motivations

The demand for communication systems at frequencies up to the W-band has been growing rapidly in recent years because such systems may provide high data transmission rates [62,63]. The high-frequency performance of these systems mainly depends on the device characteristics and packaging structure. In terms of the device technology, In-rich In_xGa_1-xAs/In_xAl_1-xAs-based mHEMTs are gaining increasing popularity owing to the high electron mobility and saturation velocity of the InGaAs materials, which in turn delivers a lower NF with higher gain at high frequencies [41-44].

The packaging structure is also a key issue for practical implementation concerns.

Generally, such a structure should provide a reliable transmission path from chip to substrate and protect the device from external hazards, such as environmental effects, mechanical stress, and humidity [64]. Conventionally, the chip is assembled on ceramic-based substrates, such as Al₂O₃ [23], and then the ceramic-based modules are integrated into the systems made of PCB.

Despite of the major advantages provided by the flip-chip packaging, such as good thermal management, good mechanical stability, and high reliability [30,32,65], mounting ceramic-based substrates onto PCBs unavoidably introduces additional transitions in signal paths, which will induce extra parasitic effects to degrade the system performance. In addition, the approach also causes additional cost owing to

the transition from ceramic substrates to PCBs.

This work is performed to develop a low-cost yet robust FCOB technology for high-frequency applications up to the W-band. A commercially available PCB (RO3210 organic substrate from Rogers) was adopted for the study of the proposed technology. To further improve the reliability of the overall structure, an epoxy-based underfill, which can alleviate the stress on the bump transitions between the chips and the PCB [38,57,66], was applied. Possible performance degradations at high frequencies due to the inclusion of the underfill (though with low dielectric constant) were taken care of by the optimal design of the geometries on the RO3210 organic substrate through full-wave electromagnetic simulation. The optimal design of the layout patterns on the RO3210 organic substrate was verified by the measurement of flip-chip-bonded 50 Ω transmission lines.

5.2 Fabrication and Flip-chip Package Process

Both the GaAs substrate with 50  CPW transmission lines and the In_0.6Ga_0.4As mHEMT device with 150 nm gate length were flip-chip-assembled on the RO3210 organic substrate for performance characterization. The interconnect structure is shown in Fig. 5.1. The In0.6Ga0.4As mHEMT device with 150 nm gate length used in this study was fabricated using in-house process.

Figure 5.2 shows the in-house fabrication process of the FCOB structure on the RO 3210 polymer substrate. The commercial RO3210^TM PCB of 0.635 mm thickness from Rogers Corporation was used as the substrate material. Compared with the

conventional Al2O3 substrate commonly used for the flip-chip process, the RO3210 substrate exhibits great competitiveness in terms of the very low cost. For both electrical and mechanical performance improvements, chemical mechanical polishing (CMP) was first applied to reduce the surface roughness of the polymer substrate.

Figure 5.3 (a) shows the SEM image of the RO3210 organic substrate, which has a surface roughness of 3 m by using a P-10 Surface Profiler. In the beginning of the RO 3210 substrate process, the seed layers of Ti and Au metals were deposited by an E-gun evaporator with thicknesses of 500 and 1000 Å , respectively. The Ti layer was used as the adhesion layer between the Au circuit and the RO3210 organic substrate.

The CPW transmission line with a characteristic impedance of 50 Ω was patterned on the photoresist and gold-electroplated to a thickness of 3 m. To obtain good RF performance of the FCOB structure, the CPW transmission line with compensation design has been considered. Then, the thick photoresist from TOK Company was patterned for the Au bump electroplating. The height and diameter of the Au bumps are 20 m and 50 m, respectively.

After the chip and RO3210 organic substrate were fabricated, the flip-chip bonding process was performed by using M9 flip-chip bonder system. The chip was flip-chip-assembled on the RO3210 organic substrate by Au-to-Au thermal compression process with optimization bonding conditions, such as bonding temperature, bonding time, and bonding force.

5.3 Design and Optimization of the flip-chip packaging structure on RO 3210 polymer substrate

Prior to the assembly of active devices through the flip-chip bonding process, the high-frequency characteristics of the RO3210 organic substrate were investigated by the measurement of a 50  CPW transmission line. A 50  CPW transmission line designed on the RO3210 organic substrate with a line width of 50 m and a spacing of 27 m between the signal trace and the ground, and a length of 854 m was fabricated and measured. Figure 5.4 shows the measured results up to 110 GHz using an on-wafer probing system after load-reflection-reflection-match (LRRM) calibration. The simulated results using electromagnetic simulators [68] are also included. The measured S21 and simulated S21 match well with a difference of less than 0.7 dB up to 110 GHz. The measured return loss of the CPW thru line was below 20 dB up to 90 GHz. Generally, the organic substrate exhibited low S11 and S21 for flip-chip-assembled on the RO3210 organic substrate with and without the undefill, and the pattern is also included for reference. Cylindrical bumps of 40m diameter and 20 m height were used throughout the structure. As can be observed in Fig. 5.5

(a), both frequency shift and impedance degradation occur at frequencies above 60 GHz for the structure with the underfill compared with the structure without the underfill. The corresponding S₁₁ plotted in the Smith chart is shown in Fig. 5.5 (b). It is clearly seen in Fig. 5.5 (b) that the impedance is mainly capacitive at high frequencies. To compensate for this capacitive characteristic of the impedance, a 50-m-long high-impedance transmission line section was introduced into the RO3210 organic substrate, as shown by Fig. 5.6 (a). Figure 5.6 (b) shows the effect of the width of this high-impedance line simulated using an HFSS simulation tool [67].

Apparently, a length of 25 m gave the optimal performance over the frequency range of interest. Such an observation was then verified by experiment. Figure 5.7 shows the measured response of the 50  CPW transmission line on GaAs flip-chip-assembled on the RO3210 organic substrate with the high-impedance line including the optimized compensation structure. As expected, good impedance match is observed up to 110 GHz with an insertion loss of less than 0.6 dB, indicating that excellent transmission properties were obtained from the optimal design.

5.4 Assessment of Thermal Impact on Performance of MHEMT Devices on RO 3210 Polymer Substrates

During the bonding process, both the device and substrate were heated before adhesion to establish a solid contact with the interconnection, and then cooled to room temperature. Thus, the existence of the mechanical stress due to the mismatch in CTE between the materials is unavoidable. To investigate the thermal impact on the device during the bonding process, two different flip-chip bonding conditions were applied

as summarized in Table 5.2. For the case of high bonding temperature, the optimized bonding force and bonding time were 80 g and 200 s, respectively. A higher bonding force of 100 g and a longer bonding time of 240 s were applied to maintain good degradation. The RF performance was characterized from 2 to 110 GHz by using an HP 8510XF network analyzer with E7352 test heads calibrated by using a standard LRRM method. Figure 5.9 plots the maximum stable gain /maximum available gain (MSG/MAG) as a function of frequency for the cases of bare die, flip-chip-packaged device with high bonding temperature, and flip-chip-packaged device with low bonding temperature. Note that the input and output terminations were set to 50  during the measurement. As is observed, a 5 dB drop in the low-frequency regime occurs for the case with high bonding temperature. In contrast, a very slight degradation of only 0.5 dB at 50 GHz is observed for the case of low bonding temperature. We believe that such degradation should be related to the CTE mismatch between RO 3210 (13 ppm/K) and GaAs (5.4 ppm/K). An intuitive interpretation is shown in Fig. 5.10. Apparently, the RO3210 substrate undergoes higher expansion during the heating process, leading to higher stress level once cooled to room temperature.

To further assess the mechanism causing the RF degradation, we patterned 50  transmission lines on GaAs and flip-chip bonded onto the RO3210 substrate using exactly the same conditions listed in Table 5.2. Procedures outlined by Ghouz and El-Sharawy were adopted to extract the equivalent circuit of the bump interconnection through S-parameter measurement [71]. Figure 5.11 shows the corresponding equivalent circuit model of the bump interconnect. In the equivalent circuit model, C1 and C3 represent the discontinuity capacitances at the RO3210 substrate and the GaAs chip, respectively. R1, L1, and C2 represent the parasitics along the signal path.

To determine the S-parameters of the bump interconnect, we first patterned 50  CPW transmission lines on GaAs substrate and measured the S-parameters. Then, the transmission line was flip-chip bonded onto RO3210 polymer substrate using the conditions outlined in Table 5.2. Finally, the S-parameters of the complete structure were measured. The S-parameters of the overall structure in Fig. 5.11 can be obtained by cascading the individual S-matrices as

¹¹ ¹² ²² ¹² equation can be solved by the following set of equations.

11^T ( 11 22^b ^b 12 12^b ^b) 11^C ( 12^b 22^b 11 12^b ^b) 12^C

overall structure. Conversion of the S-parameters of the bump interconnect to the Y-parameters was then performed to extract the component values as outlined. Figure 5.12 shows the modeled and measured S-parameters at high bonding temperature.

Good agreement over the entire frequency range was achieved. Table 5.3 lists the extracted component values corresponding to the two bonding conditions. As observed, the case with higher bonding temperature yields to higher parasitic levels which is related to the larger mechanical stress induced during the bonding process.

Such increase in the parasitic levels should be the main reason to result in the degradation in RF performance.

5.5 Performance Characterization of the Packaged Device

To demonstrate the capability of the proposed technology for device application, an In0.6Ga0.4As mHEMT device with 150 nm gate length was flip-chip-assembled on the RO3210 organic substrate for performance evaluation. Note that the high-impedance transmission lines used to compensate for the capacitive impedance were included in the patterns on the RO3210 organic substrate to connect the gate and drain of the device. Figure 5.13 shows the measured DC characteristics where the gm

and I_DS are plotted as functions of V_DS at various V_G levels. Similar performance characteristics were obtained for the flip-chip-packaged device. The RF performance was characterized using an on-wafer probing system with a vector network analyzer up to 110 GHz. Figure 5.14 shows the measured S₂₁ against frequency up to 110 GHz for the bare die, flip-chip-packaged device without the underfill, and flip-chip-packaged device with the underfill. All the devices were biased at peak gm

occurrence with the input and output terminated by a 50  load. A degradation less than 2 dB was observed for the flip-chip-packaged device with the underfill compared with the bare die over the entire frequency range of interest. The effect of the compensation through high-impedance lines was evidenced by the minor degradation observed for frequencies above 60 GHz. In this aspect, the proposed FCOB approach showed a certain competitive edge over the conventional approach. In ref. 68, a Ka-band LNA MMIC chip was firstly packaged into a ceramic-based QFN package and then integrated into an RO4003C PCB. A gain degradation of 4.5 dB at 40 GHz compared with the bare die case was presented. Finally, the NFmin was measured and is plotted in Fig. 5.15. As is shown, the flip-chip-packaged device with the underfill exhibited an NF_min of 3 dB with an associated gain of 6 dB at 62 GHz, indicating promising results of the proposed low-cost FCOB technology for applications in the W-band.

5.6 Summary

In this chapter, we successfully demonstrated the FCOB technology for applications in the W-band at very low cost. The main breakthrough for the proposed technology lies in the fact that commercially available organic substrates were used as the carriers instead of conventional ceramic-based substrates. Design optimization was performed on the layout patterns of the RO3210 organic substrate through electromagnetic simulations, which also took into account the change in impedance due to the existence of the epoxy-based underfill for reliability improvement.

High-impedance lines were introduced into the structure on the RO3210 organic

substrate to compensate for the capacitive impedance and thus achieved good transmission properties when the 50  transmission line was flip-chip-assembled. The In_0.6Ga_0.4As mHEMT device was packaged and characterized with the optimized

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