Chapter 2 Basic Concepts in RF Circuit
2.6 Nonlinear Performance Parameters in Terms of Volterra
When a system that is described by a Volterra series up to order three, it is excited by the sum of two sinusoidal excitations A1cosω and 1t A2cosω . Then 2t the output is given by the sum of the responses listed in Table 2.1. From Table 2.1, the expression for the second and third harmonic distortion in terms of general Volterra are given by
Furthermore, among the intermodulation products, the third-order intermodulation products at 2ω1−ω2 and 2ω2 −ω1 is important. Since if the difference between ω and 1 ω is small, the distortions at 2 2ω1−ω2 and 2ω2 −ω1 would appear in the vicinity of ω and 1 ω . Table 2.1 shows the third-order 2 intermodulation distortion in terms of Volterra kernel transforms
)
18
Table. 2.1 Different responses at the output of a nonlinear system described by Volterra kernels.
Order Frequency of response Amplitude of response Type of response
2nd harmonics
2
19 This effect causes some distortion at our desired frequency and damages the desired signals. Therefore third intercept point (IP3) is used to characterize this behavior. This parameter is measured by supplying a two-tone signal to the system.
This input signal must be chosen to be sufficiently small in order to remove higher-order nonlinear terms. In a typical test, A1=A2=A, hence the magnitude of third-order intermodulation products grows at three times the rate at which the fundamental signal on a logarithmic scale when input signal increases. The third-order intercept point is defined to be the point at which third-order intermodulation product equals to the fundamental signal, and the corresponding input signal is called input IP3 (IIP3) and the corresponding output signal is called output IP3 (OIP3). The AIP3, therefore, can be obtained by setting IM3 =1 and expressing as
Besides, a quick method of measuring IIP3 is as follows. As shown in Fig. 2.6, If the power of the two-tone signal, Pin, is small enough to ignore higher order nonlinear terms, then IIP3 can be expressed as
dBm
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(a) (b)
Output power (dBm)
Input power (dBm) OIP3
Pin IIP3
IMD3
Fundamental Signal
ω2
ω1 2ω2-ω1
2ω1-ω2
ΔP/2
ΔP ΔP
3ΔP/2
Fig. 2.6 (a) Growth of output components in an intermodulation test (b) Intermodulation distortion
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Chapter 3
General Consideration in RF Circuit Design
3.1 Low Noise Amplifier Basic
Low noise amplifier is the first gain stage in the receive path so its noise figure directly adds to that of the system. There, therefore, are several common goals in the design of LNA. These include minimizing noise figure of the amplifier, providing enough gain with sufficient linearity and providing a stable 50 Ω input impedance to terminate an unknown length of transmission line which delivers signal from antenna to the amplifier. Among LNA architectures, inductive source degeneration is the most popular method since it can achieve noise and power matching simultaneously, as shown in Fig. 3.1. The following analysis is based on this architecture.
3.1.1 Low Noise Amplifier Architecture Analysis
In Fig. 3.1, the input impedance can be expressed asgs Fig. 3.1 Common source input stage with inductive source degeneration
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as shown in (3.1), the input impedance is equal to the multiplication of cutoff frequency of the device and source inductance at resonant frequency. Therefore it can be set to 50 Ω for input matching while resonant frequency is designed to be equal to the operating frequency.
According to prior introduction, the equivalent noise model of common-source LNA with inductive source degeneration can be expressed as Fig. 3.2, where R is l
the parasitic resistance of the inductor, R is the gate resistance of the device. Note g that the overlap capacitance Cgd has also been neglected in the interest of simplicity.
Then the noise figure can be obtained by computing the total output noise power and output noise power due to input source. To find the output noise, we first evaluate the trans-conductance of the input stage. With the output current proportional to the voltage no Cgs and noting that the input circuit takes the form of series-resonant network, the transconductance at the resonant frequency can be expressed as
s
where Qin is the effective Q of the amplifier input circuit. So the output noise power density due to the source can be expressed as
23
Furthermore, channel current noise of the device is the dominant noise contributor, and its noise power density associated with the correlated portion of the gate noise can be expressed as
, 2
The last noise term is the contribution of the uncorrelated portion of the gate noise, and its output noise power density can be expressed as
, 2
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According to (3.3), (3.4), (3.5) and (3.8), the noise figure at the resonant frequency can be expressed as
⎟⎟⎠
From (3.11), we observe that χ includes the terms which are constant, proportional to QL, and proportional to Q . It follows that (3.11) will contain terms L2 which are proportional to QL as well as inversely proportional to QL. A minimum noise figure, therefore, exits for a particular QL.
3.1.2 Optimizations of Low Noise Amplifier Design Flow
The analysis of the previous section can now be drawn upon in designing the LNA. In order to pick the appropriate device size and bias point to optimize noise performance given specific objectives for gain and power dissipation, a simple second-order model of the MOSFET transconductance can be employed which accounts for high-field effects in short channel devices. Assume that the drain current, Id, has the form
The power consumption of the LNA, therefore, can be expressed as
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The noise figure can be expressed in terms of PD and Vgs. Two parameters linked to power dissipation need to be accounted for.
)
The noise figure of the LNA, therefore, can be expressed as
)
In general, there are two approaches to optimize noise figure. The first approach assumes a fixed transconductance, Gm. The second approach assumes fixed power consumption.
(1) Fixed Gm optimization: To fix the value of the transconductance, Gm, we need only assign a constant value to ρ. Once ρ is determined, the optimization of the noise figure can be obtained by (3.17):
)
From (3.18), we can obtain the optimal width to get the minimal noise figure for a given Gm under the assumption of matched input impedance. In this approach, the designer can achieve high gain and low noise performance by selecting the desired transconductance, but its disadvantage is that we must sacrifice the power consumption to achieve minimum noise figure.
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(2) Fixed PD optimization: An alternative method of optimization fixes the power dissipation and adjusts device size and bias point to minimize the noise figure.
Once PD is determined, the optimization of the noise figure can be obtained by (3.19):
Then the optimum device size can be obtained to get the best noise performance for fixed power dissipation. In this approach, the designer can specify the power dissipation and find the optimal noise performance, but its disadvantage is that the transconductance is held up by the optimal noise condition.
3.1.3 Amplifier stability
The stability of an amplifier, or its resistance to oscillate, is a very important consideration in a design and can be determined from the S parameters, the matching networks, and the terminations. The non-zero S12 parameter of a two port networks as shown in Fig. 3.3 provides a feedback path by which the power transferred to the output can be feedback to the input and combined together. Oscillation may occur when the magnitude of reflection coefficient Γ or IN ΓOUT, defined as the ratio of the reflected to the incident wave, exceeds unity. It is expected that a properly designed amplifier will not oscillate no matter what passive source and load impedances are connected to it, which is said to be unconditionally stable and the reflection coefficient is given as
1
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conditionally stable. In such a case, input and load stability circles, the contour of Γ =1 and IN ΓOUT=1 for certain frequencies on the Smith chart, are useful to fine the boundary line for load and source impedances that cause stable and unstable condition.
The stability circles can be calculated directly from the S parameters of the two port network, so another convenient parameter, stability factor K, is defined and given as
|
| 2
|
|
|
|
|
| 1
21 12
2 2
22 2 11
S S
S
K = − S − + Δ (3.21)
where
2 21 12 22 11
2 | |
|
|Δ = S S −S S
The amplifier is unconditionally stable provided that
>1
K and |Δ|2<1 (3.22) or equivalently
>1
K and B1 <1 (3.23) where B1=1+|S11|2 −|S22|2 −|Δ|2.
ΓS Γin Γout ΓL
Fig. 3.3 Stability of two-port networks embedded between source and load.
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3.2 Down Conversion Mixer Basic
The purpose of the mixer is to convert a signal from one frequency to another. In a receiver, this conversion is from radio frequency to intermediate frequency or zero-IF. Mixing requires a circuit with a nonlinear transfer function, since nonlinearity is fundamentally necessary to generate new frequencies. Fig. 3.4 shows a simplified CMOS Gilbert Cell mixer, which is composed of transcondcutance stage and switching stage.
The RF input must be linear, or adjacent channels could intermodulate and interfere with the desired channel. And the third-order intermodulation term from the two other signals will be directly on top of the desired signal. The LO input need not be linear, since the LO is clean and of known amplitude. In fact, the LO input is usually designed to switch the upper quad so that for half the cycle M3 and M6 are on and taking all current to output loading. For the other half of the LO cycle, M3 and M6 are off and M4 and M5 are on. This stage will be, therefore, like switch to mixing RF signal to IF signal.
Fig. 3.4 The simplified CMOS Gilbert Cell mixer
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3.2.1 Conversion Gain
The gain of mixers must be carefully defined to avoid confusion. The voltage conversion gain of a mixer is defined as the ratio of the rms voltage of the IF signal and rms voltage of the RF signal. Note that the frequencies of these two signals are different. The power conversion gain of a mixer is defined as the IF power delivered to the load divided by the available RF power from the source. If the impedances are both matched to 50 Ω, then the voltage conversion gain and power conversion gain of the mixer are equal when they are expressed in decibels.
Now, we assume that M3-M6 work like an ideal switch, and the conversion transconductance of the mixer can be expressed as
m
c g
G π
= 2 (3.24)
where gm is the transcondcutanc of M1 and M2, and 2/π is produced by switching stage.
3.2.2 Switching Stage
For small LO amplitude, the amplitude of the output depends on the amplitude of the LO signal. Thus, gain is larger for larger LO amplitude. For Large LO signals, the upper quad switches and no further increase occur. Thus, at this point, there is no longer any sensitivity to LO amplitude. Besides, if upper quad transistors are alternately switched between completely off and fully on, the noise will be minimized.
Since upper transistor contributes on noise when it is fully off, and when fully on, the upper transistor behaves like a cascode transistor which does not contribute significantly to noise.
The large LO signal is required to let upper quad transistors achieve complete switching. But if the LO voltage is made too large, a lot of current has to be moved into and out of the transistors during transitions. This can lead to spikes in the signals
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and can actually reduce the switching speed and cause an increase in LO feed-through.
Thus, too large a signal can be just as bad as too small a signal.
3.2.3 Mixer Noise
Noise figure for a mixer is defined as
Total output noise power at the IF Noise Factor
Output noise power at IF due to input source
= (3.25)
In general, the noise figure of the mixer is divided to two categories, single-sideband (SSB) noise figure and double-sideband (DSB) noise figure. The difference between the two definitions is the value of the denominator in (3.25). In the case of SSB noise figure, only the noise at the output frequency due to the source that originated at the RF frequency is considered, and it is usually used in heterodyne systems. In the case of DSD noise figure, all the noise at the output frequency due to the source is considered (noise of the source at the input and image frequencies), and it is usually used in homodyne systems.
Because of the added complexity and the presence of noise that is frequency translated, mixers tend to be much noisier than LNAs. In generally, mixers have three frequency bands where noise is important:
(1) Noise already present at the IF: The transistors and resistors in the circuit will generate noise at the IF. Some of this noise will make it to the output and corrupt the signal.
(2) Noise at the RF and image frequency: The noise presents at the RF and image frequency will be mixed down to the IF.
(3) Noise at multiples of the LO frequencies: Any noise that is near a multiple of the LO frequency can also be mixed down to the IF, just like the noise at the RF.
Beside, the flicker noise will become more important in the homodyne receiver. In the design of the direct down-conversion mixer, how to reduce the flicker noise of upper
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quad transistors is the important thing. This noise can be reduced by increasing the device size for a given gm.
3.2.4 Port-to-Port Isolation
The isolation between each two ports of a mixer is critical. The LO-RF feed-through results in LO leakage to the LNA and eventually the antenna, whereas the RF-LO feed-through allows strong interferers in the RF path to interact with the local oscillator driving the mixer. The LO-IF feed-through is important because if substantial LO signal exists at the IF output even after low-pass filtering, then the following stage may be desensitized. Fortunately, this feed-through can be reduced largely by used the double-balanced architecture. Finally, the RF-IF isolation determines what fraction of the signal in the RF path directly appears in the IF, a critical issue with respect to the even-order distortion problem in homodyne receivers.
The required isolation levels greatly depend on the environment in which the mixer is employed. If the isolation provided by the mixer is inadequate, the preceding or following circuits may be modified to remedy the problem.
3.2.5 Linearity
As far as cascaded stages are concerned, linearity is a very important performance in mixer stage. In general, it will dominate the distortion of the entire receiver. The detail analysis will be introduced in Chapter 4.
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Chapter 4
-5dBm IIP3 UWB Low Noise Amplifier Using Complex Derivative Cancellation Technique
4.1 Introduction
Linearity plays an important role in broadband RF systems because nonlinearity degrades system performance with the consequence effects such as harmonic generation, cross-modulation and intermodulation. Of these distortions, the third-order intermodulation (IMD3) is one of the critical terms to be solved. The issue is especially serious to the low noise amplifier (LNA) in broadband system as an LNA needs high gain to suppress noise, while facing a broadband spectrum involving external interferers without much filtering. As such, it has been great attention on linearity improvement to RF circuit designers.
In recent years, several techniques have been proposed to improve the linearity of RF amplifier. Most of them are based on negative feedback circuit. One of the most famous ones is using source degeneration by resistor or inductor. Another scheme is the superposition of auxiliary transistors operated in different bias conditions to cancel the derivative of device transconductance. Such method, referred as derivative superposition or multiple gated transistors (MGTR), offers a good opportunity to extend linearity without increasing power consumption. However the conventional derivative cancellation through DC transconductance analysis is inaccurate at RF frequency. A complex transconductance analysis technique was proposed to search for the optimal design parameters. It is also found adequate to improving IIP3 in a broadband LNA design.
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In this work, a 3.1~10.6GHz CMOS LNA employing the complex transconductance analysis is reported, with linearity improvement of 5 dB. In the next section the IIP3 analysis of a cascode amplifier is provided, followed by the LNA circuit design, fabrication and measurement results in 0.18 μm CMOS technology.
4.2 UWB LNA Design Consideration
A low noise amplifier (LNA) is an important component at receiver path for wireless communication. It provides a high gain with low noise figure for overall wireless communication system. For various LNA circuit topologies, the common source amplifier is generally popular as it provides a better noise performance with low power consumption. It is especially popular for extreme applications in which ultra low power. A widely used one for narrowband LNA design is a CS amplifier with inductive source degeneration, which has been well analyzed. Because the frequency dependency of the derived Zopt is different from that of Zin, broadband LNA is not feasible using that technique. This is observed in the broadband amplifier realized by employing a multi-order LC matching network. The noise performance is still band-limited. We designed the UWB LNA by employing dual reactive feedback topology, and the theory will be detailed in this paper.
In this chapter discussions are given for broadband noise and input matching realization in a CMOS LNA. Starting from the next section, we first analyze the dual reactive feedback circuit is proposed to achieve broadband noise and input matching, we use transformer simplifying the LNA circuit to save chip area. For better linearity, we try to use multiple gate transistors to improve the linearity of UWB LNA. The following section shows a design example of an UWB LNA implemented in TSMC 0.18µm CMOS process, along with simulation and measurement results.
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4.3 Dual Reactive Feedback Technique For Broadband Input Impedance Matching
For this UWB LNA, the proposed solution is a dual reactive feedback topology composing of a capacitive shunt feedback and an inductive series feedback, which individually attain noise and input matching in two different frequency regions to constitute the broadband noise and input matching. These two feedbacks are seamlessly combined by employing an inductor at transistor drain, which conducts different loading conditions for each feedback structure. Then for some reason, three inductors in this circuitry are merged into a transformer to reduce the chip area.
4.3.1 The proposed dual reactive feedback circuit
The proposed dual reactive feedback structure with input matching network is shown in Fig. 4.1. The Zopt* has an equivalent circuit representation shown in Fig. 4.2, as Zopt* is not affected by lossless feedbacks. By employing the ladder filter structure
Fig. 4.1 Dual reactive feedback structure
Fig. 4.2 Equivalent circuit of Zopt*.
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with L1 and C1, the Zopt* to Z0 matching bandwidth is extended. Following the general filter design guideline,
2 1
1 C (Lg Ls) (Cgs Cgd) 1 (2 fc)
L ⋅ = + ⋅ + = π , (4.1)
in which fc is the center frequency of pass band. To the optimal wideband matching result the Ropt can be designed slightly less than Z0, not strictly following the standard filter design algorithm. The design of L1 and C1 also takes into account the gain response as described the in next subsection.
After the broadband noise matching is preliminarily achieved, the input impedance is then matched by the proposed dual reactive feedback circuitry, as in the dashed-line box of Fig. 4.1. This circuitry provides different reactive feedbacks in different frequency regions. In the frequency region lower than the Ld-CL series resonance frequency, when looked from the transistor drain, the Ld-CL tank behaves
(a)
(b)
Fig. 4.3 Input impedance changed among the two feedbacks with frequency
(a) capacitive shunt feedback in lower frequency region;
(b) inductive series feedback in higher frequency region.
36
like a capacitor CL' as shown in the left of Fig. 4.3(a). Hence the input impedance can be represented as an equivalent circuit in the right of Fig. 4.3(a), in which
gs
Two noiseless resistances can be found in this circuit: the Rs,IF by the series
Two noiseless resistances can be found in this circuit: the Rs,IF by the series