Physical Properties of TaN x Films

The nitrogen content of TaNx films determined by the analysis of Rutherford backscattering spectra are 23, 33, and 39 at. % for TaN-1, TaN-2, and TaN-3 films, respectively. Figures 5-1 (a)-(c) show the wide angle XRD spectra of TaN-1, TaN-2, and TaN-3 films after annealing at various temperatures. The phases of all TaNx are quite thermally stable. For the TaN-1 film, an extremely weak Ta2N (101) signal was detected after annealing at all temperatures. No significant phase change was observed with the increase of annealing temperature except that a

105

weak Ta3N5 signal appeared after 800 °C annealing. No XRD signals of tantalum nitrides were detected for the TaN-2 films after annealing at different temperatures.

This implies that the morphology of TaN-2 films is almost amorphous. For TaN-3 film, the Ta3N5 (320) phase is observed after 400 °C annealing and the signal intensity increases with the increase in the annealing temperature. Because all of the XRD signal intensity is relatively weak, grain size and phases are further identified with plane view inspection and diffraction pattern of TEM, respectively.

Figure 5-2 shows the plane view TEM micrographs of TaN-1 and TaN-2 films after annealing at 400 and 700 °C. Since there is no apparent grain boundary but only some microcrystals, the films are almost amorphous. Despite 700 °C annealing treatment, the grain is small and the grain sizes are in the nanometer range. It is sure that TaNx film is dense and has no serious grain growth, but some microcrystals are precipitated. The transmitted electron diffraction patterns identify the phases of microcrystals in TaN-1 and TaN-2 films more precisely than those identified with XRD. As shown in Fig. 5-3, Ta2N and TaN phases were observed for TaN-1 and TaN-2 films, respectively, after annealing at 700 °C. The sheet resistance of TaNx films was also measured to understand the effect of grain growth and phase transformation. The resistivities of the as deposited TaN-1, TaN-2, and TaN-3 films were 463, 480, and 1290 mV cm, respectively. Figure 5-4 shows the variation of sheet resistance of the three kinds of TaNx films vs.

annealing temperature. These values were normalized to the sheet resistance of the corresponding films annealed at 400 °C. A slight decrease of sheet resistance is observed in the TaN-1 films upon increasing the annealing temperature from 400 to 700 °C. Referring to the TEM pictures in Fig. 5-2, the decrease of sheet resistance is attributed to the slight grain growth with the increase of annealing

temperature. The sheet resistance of TaN-1 film increased suddenly at 800 °C which can be attributed to the formation of Ta3N5 phase, as identified with the XRD spectra. According to Radhakrishnan et al., the Ta3N5 phase has a very high resistivity [8]. The resistance of TaN-2 is almost constant after 800 ^oC annealing which reflects that no grain growth and phase transition occur in the TaN-2 film as analyzed by the XRD and TEM. Unlike TaN-1 and TaN-2 films, the sheet resistance of TaN-3 films increases with the annealing temperature. The XRD spectra reveal that the increase is due to the growth of high resistivity phase (Ta3N5

phase) after high temperature annealing.

5.3.2 Effective Work Function on SiO

2

Figure 5-5 shows the effective work function (Φm,eff’) of Cu/TaN-1, Cu/TaN-2, and Cu/TaN-3 samples vs. the annealing temperature. The Φm,eff’ was extracted from the C-V curves by using a theoretical C-V curve fitting, which has an error counting for the oxide charges as discussed in chapter 2. All the Φm,eff’ difference of Cu/TaNx samples is less than 70 mV below or at 600 °C. This implies that the modulation of work function of TaNx film with the usage of various N/Ta ratios is very limited. In other words, the work function of TaNx film is quite stable against variation induced by process disturbance. According to the ITRS road-map, the allowed deviation of threshold voltage (Vth) is 25 mV at the sub-70 nm technology node [9]. For 400 °C annealing condition, the 3-sigma (3σ) deviation of Φm,eff’ of all samples satisfied the demand of 25 mV. Particularly, the 3σ deviation of Φm,eff’ of Cu/TaN-2 sample is less than 5 eV. However, the deviation of Φm,eff’ continuously increases with the increase of annealing temperature and is out of the demand after annealing at and beyond 500°C. The reasons that cause the deviation of Φm,eff’ include the characteristic of gate

107

material, substrate doping concentration, oxide thickness, and oxide charges. The factors of oxide thickness and substrate deviation of 400 and 500°C annealed samples are ruled out using the Φm,eff’ extracting procedure of the theoretical curve fitting. The characteristics of gate electrode resulting in Φm,eff’ variation are phase change and grain growth. The XRD spectra show no apparent difference among the TaNx films annealed below 700°C. The primary phase after annealing at 400°C changed from Ta2N to Ta3N5 as the nitrogen content increased from 23 to 39 at. % but the difference of Φm,eff’ is only 70 mV. In addition, the Φm,eff’ differences of Cu/TaNx samples annealed at the same temperature below 700°C are almost the same. It is thus clear that the phase transformation cannot dominate the Φm,eff’ variation. In other words, the main reason that caused the variation of Φm,eff’ should be the variation of effectives oxide charges. Copper contamination is the first possible factor to be examined. Figures 5-6 (a), (b), and (c) show the C-V curves before and after bias temperature stress (BTS) test at +1 MV/cm and 150°C for 60 min of Cu/TaN-2 sample annealed at 500, 550, and 600 °C, respectively.

The C-V curves before and after BTS test of the 500 °C annealed sample are identical. A slight shift of C-V curve toward the negative voltage axis after the BTS test is observed on the 550 °C annealed sample. Furthermore, the appearance of a hump at the inversion region (about +0.5 V) reveals that the carrier lifetime at the Si substrate is shortened. Both the observations indicate that the device was contaminated, while the most possible contamination source is Cu. Transient capacitance analysis was performed to detect lifetime degradation. The transient capacitance technique is sensitive to small quantity of deep-level atoms, such as copper [10, 11]. Once the copper reaches silicon, it affects the silicon/oxide interface and the minority carrier lifetime in the bulk. Therefore, The MOS

capacitor was biased at the accumulation mode of -4 V and was switched to deep depletion mode of +5 V. The retention time is defined as the time required for capacitance to recover 90% of the stable value. Table 5-1 lists the retention time and its deviation of Cu/TaN-2 samples annealed at 400, 500, 550, and 600 °C. The retention time of 550 and 600 °C annealed samples decreases to shorter than 0.1 s, which indicates that copper had penetrated into the Si substrate. A slight decrease in the retention time of the 500 °C annealed sample is discussed later. Although SIMS was not detected Cu signal in the substrate of the 550 °C annealed sample, Fig. 5-7 shows the SIMS depth profile of Cu in the 600 °C annealed Cu/TaN-2 sample before BTS test. Before SIMS analysis, the Cu film was removed with dilute HNO3 solution. It is thus concluded that the decrease of Φm,eff’ and increase in the deviation of Φm,eff’ beyond 550 °C annealing is related to Cu contamination.

However, the decrease of Φm,eff’ and increase of Φm,eff’ deviation occur after annealing at 500 °C even if no Cu contamination would occur.

5.3.3 Electrical Effect of Thermal Annealing

Figure 5-8 shows the interface state density (Dit) at the mid-gap of Cu/TaN-1, Cu/TaN-2, and Cu/TaN-3 samples versus the annealing temperature. The magnitude and deviation of Dit increase with the increase of annealing temperature. It is reasonable to expect that the effective oxide charges (Qeff) also increase with the increase of annealing temperature. A deviation in Qeff of 1x10¹¹ cm^-2 results in a deviation in flat band voltage of 46mV. Therefore, Φm,eff’ deviation can be reasonably attributed to the deviation of Qeff induced by the deviation of thermal stress. For 500 annealed samples, the drop in the ℃ Φm,eff’ compared to the corresponding 400 annealed samples℃ is less than 60 mV, and the 3σ deviation is about 50 mV which is higher than the value of the demand. It

109

is postulated that the deviation of Φm,eff’ comes from the large difference of thermal expansion coefficient between Cu and Si. By scaling down the gate dielectric thickness, the effect of Qeff on threshold voltage can also be scaled down. However, the Qeff generated by thermal stress may increase. The slight decrease in the retention time of 500 annealed sample, listed in Table 5℃ -1, is thus explained by the increase of surface generation rate due to the increase of Dit. Replacing Cu by another low resistivity material with thermal expansion coefficient close to Si, for example W and Mo, is recommended.

Above 600 annealing, the ℃ Φm,eff’ rises with the annealing temperature. It is presumable that the interface dipoles caused by the interaction between oxide and metal gate induce effective work function offsets since effective oxide charges are increasing [12]. The interaction between TaN metal gate and gate dielectric is still under investigation.

5.4 Summaries and Conclusions

This chapter investigates the work function modulation of TaNx film and the thermal stability of Cu/TaNx stack as the gate electrode. The nitrogen content was varied in the range 23-39 at. % by using the reactive sputtering with various Ar/N2

gas flow ratios. The main phases of the TaN-1, TaN-2, and TaN-3 films are Ta2N, TaN, and Ta3N5, respectively. The TaNx films are thermally stable up to 800 . ℃ However, the formation of the Ta3N5 phase in a TaNx film annealed at high temperature or with a high N/Ta ratio increases the effective resistivity. The effective work function of TaNx is about 4.31-4.38 eV and the range is less than 70 mV. Such a weak work function modulation implies that the work function of TaNx

film is quite stable to avoid the variation induced by process disturbance. On the

other hand, TaNx is a suitable to be a gate electrode only for the surface channel NMOSFETs. The flat band voltage decreases with an increase in the annealing temperature. In addition, the deviation of the flat band voltage increases with the annealing temperature. Although phase change, grain growth and Cu contamination contribute at high temperature, thermal stress-induced oxide charges dominate the decrease and deviation of the flat band voltage at temperature below 500 . ℃

In conclusion, according to the material and electrical analysis, the Cu/TaNx

stack can be used as a gate electrode for the surface channel NMOSFETs, and the maximum process temperature following gate electrode deposition should be lower than 500 . Th℃ e thermal stress-induced oxide charges are additional sources of deviation in the threshold voltage. This result must be considered in controlling the threshold voltage during metal gate generation.

111

References

[1] International Technology Roadmap Semiconductors 2005 edition, Front end Process, p.33.

[2] H. Wakabayashi, Y. Saito, K. Takeuchi, T. Mogami, and T. Kunio,”A Novel W/TiNx Metal Gate CMOS Technology Using Nitrogen-Concentration- Controlled TiNx Film,” in 1999 Int. Electron Devices Meet. Tech. Dig., pp.253-256.

[3] T. Matsuki, K. Kishimoto, K. Fujii, N. Itoh, K. Yoshida, K. Ohto, S. Yamasaki, T. Shinmura, and N. Kasai, “Cu/poly-Si Damascene Gate Structured MOSFET with Ta and TaN Stacked Barrier,” in 1999 Int. Electron Devices Meet. Tech.

Dig., pp.261-264.

[4] H. Shimada, I. Ohshima, T. Ushiki, S. Sugawa, and T. Ohmi,”Tantalum Nitride Metal Gate FD-SOI CMOS FETs Using Low Resistivity Self-grown bcc-tantalum Layer,” IEEE Trans. Electron Devices, vol. ED-48, No.8, pp.1619-1626, 2001.

[5] S.Venkatesan, A.V.Gelatos, V.Misra, B. Smith, R. Islam, J.Cope, B, Wilson, D.Tuttle, R. Cardwell, S. Anderson, M. Angyal, R. Bajaj , C. Capasso, P.Crabtree, S.Das, J.Farkas, S.Filipiak, B. Fiordalice, M. Freeman, P.V. Gilbert, M. Herrick, A. Jain, H. Kawasaki, C. King, J.Klein, T.Lii, K. Reid, T. Saaranen, C. Simpson, T. Sparks, P.Tsui, R.Venkatraman, D. Watts, E. J.Weitzman, R.

Woodruff, I. Yang, N. Bhat, G, Hamilton and Y.Yu, “A High Performance 1.8V, 0.20µm CMOS Technology with Copper Metallization,” in 1997 Int. Electron Devices Meet., pp.769-773.

[6] K. Nakajima, Y. Akasaka, M. Kaneko, M. Tamaoki, Y. Yamada, T. Shimizu,

and K. Suguro,” Work Function Controlled Metal Gate Electrode on Ultrathin Gate Insulators,” in Proceedings of the 1999 Symposium on VLSI Technology, pp.95-96.

[7] B. Y. Tsui, S. H. Liu, G. L. Lin, J. H. Ho, and C. H. Chang, “A Comprehensive Study on Radiation Damage in Plasma System,” in Proceedings of Symposium on Plasma Process-Induced Damage, pp.148-150, 1996.

[8] K. Radhakrishnan, N. G. Ing, and R. Gopalakrishnan,” Reactive Sputter Deposition and Characterization of Tantalum Nitride Thin Films,” Material Science and Engineering, B vol. 57, No.3, pp.224-227, 1998.

[9] 2000 International Technology Roadmap for Semiconductors - Process Integration, Devices, & Structures, p.42, Semiconductor Industry Association, San Jose.

[10] C.N. Berlung, “Surface States at Steam-grown Silicon-silicon Dioxide Interfaces,” IEEE Trans. Electron Devices, vol. ED-13, No. 10, pp.701-705.

[11] Yosi Shacham-Diamand, Baral Israel, Yelena Sverdlov,” The electrical and material properties of MOS capacitors with electrolessly deposited integrated copper gate,” Microelectronic Engineering, vol. 55, No.1-4, pp.313-322, 2001.

[12] J. Robertson, “Band offsets of wide-band-gap oxides and implications for future electronic devices, ”J. Vac. Sci. Technol., B vol. 18, No. 3, pp.1785-1791, 2000.

113

Table 5-1 Mean values and standard deviations of retention time of Cu/TaN-2 MOS capacitors under transient capacitance measurement.

sample 400 ^oC 500 ^oC 550 ^oC 600 ^oC

Retention time (s) 33.4 14.1 <0.1 <0.1

Deviation (s) 16.2 7.4 0 0

30 40 50 60

Ta₃N₅ (320)

Ta₃N₅ (301)

2

Θ

(degree)

TaN (200) TaN (111)

800^oC 600^oC 400^oC 800^oC 600^oC 400^oC 800^oC 600^oC 400^oC Ta₂N (101)

Ta₃N₅ (320) Si

TaN-3 TaN-2 TaN-1

Fig. 5-1 Wild angle X-Ray Diffraction (XRD) spectrums of TaN-1, TaN-2, and TaN-3 films after annealing at various temperatures.

(a)

(b)

(c)

115

Fig. 5-2 Plane view Transmitted Electron Microscopy (TEM) micrographs of (a) TaN-1 film annealed at 400 ℃, (b) TaN-1 film annealed at 700 ℃, (c) TaN-2 film annealed at 400 ℃, and (d) TaN-2 film annealed at 700 ℃.

Fig. 5-3 Diffraction patters of (a) TaN-1 film annealed at 400 ℃, (b) TaN-1 film annealed at 700 ℃, (c) TaN-2 film annealed at 400 ℃, and (d) TaN-2 film annealed at 700 ℃.

117

400 500 600 700 800

0.8 1.0 1.2 1.4 1.6 1.8

Normolized R s

Temperature (^oC)

TaN-1 TaN-2 TaN-3

Fig. 5-4 Variation of sheet resistance of the three-kinds of TaNx films versus annealing temperature.

400 500 600 700 800

400 500 600 700 800

4.0

400 500 600 700 800

4.0

Fig. 5-5 Effective work function (Φm,eff’) of (a) Cu/TaN-1 sample, (b) Cu/TaN-2 sample, and (c) Cu/TaN-3 sample versus the annealing temperature. The effective work function was extracted from the C-V curves by a theoretical curve fitting.

(a)

(b)

(c)

119

Fig. 5-6 Capacitance-Voltage curves before and after bias-temperature stress (BTS) test at +1MV/cm and 150 ℃ for 60 min. of Cu/TaN-2 sample annealing at (a) 500

℃, (b) 550 ℃, and (c) 600 ℃.

(c) (b)

(a)

0 50 100 150 200 10²

10³ 10⁴ 10⁵ 10⁶

SiO₂ Si TaN-2

Cu O

Counts

Depth (nm)

Fig. 5-7 Secondary ion mass spectroscopy (SIMS) depth profile of Cu of the 600 ℃ annealed Cu/TaN-2 sample. No BTS was performed before SIMS analysis and the Cu layer was removed with dilute HNO3 solution.

121

Fig. 5-8 Interface state density (Dit) of (a) Cu/TaN-1 sample, (b) Cu/TaN-2 sample, and (c) Cu/TaN-3 sample versus the annealing temperature.

(c) (b) (a)

Chapter 6

Ta-Pt Metallic Alloy Gates

6.1 Introduction

Several metal nitrides have been discussed in the previous chapters. Although metal nitrides are thermal stable under high-temperature annealing, the work function range is not large enough for both NMOSFETs and PMOSFETs. A principle of work function tuning by the metallic alloy system is adapted to achieve full range of work function over the silicon energy band gap. It is difficult to theoretically evaluate the work function of alloy since the components in alloy is incoherent and the structure of alloy is always disordered. Therefore, there are few works in discussion of work function of alloy. In 1974, Gelatt and Ehrenreich have first theoretically solved the Hamiltonian equation by coherent-potential-approximation (CPA) to obtain the work function of the alloy [1]. The work function of NiCu and PtRh alloys is recently measured to be linearly dependent upon the concentrations [2]. Moreover, the proposed application of binary metallic alloys in MOSFETs included Ru-Ta, Ta-Pt and Mo-Hf alloys [3-5]. Work function modulation used by the binary alloys seems a easily controlled method. In this chapter, Ta-base alloys (Ta-Ti and Ta-Pt) were applied as gate electrodes of MOSFETs due to the dense morphology and chemical inert of Ta which is completely immune to chemical attack at temperature lower 150 ^oC and is attacked only by hydrofluoric acid [6]. The Ta element has a high melting point exceeded only by tungsten and rhenium. The

123

thermal stability of Ta-rich Ta-Pt alloy on SiO2 and HfO2 is investigated. The basic physical characteristic of Ta-Pt alloy is also discussed.

6.2 Process Flow

Simple MOS capacitors with gate electrodes of Ta-Pt and Ta-Ti alloys were fabricated on (100)-oriented Si wafers. After standard wafer cleaning, a gate oxide was thermally grown to 10 nm thick in a dry oxygen atmosphere at 900°C. After gate oxide deposition, the alloy gate was patterned by lift-off process. The 55nm thick Ta-Pt alloys were deposited in a co-sputtering system. The sputtering power of Ta and Pt (Ti) targets were set to several split conditions in order to control the concentration in alloys. Before lift-off, some samples with 6 nm gate oxide were implanted with arsenic ions (As⁺), phosphorous ions (P⁺), or boron di-fluoride ions (BF2+) to a dose of 5×10¹⁵ cm^-2. Then, those samples as well as some undoped control samples were capped by a 60nm thick silicon nitride film which was deposited at 300 °C by a plasma-enhanced chemical vapor deposition (PECVD) system. The nitride film is used to avoid dopant escape during high temperature annealing. Samples doped by As, P and BF2 were annealed at temperatures from 400 °C to 800 °C in a rapid thermal annealing (RTA) system for 30sec in N2

atmosphere. The samples uncapped with nitrides were annealed in furnace for 30 min in N2. Contact-hole patterning and Al-metallization processes were used to complete the device fabrication. Finally, backside contact was formed with an evaporated aluminum film.

Ta-Pt alloy for physical analysis was deposited on a thin SiO2 layer in the same co-sputtering system with sputtering power of DC 100 watts and DC 30 watts for

Ta and Pt targets, respectively, to form a Ta-rich alloy film. It is well known that alloys with high ratio of low work function components are much chemically active.

The annealing conditions were from 400 °C to 800 °C for 30 min in a horizontal furnace. Table 6-1 lists all of the samples and process conditions used in this work.

6.3 Results and Discussions

6.3.1 Work Function Modulation

According to result of Gelatt and Ehrenreich, the work function of AxB1-x

alloys can be approximately expressed as

1 1 respectively, and ρA and ρB are the pure constituent total densities of states [1]. The density of states at Fermi-level energy ρ(EF) is proportional to the electronic specific heat constant C_e=( / )1 3 π ρ² (E_F )K T_B² , where KB is Boltzmen constant and T is the temperature. In the case of C_{e A,} /C_{e B,} ∼ , the Φ1 m changes with x

linearly as Φ_m( )x = Φ_{m B,} + Φx( _{m A,} − Φ_{m B,} ) [2]. This means that we can get any work function between the Φm,A and Φm,B we want if we properly control the content and composition of the alloys. The Ce values of Pt, Ta, and Ti are 6.8, 5.9, and 3.35 mJ/mole/K², respectively [7]. Since the Ce values of Ta and Pt are very close, a linearly correlation can be expected.

The effective work functions of the 400 ^oC annealed samples are extracted by

125

comparing the measured C-V curves with the theoretical C-V curves, as shown in Fig. 6-1 [8]. The effective work functions count for the effect of oxide charges. As the gate oxide thickness is 11nm, an amount of oxide charge (Qss) of 1×10¹¹ cm^-2 results in a Φmdeviation of 0.05 eV only. The Qss of the poly-Si gate is around 5×10¹⁰ cm^-2 estimated from the interface states. The Qss of metal gate devices might be higher than that of poly-Si ones. However, since the interface density of metal gate devices is similar to that of poly-Si one, it is believed that the Qss of metal gate devices will not be much higher than those of poly-Si ones. It is reasonable that the poly-Si gate has an effective work function near the Silicon conduction band edge. Therefore, the effect of oxide charges can be ignored. With the increasing contents of high Φm element, Pt in Ta-Pt alloys or Ta in Ta-Ti alloys, the Φm,eff shifts toward higher value. The Ta0.63Ti0.37 (A1 alloy) and Ta0.58Pt0.42

(A4 alloy) show Φm,eff of about 4.16 eV and 5.05 eV and is suitable for NMOSFETs and PMOSFETs, respectively. As expected, the Φm,eff can be

(A4 alloy) show Φm,eff of about 4.16 eV and 5.05 eV and is suitable for NMOSFETs and PMOSFETs, respectively. As expected, the Φm,eff can be

在文檔中 互補式金氧半電晶體之金屬閘極材料與技術研究 (頁 127-0)