Chapter 3 Characteristics of Planar and Nanowire SONOS Devices with Various
3.2 Program/Erase Characteristics
For the NW SONOS devices in this study, FN tunneling is employed for P/E operations as mentioned before. When the device is programmed, both source and drain are grounded and a positive voltage is applied to the gate and a large electric field will exist in the ONO region to induce FN tunneling. Before erasing, the device is programmed beforehand with 2.5 V shift of Vth relative to the fresh state.
Subsequently, a negative bias is applied to the gate and both source and drain are grounded. Figure 3-4 shows the ID-VG curve of a programmed NW device where the SS is almost identical to the fresh state. Therefore, we can use the constant current method to extract the Vth. For simplicity, the Vth is defined as the gate voltage when the drain current reaches 1 nA in this study.
3.2.1 Program/Erase Characteristics of Planar and NW SONOS
In the previous section, we had observed that NW device owns better SS than the planar device, which can be attributed to its superior gate controllability. Accordingly, it is expected that the NW SONOS devices will have better P/E characteristics over the planar counterparts. Figure 3-5 illustrates the Vth shift versus programming and erasing time of NW and planar SONOS with nominally identical ONO thickness. To compare the programming efficiency, we first consider the case when 13 V is applied as the stress bias for both planar and NW devices. When the operation time is merely 1 microsecond (µs), the Vth shift of NW and planar devices are about 2.4 V and 0 V, respectively. Even when the programming time increases to 10 ms, Vth shift of planar devices is still less than 0.3 V. Erase characteristics of NW and planar devices are shown in Fig. 3-5(b), which is very similar to the situation of program characteristics.
When -11V is applied to the gate of the planar device for erasing, Vth shift is still negligible after 1 s stress. On the contrary, the NW device biased with a gate voltage of -11 V can achieve about -2.5 V Vth shift after 1 ms.
From the aforementioned statements, NW SONOS devices indeed possess superior P/E speed to planar counterparts. Similar results of GAA NW SONOS devices had been discussed and reported in a recent publication [13]. The cross-sectional shape of the NW channel is nearly rectangular with rounded corner in this study. Here, to simplify the analysis, the shape of NW channel is considered to be cylindrical with the band diagrams shown in Fig. 3-6 to explain our findings. For a fair comparison, NW and planar SONOS devices have identical ONO thickness. The band diagrams of NW and planar SONOS devices, both of which are operating under program mode, with the same gate bias are shown in Fig. 3-6(a). The solid and dash lines represent the potential of planar and NW devices and the slope of the potential
line is proportional to the magnitude of electric field. Because of the cylindrical architecture of NW devices, the electric flux across the ONO layer is inversely proportional to the distance from the center of the NW. Consequently, the magnitude of electric field near the interface between tunneling oxide and channel is much higher than that in the planar one. In Chapter two, we had discussed the major factor that affects the FN tunneling current is the electric field. For that reason, the large electric field across the tunneling oxide enhances the electron tunneling probability and thus increases the program efficiency of NW SONOS devices when the applied gate bias is the same as the planar one. Similar to the programming case, the electric field as experienced by holes for tunneling from the channel to the oxide is increased due to the cylindrical geometry as shown in Fig. 3-6(b). Due to the higher electric field, the de-trapped rate of electrons in nitride also becomes faster in the NW devices.
Therefore, GAA NW devices exhibit much larger P/E efficiency than planar devices.
3.2.2 Program Characteristics of NW SONOS
Figures 3-7(a) ~ (d) depict the Vth versus programming time for different splits of GAA NW devices with gate biases of 8 V, 9 V, 10 V, 11 V, 12 V, 13 V, 14 V and 15 V, respectively. As shown in Fig. 3-7(a), the Vth shift increases when prolonging the operation or increasing the gate bias due to the correspondingly higher electric field that will induce a larger FN tunneling current. During the programming process, the amount of electrons trapped in the nitride increases and the electric field across the tunneling oxide reduces. Therefore, the Vth becomes saturated and the programming speed is retarded. This situation happens when the gate bias is 15 V and the stress time is longer than 10 ms for S1. For thinner devices, the programming saturation phenomenon occurs earlier for a specific programming voltage or at a lower
programming voltage for a specific programming time, as shown in Figs. 3-7 (b) ~ (d).
This would limit the available window size for practical operation.
Figure 3-8 compares the program characteristics of NW SONOS devices of different dimensions with an identical programming voltage of 10 V. We separate this plot into two parts, Regions I and II, using the programming time of 10µs as demarcation. In Region I, where the programming time is shorter than 10 µs, we can easily observe that the thinner devices exhibit better programming efficiency. The potential profiles of NW SONOS devices with two different dimensions for the same gate bias are shown in Fig. 3-9(a). It can be seen that the voltage dropped across the tunneling oxide in thinner NW SONOS devices is higher than that in the thicker one due to its higher curvature which in turn induces a larger electric field. Hence the programming speed is faster than the thicker NW SONOS devices. In Region two, the net shift in Vth of S4 is smaller than 0.3 V and the other devices also become saturated gradually. This can be explained by the band diagram which is shown in Fig. 3-9(b).
During programming, the voltage drop across the blocking oxide gets larger as more electrons are trapped. Furthermore, the lower electric field across the tunneling oxide will decrease FN tunneling current from the channel. Therefore, when the rate of electron trapping is reduced and more electrons leak from nitride to the gate electrode, the Vth will become saturated. This situation is more obvious in thinner devices because of their higher electric field across the blocking oxide. In this way, there are more electrons leaking to the gate and fewer electrons tunneling from the channel than the other devices with thicker NW. Thus, the magnitude of saturated Vth shift of thinner devices is smaller than the thicker ones. The program speed characteristics for NW SONOS devices of different dimensions with an identical gate bias of 14 V are shown in Fig. 3-10. Owing to the high gate voltage applied and the limitation in time
resolution of the measurements (10-7 sec), the initially fast rise in Vth cannot be resolved and only Region II is seen.
3.2.3 Erase Characteristics of NW SONOS
Figures 3-11(a) ~ (d) show erase speed characteristics for NW SONOS devices of different dimensions with gate bias of -8 V, -9 V, -10 V, -11 V, -12 V and -13 V, respectively. The increase magnitude in gate bias (absolute value) does apparently accelerate the erase speed. The value of Vth shift also increases with the operation time. In Fig. 3-11(a), the rate of Vth shift slows down when erasing time is longer than 10 ms with gate bias of -11 V due to the fact that the amount of the trapped electrons in the nitride does not decrease proportionally with erasing time. Erase saturation happens when the gate bias is larger than 13 V because some electrons inject from the gate electrode. Figure 3-12 compares the erase speeds for NW SONOS devices of different dimensions with an identical gate bias of -9 V. We can clearly observe that the thinner devices possess faster erase speed. Figure 3-13 illustrates the band diagrams during erasing. Thinner device has higher electric field across the tunneling oxide which can induce larger tunneling current of holes. Furthermore, higher electric field also prompts more electrons to be de-trapped from nitride into the channel.