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Chapter 5 Experimental Results and Discussion

5.1 Study on Electrical Characteristics of HfO 2 /n-InAs Metal-Oxide-Semiconductor

5.1.3 Results and Discussion

Transmission Electron Microscopy (TEM) Analysis

The interface of HfO2/n-InAs MOS-capacitor was observed by the cross-sectional transmission electron microscopy (TEM) analysis as shown in Fig. 5-1-2(a). Compared to the HfO2/n-In0.53Ga0.47As MOS-capacitor (Fig.

5-1-2(b)) with the similar process conditions, there was less interfacial oxide formed at the HfO2/n-InAs interface. The interfacial oxide layer at the HfO2/n-In0.53Ga0.47As interface was identified as Ga-oxide [5-6], which was absent at the interface of HfO2/n-InAs MOS-capacitor as observed in Fig.

5-1-2(a).

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(a) HfO2/InAs (b) HfO2/In0.53Ga0.47As Fig. 5-1-2 TEM images of interface (a) HfO2/InAs, (b) HfO2/In0.53Ga0.47As

C-V Characteristics

The C-V characteristics of HfO2/n-InAs MOS-capacitors with the different PDA temperatures of 400oC, 450oC, 500oC and 550oC were shown in Fig. 5-1-3.

The device annealed at 400oC had the highest capacitance value at the accumulation region among the annealing temperatures in this study and the capacitance value was reduced with the increase of PDA temperature.

Furthermore, there was no clear saturation observed at the inversion region for the capacitor annealed at 400oC. The phenomenon may be due to a small amount of native oxide existed at the oxide/semiconductor interface. However, as the PDA temperature was increased to 450oC, the native oxide at the interface was reduced, leading to the obvious saturation at the inversion region.

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Fig. 5-1-3 C-V characteristics of the HfO2/n-InAs MOS-capacitors after PDA at (a) 400oC (b) 450oC

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Fig. 5-1-3 C-V characteristics of the HfO2/n-InAs MOS-capacitors after PDA at (c) 500oC (d) 550oC

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The hysteresis behaviors of HfO2/n-InAs MOS-capacitors at 100 kHz at the different annealing temperatures were investigated by using the bidirectional

C-V sweeps as shown in Fig. 5-1-4. The behavior of hysteresis occurrence

depends on the quality of the high-κ dielectric, it can be seen that the hysteresis voltage decreased with the increase of PDA temperature, which implied the quality of HfO2 film was improved, especially at the PDA temperature of 500oC (ΔV=-37mV). However, as the PDA temperature approached 550oC, the hysteresis became worse (ΔV = -288 mV) due to a small amount of indium (In) diffused into HfO2.

The flat-band voltage at 100 kHz shifted to a more negative value with the increase of PDA temperature from 400oC to 500oC, 2.15 V (400oC), 1.32 V (450oC), 1.11 V (500oC), which implied that the oxide charges were reduced under a higher PDA temperature. Also, the flat-band voltage shifted to a more positive value of 2.14 V at the PDA temperature of 550 oC due to indium (In) diffusion. Furthermore, the capacitance value at the flat-band condition decreased with increasing annealing temperature.

The interface trap densities (Dit) of HfO2/n-InAs MOS-capacitors at the different PDA temperatures were estimated by the conductance method. It showed that the device at the PDA temperature of 500oC had the lowest Dit with the value of 2 7х1012 cm-2·eV-1 among all the PDA temperatures studied. The leakage current for the 15nm HfO2/n-InAs MOS-capacitor after 500oC annealing was less than 1×10-5A/cm2 when the bias voltage was between -3.5 V to 3.5 V.

All of the C-V characteristics mentioned above were listed in Table 5-1-1.

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Table 5-1-1 Comparison of electrical characteristics of the HfO2/n-InAs MOS-capacitors at the different PDA temperatures

PDA temp. (oC) 400 450 500 550

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XPS Analysis

Fig. 5-1-5 showed the XPS spectra of HfO2/n-InAs MOS-capacitors at the different PDA temperatures from 400oC to 550oC. There were three values of In3d5/2, InOX, In2O3 and InAs, and two values of As3d, As2O3 and InAs, observed. The native oxide of InAs, which is mainly composed of As2O3, is known to produce a relative poor interface.

According to the XPS results, it was observed that the amount of InOX and As2O3 decreased when the PDA temperature was increased from 400oC to 450oC.

As the PDA temperature approached 500oC, there was no clear As2O3 peak, and the device had the best hysteresis value of ~ 37mV as shown in Fig. 5-1-4.

However, when PDA temperature was increased up to 550oC, a small amount of indium (In) diffused into HfO2 and both In2O3 and InOX amount increased as observed from the XPS results. And it was the reason that the electrical characteristics of HfO2/n-InAs MOS-capacitor degraded at a PDA temperature over 500oC.

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Fig. 5-1-5 XPS spectra of the HfO2/n-InAs MOS-capacitors at the different PDA temperatures

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Compared to Al2O3/n-InAs MOS-Capacitor

Al2O3 is the most mature high-κ material for III-V MOS-devices and have been investigated as the gate dielectric in recent years. Also, the study of Al2O3/n-InAs MOS-capacitors was already done by Dr. Yun-Chi, Wu before in our group [5-7]. The fabrication process of Al2O3/n-InAs MOS-capacitors was also the same as described in this thesis.

The C-V characteristic of Al2O3/n-InAs MOS-capacitor is shown in Fig.

5-1-6. Compared with the C-V characteristic of HfO2 one at the same operated frequency (f:100 kHz), the MOS-capacitor with HfO2 exhibited the capacitance value of 0.64 (pF/cm2) at the accumulation condition which is higher than that of 0.54 (pF/cm2) of Al2O3 MOS-capacitor. Furthermore, the HfO2/n-InAs MOS-capacitor had the smaller equivalent oxide thickness (EOT). Table 5-1-2 lists the comparison of Al2O3 and HfO2 n-InAs MOS-capacitors.

Fig. 5-1-6 C-V characteristics of the Al2O3/n-InAs MOS-capacitor

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Table 5-1-2 Comparison of the Al2O3 and HfO2/n-InAs MOS-capacitors κ Eg (eV)

C

Acc (pF/cm2)

The electrical characteristics of HfO2/n-InAs metal-oxide-semiconductor capacitors with the different post deposition annealing (PDA) temperatures were demonstrated. By the use of InAs as the channel layer, it could avoid the undesired Ga-oxide formation at the dielectric/semiconductor interface compared to the In0.53Ga0.47As channel device. Moreover, the quality of HfO2/ InAs interface was improved with the increase of PDA temperature. The MOS-capacitor after 500oC PDA annealing demonstrated the lowest interface trap density (Dit) value due to the reduction of native oxide (As2O3), which was verified by the XPS results. Also, the C-V characteristics of device with 500oC annealing exhibited the best performance such as a lowest hysteresis value, the flat-band voltage shifted to a more negative value, and the smaller frequency dispersion at the accumulation region. However, as the annealing temperature approached 550oC, a small number of indium (In) atoms diffused into the HfO2 layer with the increase of InOX and In2O3 formation so that the device performance was degraded. On the other hand, the HfO2/n-InAs MOS-capacitor had the higher capacitance value and the smaller equivalent oxide thickness (EOT) compared to the device with the Al2O3 gate dielectric.

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