RFVGA

RF_in

Iout



Gm2

Gm1



Fig. 5.3 The designed RFVGA topology.

5.3.1 RFVGA

As discussed in the previous chapter, the weak desired signal usually comes with strong interferers, which may degrade the signal quality without careful processing.

There are two ways to alleviate this problem. The simplest way is utilizing a tracking filter prior to the LNA to filter out the interferers. However, the interferers may be only one or two channels away from the desired channel. This requires the filter to have an ultra-high quality factor, which is difficult to be integrated on chip. The other way feasible for on-chip integration is incorporating variable-gain functions into the RF front-end, called as RF Variable-Gain Amplifiers (RFVGA). Since the noise floor is mainly dominated by the added circuit noise and distortions, the role of the RFVGA is to trade-off the contributions between the added circuit noise and distortions by adjusting its gain settings. In theory, the RFVGA is expected to provide a constant output third-order intercept point (OIP3) across the gain range. When gain is reduced, input IP3 (IIP3) of the RFVGA should increase, but NF would degrade inevitably. As a result, the linearity of the RFVGA can be improved significantly at lower gains while preserving the noise performance at higher gain settings. It is noted that at a given gain setting the added circuit noise level is fixed, but the added distortions level increases rapidly with the input interference strength. For a given input interference to signal ratio, to sum up, the RFVGA would change its gain settings to maintain a maximum signal to

Chapter 5 Dual-Band RF Tuner in 0.13μm CMOS

96

noise plus interference ratio (SNIR).

Typically, RFVGAs change their gain settings by varying either the input V-I converter or the load [50]. The adjustment of the V-I converter, furthermore, can vary either its received voltage input by tapped attenuator architectures [51] or its output current component by current steering methods [52]-[54]. Digital/discrete gain control is much flexible and easy to implement using any one of these methods.

Analog/continuous gain control, on the other hand, is generally implemented only with the current steering method, which biases the current steering transistor pair in weak inversion region to realize an exponential transfer function.

In this design, the RFVGA has a digitally programmable gain with multi-step resolutions. The overall architecture is illustrated in Fig. 5.3, composed of two separate signal path. The upper path can provide a fine gain step as low as 2dB, while the lower path achieves a coarse gain step of 41dB further to extend the overall dynamic range. As illustrated in Fig. 5.2, the upper path is composed of two amplification stages, which provides a high voltage gain to compensate for the loss of the subsequent passive mixer. The first stage is implemented using our proposed LNA architecture as aforementioned in chapter 4. It provides wideband low noise amplification and an input impedance match to 50 Ω, while the second stage, i.e., the transconductance stage of the mixer, is cascaded to the proposed balun LNA to obtain maximum front-end gain. Variable gain control is implemented by three methods in combination of these two cascode amplifiers. Fine gain tuning is realized by a bank of digitally controlled resistor load, RL1 and RL2. In actuality, it would be more desirable to realize all the gain reduction at LNA output, since this would achieve the best SNR over the other VGLNA architectures [50]. However, the parasitic of the switch transistors may load the output, degrading the bandwidth. Moreover, as the gain back-off becomes much larger, the small output resistor and the subsequent stages will dominates the noise performance. In this design, the variable load provides 12dB gain range in 2dB steps. Another gain control with coarse gain stepping is carried out by two different ways. One of them applies the current steering technique by switching M_cs1 and M_cs2 with a gain step of 6dB. The other one utilizes a novel current-mode scheme of switching the signal path and is explained as follows.

As shown in Fig. 5.2, a pair of switch transistors Msw1/Msw2 is inserted between the low impedance terminals of the two cascode amplifiers, providing an alternative

Chapter 5 Dual-Band RF Tuner in 0.13μm CMOS

97

path of gain attenuation. Fig. 5.4 illustrates how to achieve high-gain and low-gain by switching this alternative path. When the switch transistors are turned off, the front-end is configured as cascaded two-stage amplifiers, providing a transconductance of gm1RL1gm5 to the input voltage Vin. When the switch transistors are turned on and transistors M_3-6 are all off, the front-end is configured as one single-stage cascode amplifier, giving a transconductance of gm1. As a result, one-step gain attenuation of g_m5R_L1 is achieved. This current-mode scheme effectively reduces the distortions caused by voltage modulation. It avoids large voltage swings across the switch transistors as compared to the conventional voltage switching method.

Moreover, it also substantially helps achieve high linearity by avoiding inter-stage intermodulation since the two cascaded amplifiers are reduced to a single-stage amplifier. In addition to better linearity, this scheme enables negligible loading effect on switch transistor parasitic due to its low-impedance terminations, which alleviates the degradation of operation bandwidth. Another important advantage comes from the fact that no input and output interface is affected after gain switching, so the input matching condition can be maintained well. Furthermore, this scheme also features much better noise performance if compared with the conventional variable load or current steering methods when the gain attenuation becomes much larger. The measured results show that this switched path offers a stepped attenuation of 15dB with a high IIP3 level of +5dBm, improved by 18dB from that at the maximum gain configuration while noise figure degrades only by 6dB in overall receive chain, 9dB better than the conventional pre-attenuation method [51].

As the gain continues to decrease, the input transconductance stage would limit the linearity performance. As this condition occurs, the VGLNA will turn-on the lower path and turn-off the upper path (Fig. 5.3) to extend the dynamic range. It is implemented using the one-step resistor taped attenuator method [55]. Single-ended input is applied to the transconductor of the second-stage amplifier. It provides a -5dB gain attenuation and +15dBm IIP3 to further extend the input dynamic range.

Chapter 5 Dual-Band RF Tuner in 0.13μm CMOS

98 Vsw

VDD

Msw1

Msw2

M1 M2

M3 M4

VB1

VB2

M7 M8

VB4

M5 M6

VB3

vs

vo+

vo- io+ i

o-(a)

VB2

M3 M4

vo+

v

o-M5 M6

VB3

Vsw

VDD

Ron

M1 M2

VB1

M7 M8

VB4

vs

io+ i

o-(b)

Fig. 5.4 Front-end configuration: (a) at high-gain mode, and (b) at low-gain mode.

Chapter 5 Dual-Band RF Tuner in 0.13μm CMOS

99