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InAs-Channel High-Electron-Mobility Transistors for Ultralow-Power Low Noise Amplifier
Applications
View the table of contents for this issue, or go to the journal homepage for more 2009 Jpn. J. Appl. Phys. 48 04C094
(http://iopscience.iop.org/1347-4065/48/4S/04C094)
InAs-Channel High-Electron-Mobility Transistors
for Ultralow-Power Low Noise Amplifier Applications
Chia-Yuan Chang, Heng-Tung Hsu1, Edward Yi Chang, and Yasuyuki Miyamoto2
The Department of Materials Science and Engineering, National Chiao-Tung University, Hsinchu 300, Taiwan, R.O.C.
1The Department of Communication Engineering, Yuan Ze University, Chungli 32003, Taiwan, R.O.C.
2The Department of Physical Electronics, Tokyo Institute of Technology, O-okayama, Meguro-ku, Tokyo 152-8552, Japan
Received October 1, 2008; accepted November 18, 2008; published online April 20, 2009
An InAs-channel high-electron-mobility transistor (HEMT) with an 80 nm gate length for ultralow-power low-noise amplifier (LNA) applications has been fabricated and characterized on a 2-in. InP substrate. Small-signal S-parameter measurements performed on the InAs-channel HEMT at a low drain-source voltage of 0.2 V exhibited an excellent fTof 120 GHz and an fmaxof 157 GHz. At an extremely low
level of dc power consumption of 1.2 mW, the device demonstrated an associated gain of 9.7 dB with a noise figure of less than 0.8 dB at 12 GHz. Such a device also demonstrated a higher associated gain and a lower noise figure than other InGaAs-channel HEMTs at extremely low dc power consumption. These results indicate the outstanding potential of InAs-channel HEMT technology for ultralow-power space-based radar, mobile millimeter-wave communications and handheld imager applications. #2009 The Japan Society of Applied Physics
DOI: 10.1143/JJAP.48.04C094
1. Introduction
Recently, space-based radar, mobile millimeter-wave com-munications, and handheld imagers have attracted consid-erable attention. Such designs favor high-gain and low-power antennas, where prime low-power is limited. Moreover, a large signal-to-noise ratio for feature recognition is also an important characteristic for such systems.1–3)
Excellent RF performance has been demonstrated by InAlAs/InGaAs high-electron-mobility transistors (HEMTs) on InP substrates.4)Generally, higher electron mobility and
velocity can be realized by increasing the indium content in the InGaAs channel, which makes InAs-channel hetero-structure FETs (HFETs) very suitable for low-power and high-speed applications owing to their extremely high electron mobility of more than 30000 cm2/(Vs).5,6)
The superior performance of InAs-channel HEMTs is primarily attributed to their high electron mobility, peak electron velocity, and high sheet carrier density under low bias conditions that result in unparalleled speed-power performance.7–9) As a result, while operating in the V
DS range below 0.5 V, InAs-Channel HEMT is capable of reducing dc power dissipation by an order of magnitude compared with equivalent GaAs pseudomorphic HEMTs and by a factor of 3 – 5 compared with equivalent GaAs metamorphic HEMTs.10) Furthermore, the high-gain and
high frequency responses of InAs-channel HEMTs have made such technology the best candidate for ultralow power low noise applications at very high frequencies, such as space-based radar, mobile millimeter-wave communications, and handheld imager systems.
In this work, an 80-nm-gate-length InAs-channel/ In0:53Ga0:47As sub-channel HEMT for ultralow-dc-power and low noise application is presented. The excellent results clearly indicate the potential of such a device for ultralow-power circuits.
2. Material Growth and Device Fabrication
The schematic of the HEMT structure grown on a 2-in. semi-insulating InP substrate by molecular beam epitaxy (MBE) is shown in Fig. 1. The structure from bottom to top
consisted of a 500-nm-thick In0:52Al0:48As buffer layer, a 3-nm-thick In0:53Ga0:47As lower sub-channel, a 5-nm-thick InAs channel layer, a 2-nm-thick In0:53Ga0:47As upper sub-channel, a 3-nm-thick In0:52Al0:48As spacer layer, a Si -doped (sheet density of 4 1012cm2) layer, a 5-nm-thick In0:52Al0:48As barrier, a 5-nm-thick InP etching stop layer, and a 40-nm-thick Si-doped In0:53Ga0:47As cap (2 1019 cm3). By succinic-acid-based wet etching, room-temper-ature Hall mobility measurement showed a mobility of 9520 cm2V1s1 with electronic sheet density of 2:44 1012cm2.
High-indium-content devices typically suffer from a marked kink effect, low breakdown voltage, and high output transconductance caused by electron–hole pair generation. This phenomenon is even more marked for InAs/AlSb structures because of the lack of hole confinement due to type II alignment.5)In this study, a higher-energy-bandgap InAs/In0:53Ga0:47As heterostructure was used to obtain a lower gate leakage current and a higher breakdown voltage resulting in better device performance.
The InP etching stop layer was used to improve the selectivity of wet chemical recess etching and provide semiconductor surface passivation on each side of the gate to reduce the trapping effect on the InAlAs surface.11)
With the use of the InP etching stop layer, the lateral recess length was easy to control and RF performance was improved.12)
Mesa isolation was carried out by wet chemical etching. Source and drain ohmic metals were formed with 240-nm-Fig. 1. Layer structure of an InAs-channel HEMT grown by MBE on semi-insulating 2-in.-diameter InP substrate.
E-mail address: edc@mail.nctu.edu.tw
Japanese Journal of Applied Physics 48 (2009) 04C094 REGULAR PAPER
thick Au/Ge/Ni/Au and alloyed by rapid thermal annealing at 250C for 30 s. As a result of the highly Si-doped cap, a low ohmic contact resistance (Rc) of 0.025 mm and an sheet resistance (Rsh) of 35.3 / were obtained by the transmission line model method. T-shaped gate lithography was carried out in a 50 keV JEOL electron beam lithography system (E-beam). The gate recess was fabricated by wet chemical etching using succinic-acid-based solution. The Ti/Pt/Au gate metal was formed by evaporation and lift off. The gate length of 80 nm was estimated by scanning electron microscopy (SEM). Devices were passivated using a 100-nm-thick plasma-enhanced chemical vapor deposition (PECVD) silicon nitride film. Finally, the airbridges were formed with 2 mm plated Au.
3. Experimental Results and Discussion
The fabricated device exhibited good low-leakage output current–voltage (I–V) characteristics with an 80 nm gate length and a 2 50 mm2 gate width, as indicated in Fig. 2. This device can be well pinched off with a threshold voltage of 0:7 V. Additionally, a relatively high drain current density of 430 mA/mm and a transconductance of 1120 mS/mm were observed at a low VDSof 0.4 V, primarily due to the superior electron transport properties in the InAs channel.
The S-parameter of the 2 50 mm2 device was measured using a Cascade Microtech on-wafer probing system with a vector network analyzer from 2 to 80 GHz. A standard load-reflection-reflection-match (LRRM) calibration method was used to calibrate the measurement system. Current gain (jh21j2), Mason’s unilateral gain (Ug), and MAG/MSG as a function of frequency are plotted in Fig. 3. The intrinsic fT and fmax of the 2 50 mm2 device are 310 and 330 GHz at VDS ¼0:7 V, respectively. This same device exhibits a peak cutoff frequency fT of 120 GHz and an fmaxof 157 GHz at a drain voltage of 0.2 V with the corresponding dc power consumption as low as 1.2 mW as shown in Fig. 4. Such high-gain and high-frequency responses indicate the poten-tial of the InA-channel HEMT for ultralow-power and high-frequency applications. Figure 5 shows the capability of the InAs-channel HEMT technology for low power applications and the fT= fmax plot with the measured maximum available gain/maximum stable gain (MAG/MSG) at 40 GHz as a function of total dc power consumption. Note that the saturation in performance is observed at higher drain bias levels, possibly caused by the occurrence of impact ioniza-tion for small-energy-bandgap materials. The minimum noise figure and associated gain of the InAs-channel HEMT from 2 to 18 GHz at a VDS of 0.2 V with a dc power dissipation of 1.2 mW are shown in Fig. 6. The device
0.0 0.1 0.2 0.3 0.4 0.5 0 100 200 300 400 500 600 700 -0.8 0 200 400 600 800 1000 1200 Vd = 0.3V Vd = 0.4V Vd = 0.2V Vd = 0.1V T ransconductance (mS/mm) Gate Voltage (V) Vg= -0.8 V Vg= -0.6 V Vg= -0.4 V Vg= -0.2 V Vg= 0 V
Drain Current (mA/mm)
Drain-Source Voltage (V)
-0.6 -0.4 -0.2 0.0
Fig. 2. (Color online) Current–voltage characteristics of 0:08 100 mm2InAs-channel HEMT. 1 0 10 20 30 40 50 60 2 MAG/MSG VD= 0.7 V ID= 31.8 mA Pd= 22.3 mW fmax = 330 GHz ft= 310 GHz Gain (dB) Frequency (GHz) h21 10 100 1000 Ug
Fig. 3. (Color online) Typical current gain jh21j, MAG/MSG and Ug
as a function of frequency for a 0:08 100 mm2InAs-channel HEMT.
VDSis 0.7 V and the dc power is 22.3 mW.
1 0 10 20 30 40 50 2 MAG/MSG VDS= 0.2 V ID= 6.2 mA Pd= 1.2 mW fmax = 157 GHz ft= 120 GHz Gain (dB) Frequency (GHz) 10 100 1000 h21 Ug
Fig. 4. (Color online) Typical current gain jh21j, MAG/MSG and Ug
as a function of frequency for a 0:08 100 mm2InAs-channel HEMT
for ultralow-power operation. VDSis 0.2 V and dc power is 1.2 mW.
0 5 10 15 20 25 0 50 100 150 200 250 300 350 MAG/MSG fT, fmax VDS = 0.1V, 0.2V, 0.3V, 0.4V and 0.7V f T f max DC Power Consumption (mW) fT , fmax (GHz) 0 5 10 15 20 25 30 35 MA G/MSG (dB) 40 GHz MAG/MSG
Fig. 5. (Color online) RF performance figures of merit as a function of dc power consumption for a 0:08 100 mm2InAs-channel HEMT.
Jpn. J. Appl. Phys. 48 (2009) 04C094 C.-Y. Chang et al.
demonstrated a typical associated gain of 9.7 dB with a noise figure of less than 0.8 dB at 12 GHz. The same device shows a higher gain of 14.7 dB and a lower minimum noise figure of 0.29 dB at 12 GHz when biased at a higher VDSof 0.5 V as shown in Fig. 7. Operations at different low bias voltages with different total dc power dissipations are also shown in Fig. 8, where possible tradeoffs between the performance and the dc power consumption can be made depending on the applications.
4. Conclusions
In this study, a promising candidate for ultralow-power and high-frequency applications has been demonstrated. A high fT of 120 GHz and an fmax of 157 GHz were obtained at a very low bias of 0.2 V VDSand a low dc power consumption of 1.2 mW. At such a low bias, the device achieved a 9.7 dB associated gain and a noise figure of less than 0.8 dB at 12 GHz. With the high gain and low noise figure at an extremely low dc power consumption, the InAs-channel
HEMTs showed tremendous potential for low-power and low-noise applications.
Acknowledgements
This work was supported in part by the National Science Council under Contract NSC 96-2752-E-009-001-PAE by the Ministry of Economic Affairs, Taiwan, R.O.C., and under Contract 95-EC-17-A-05-S1-020 and by the ‘‘Nano-technology Network Project’’ of the Ministry of Education, Culture, Sports, Science and Technology (MEXT), Japan.
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10 1 -1 0 1 2 3 4 VDS= 0.2, Pd= 1.2 mW f = 2 - 18 GHz 30 20 Frequency f (GHz) Noise Figure NF (dB) 0 5 10 15 20 25 NF Associated Gain Ga (dB)
Fig. 6. (Color online) Measured minimum noise figure and associ-ated gain of a 0:08 100 mm2InAs-channel HEMT from 2 to 18 GHz
at VDSof 0.2 V with a dc power dissipation of 1.2 mW.
0 5 10 15 20 25 30 -1 0 1 2 VDS= 0.5V f = 12 GHz Ga NF Power Dissipation (mW) 0 5 10 15 20 Noise Figure NF (dB) NF Associated Gain Ga (dB)
Fig. 7. (Color online) Measured minimum noise figure and associ-ated gain of a 0:08 100 mm2InAs-channel HEMT at 12 GHz as a
function of dc power consumption at a higher VDSof 0.5 V.
0.1 -5 0 5 10 15 20 25 30 NF Gain Vds=0.1V Vds=0.2V Vds=0.3V Vds=0.4V Vds=0.5V Power Consumption (mW) Noise Figure (dB) -30 -25 -20 -15 -10 -5 0 5 10 15 20 Associated Gain (dB) 1 10
Fig. 8. (Color online) Measured minimum noise figures and asso-ciated gains of a 0:08 100 mm2InAs-channel HEMT at different V
DS
from 0.1 to 0.5 V with different total dc power dissipations at 12 GHz.
Jpn. J. Appl. Phys. 48 (2009) 04C094 C.-Y. Chang et al.
