應用鈦/氮化鎢/鈦/銅多層金屬以供砷化鎵低噪音假晶高電子遷移率電晶體中銅空氣橋的薄金屬系統之研究
全文
(2) 應用鈦 /氮 化 鎢 /鈦 /銅 多 層 金 屬 以 供 砷化鎵低噪音假晶高電子遷移率電晶體中 銅空氣橋的薄金屬系統之研究 Use of Ti/WNx/Ti/Cu multilayer as thin metal system for copper-airbridged GaAs LN-PHEMTs. 研 究 生:董福慶. Student: Fu-Ching Tung. 指導教授:張. Advisor: Dr. Edward Yi Chang. 翼 博士. 國立交通大學 材料科學與工程研究所 碩士論文. A Thesis Submitted to Department of Materials Science and Engineering College of Engineering National Chiao Tung University In Partial Fulfill of the Requirements For the Degree of Master of Science In Materials Science and Engineering July 2004 Hsinchu, Taiwan, Republic of China. 中華民國九十三年七月.
(3) 應用鈦/氮化鎢/鈦/銅多層金屬以供 砷化鎵低噪音假晶高電子遷移率電晶體中 銅空氣橋的薄金屬系統之研究 研究生:董福慶. 指導教授:張 翼 博士. 國立交通大學材料科學與工程研究所. 摘要. 本實驗使用新的多層結構鈦/氮化鎢/鈦/銅做為薄金屬系統以供砷化鎵元件 的銅金屬空氣橋之研究。其主要目的在於為了減少砷化鎵元件的生產成本與提供 內導線較佳的電性,而找出一個具有良好黏著性可靠的阻障層結構以應用於砷化 鎵元件的銅金屬化導線中。 在本實驗中,空氣橋製作上使用氮化鎢作為銅導線高電子遷移率電晶體之擴 散障礙層,這是由於氮化鎢和傳統製程上有高度的相容性。在此鈦/氮化鎢/鈦/ 銅結構中,使用濺鍍氮化鎢作為擴散障礙層並使用鈦金屬作為附著層以避免在金 與氮化鎢及銅與氮化鎢之間產生剝落問題。並且在空氣橋導線上鍍上一層氮化矽 膜以防止銅表面氧化。接著,試片放入空氣中高溫退火以研究元件的熱穩定性。 我們也完成了最佳選擇性蝕刻製程應用於銅空氣橋製造中的鈦/氮化鎢/鈦/銅多 層結構薄金屬系統中。 本實驗成功發展了使用鈦/氮化鎢/鈦/銅多層薄金屬系統製作的銅空氣橋導 線之砷化鎵低噪音假晶高電子遷移率電晶體。其元件電性優於僅使用氮化鎢/銅 為薄金屬結構的元件,並可與傳統金導線砷化鎵元件媲美。 製作出來的低噪音砷化鎵假晶高電子遷移率電晶體在操作頻率為一萬七千. I.
(4) 兆赫時,元件雜訊指數最低可達零點九六分貝、相關增益值可達十點六八分貝在 Vds=1.5 伏特和 Vg = -0.5 伏特偏壓下。經過攝氏兩百度的高溫退火三個小時以 後,銅金屬以及下層的接觸金屬間並沒有金屬原子交互擴散的現象;元件特性在 經過熱退火以後並未產生明顯的變化。並且等效電路模型顯示出鈦黏著層減低了 元件的源極阻抗。 最大的獲益在於鈦/氮化鎢/鈦/銅多層結構提高了元件在製程中的良率;主要 是因為鈦層提供了良好的黏著性,並解決了銅空氣橋導線在砷化鎵 PHEMT 元件 中剝落的問題。. II.
(5) Use of Ti/WNx/Ti/Cu multilayer as thin metal system for copper-airbridged GaAs LN-PHEMTs. Student: Fu-Ching Tung. Advisor: Dr. Edward Yi Chang. Department of Materials Science and Engineering National Chiao Tung University. Abstract. In this work, a new multilayer Ti/WNx/Ti/Cu thin metal system was used for the study of copper-airbridged GaAs devices. The attempt is to find a reliable diffusion barrier structure with good adhesion for copper metallization of GaAs devices in order to reduce the production cost of the GaAs devices and to provide better thermal and electrical performances. For airbridge fabrication, tungsten nitride was chosen as the diffusion barrier for copper-airbridged pseudomorphic high electron mobility transistor (PHEMT) due to its compatibility with the conventional airbridge process. In Ti/WNx/Ti/Cu structure, sputtered WNx was used as the diffusion barrier and Ti was used as the adhesion layer to avoid the peeling problem between Au/WNx and Cu/WNx. And silicon nitride film was deposited on the copper airbridges to prevent copper surface from oxidation. Then, the samples were annealed at high temperature to investigate the thermal stability of the copper metallized devices. We also developed the optimal selective etching processes for etching the thin metal system of Ti/WNx/Ti/Cu multilayer scheme in the copper airbridge fabrication. A gallium arsenate (GaAs) PHEMT with copper airbridge using of Ti/WNx/Ti/Cu multilayer as the thin metal system was successfully developed and the. III.
(6) electrical performance of these devices were better than those only using WNx/Cu scheme and are comparable to those with the conventional gold airbridges. When tested at 17 GHz, the fabricated low noise GaAs PHEMT had the lowest noise figure of 0.96 dB and the associated gain was 10.68dB under Vds=1.5 V and Vg = -0.5 V. After thermal annealing at 2000C for 3 hours there’s no atomic interdiffusion between copper and underlying contact metals and the devices showed little change in device performance. The equivalent circuit modeling shows the Ti adhesion layer decreases the source resistance of the devices. And the most benefit is that the Ti/WNx/Ti/Cu scheme improves the yield of the devices because the Ti layer provides good adhesion and solves the copper airbridge peeling problem in GaAs PHEMTs.. IV.
(7) 誌 謝 (Acknowledgement). 首先感謝指導教授張翼博士的悉心指導,也要感謝張晃崇學長對於實驗製 程及量測技術上的協助與支持。由於 CSD Lab. 連亦中學長、吳偉誠學長、黃瑞 乾學長、謝炎章學長、謝東霖同學與系上麥威方先生、NDL 孫旭昌先生、郭美 玲小姐及台大黃玲蓉小姐等在實驗上與量測上的幫忙協助,才得以順利完成此篇 論文,對於他們的幫助深感於心。 其次感謝工研院機械所蔡新源所長、陳正副所長、莊慶旺組長、梁沐旺經 理與黃振榮博士等長官們的厚愛與鼓勵,得以完成此學業。也要謝謝曾博、世明、 小曾與致誠在計畫上之協助與陪伴。 另外也要感謝李承士博士、陳仕鴻博士、李澤倫先生、張尚文學長、陳克 弦學長、徐金鈺學長與楊宗熹學長們的熱忱提攜與無私幫助,得以在學習上有所 進步,在此深深的感激。當然阿桃、阿堯、宜瑄、昭偉與協鑫等同學們的陪伴與 莊惠菁小姐的幫忙,令人難忘。 最後,要感謝我最親愛的家人:爸爸、媽媽、大哥大嫂、二哥二嫂,當然, 還有我的妻子與三個小寶貝,謝謝你們,謝謝!謹以此論文獻給我摯愛的妻子與 三個孩子們。. V.
(8) Contents Abstract (Chinese)………………………………………………………Ⅰ Abstract (English)…………………………………………….…………Ⅲ Acknowledgement………………………………………….…………...Ⅴ Contents………………………………………………………..………..Ⅵ Table Captions…………………………………………………………..Ⅷ Figure Captions…………………………………………………………Ⅸ Chapter 1 Introduction…………………………………………………..01 Chapter 2 Paper Review………………………………………….……..05 Chapter 3 Experiments………………………………………………….09 3.1 Comparison between Gold Airbridge and Copper Airbridge Process…………………………………………………………09 3.2 Copper Airbridge Process Flow………………………..….……10 3.2.1 The First Photolithography for Cu Airbridge Process……...11 3.2.2 Thin Metal Deposition…..………………………………….12 3.2.3 The Second Lithography for Cu Airbridge Process.…….....13 3.2.4 Copper Electroplating……….…………….……………….14 3.2.5 Second PR. Removal and Thin Metal Etch………………...16 3.2.6 The First PR. Removal……………………………..………18 3.2.7 Silicon Nitride Passivation...…….…………………………19 3.3 Measurements………………………………………….…….....19 3.3.1 DC Measurements……………………………….….……...19 3.3.2 RF Measurements…………………….………………….....20 Chapter 4 Results and Discussions……….……………………….…….27 4.1 Thin Metal Etching……………………………………….…….27 4.2 AES Depth Profile Analysis…………………….…….………..30 4.3 X-ray Diffraction Patterns (XRD)………………..……….……31. VI.
(9) 4.4 Adhesion Layer…………………………………………………32 4.5 DC Characteristics……..……………………………………….34 4.6 RF Characteristics………………………………………..……..35 4.6.1 S-parameters Measurement………..………………….……35 4.6.2 Equivalent Circuit Model……………………………..……36 4.6.3 Noise Figure………………………………………………..39 4.6.4 The Unity-Current-Gain Cut-off Frequency ..……………..40 Chapter 5 Conclusions…………………………………………………..41 References………………………………………………………………44 Tables……………………………………………………………………50 Figures…………………………………………………………………..54. VII.
(10) Table Captions Table 2-1: Performance of Barrier Layers. Table 2-2:Surface energy (J.m-2) at melting temperature of gold, tungsten, titanium and chromium Table 3-1 Comparison between gold airbridges and copper airbridges process Table 4-1 Cu surface roughness change with various solution ratios Ⅰ Table 4-2 Cu surface roughness change with various solution ratios Ⅱ. VIII.
(11) Figure Captions Figure 1-1 The peelings of the plating metal of LN-PHEMT with only WNx/Cu as the thin metal. Figure 1-2a Au-W phase diagram Figure 1-2b Cu-W phase diagram Figure 2-1 Phase evolution of amorphous WNx films with annealing temperature for various nitrogen contents.(a)Amorphous phase WNx. Figure 2-2 Solder-joint pull-strength values measured for test samples with various BLM systems. Fig. 3-1 Process flow for copper airbridges Fig. 3-2 Major steps of the Cu airbridge process Figure 3-3 The SEM photo of the finished Cu airbridge Figure 3-4 Distribution diagram of electroplating additives Figure 3-5 The copper surface by various current density (Metal Thickness: 3 µm and Magnification: 5000X) Figure 3-6 Incident and reflected waves from a two-port network Figure 3-7 Small signal equivalent circuit physical relationship to the pHEMT structure Figure 3-8 The pHEMT small signal equivalent circuit Figure 4-1a The Cu metal surface roughness differences (Å angstrom) with various ratios of copper etchant Figure 4-1b The Cu metal surface roughness (Å angstrom) with various ratios of copper etchant Figure 4-2 Copper airbridge schemes with the thin metal removed process parameters Figure 4-3 WNx protruded at the bridge edges by using NH4OH/H2O2/H2O etching. IX.
(12) Figure 4-4 The profile of Cu airbridge used of H2SO4/ H2O2/ H2O etching Figure 4-5a AES depth profiles of the as-deposited Ti/WNx/Ti/Cu multilayer scheme. Figure 4-5b AES depth profiles of the Ti/WNx/Ti/Cu multilayer scheme after 300°C annealing for 30min. Figure 4-5c AES depth profiles of the Ti/WNx/Ti/Cu multilayer scheme after 400°C annealing for 30min. Figure 4-6 XRD patterns of the Ti/WNx/Ti/Cu multilayer system after thermal annealing of different temperature for 30min. Figure 4-7 Au-Cu phase diagram Figure 4-8a~c The uniformities of transconductance with various thin metal devices a). The average transconductance of Cu airbridged devices using WNx/Cu as thin metals b). The average transconductance of Cu airbridged devices using Ti/WNx/Ti/Cu as thin metals c). The average transconductance of Au-airbridged devices using Ti/Au/Ti as thin metals Figure 4-9a~c The uniformities of pinch-off voltage with various thin metal devices a). The average Vp of Cu airbridged devices using WNx/Cu as thin metals b). The average Vp of Cu airbridged devices using Ti/WNx/Ti/Cu as thin metals c). The average Vp of Au airbridged devices using Ti/Au/Ti as thin metals Figure 4-10a The drain I-V characteristics of copper-airbridged LN-PHEMTs with Ti/WNx/Ti/Cu as the thin metal system before and after 200℃ 3 hours thermal annealing in the air. (Ti as the adhesion layer) Figure 4-10b The transconductance (Gm) of copper-airbridged LN-PHEMTs with Ti/WNx/Ti/Cu as the thin metal system before and after 200℃ 3 hours thermal annealing in the air. (Ti as the adhesion layer) X.
(13) Figure 4-11a Drain I-V characteristics for copper-airbridged LN-PHEMT with only WNx/Cu as the thin metal system. Figure 4-11b The dependence of the transconductance (Gm) on the gate bias voltage for copper-airbridged LN-PHEMT with only WNx/Cu as the thin metal system. Figure 4-12a S21, S12 polar chart of Cu-airbridged LN-PHEMT with Ti/WNx/Ti/Cu before thermal annealing Figure 4-12b S11, S22 Smith chart of Cu-airbridged LN-PHEMT with Ti/WNx/Ti/Cu before thermal annealing Figure 4-12c S21,S12 polar chart of Cu-airbridged LN-PHEMT with Ti/WNx/Ti/Cu after thermal annealing of 200℃ for 3 hours Figure 4-12d S11,S22 Smith chart of Cu-airbridged LN-PHEMT with Ti/WNx/Ti/Cu after thermal annealing of 200℃ for 3 hours Figure 4-13a The comparison of S21, S12 between before and after thermal annealing (polar chart) Figure 4-13b The comparison of S11, S22 between before and after thermal annealing (Smith chart) Figure 4-14 The magnitude of S21 before and after thermal annealing Figure 4-15 The magnitude of S12 before and after thermal annealing Figure 4-16 The small signal equivalent circuit model of LN-PHEMT Figure 4-17a The calculated s-parameters of equivalent circuit model are fitted to the measured s-parameters of Au-airbridged devices. (Bias point:Vg:0 V, Vd:1.5 V) Figure 4-17b The calculated s-parameters of equivalent circuit model are fitted to the measured s-parameters of Cu-airbridged PHEMT with WNx/Cu. (Bias point:Vg:-0.3 V,Vd:1.2 V) XI.
(14) Figure 4-17c The calculated s-parameters of equivalent circuit model are fitted to the measured s-parameters of Cu-airbridged PHEMT with Ti/WNx/Ti/Cu before thermal annealing. (Bias point:Vg:0.2 V,Vd:2 V) Figure 4-17d The calculated s-parameters of equivalent circuit model are fitted to the measured s-parameters of Cu-airbridged PHEMT with Ti/WNx/Ti/Cu after thermal annealing. (Bias point:Vg:-0.2 V,Vd:1.5 V) Figure 4-18a The thermal stability of the noise performance of the copper-airbridged LN-PHEMT with Ti/WNx/Ti/Cu multilayer as the thin metal system. (Bias: Vd=1.5V, Vg=-0.5V) Figure 4-18b Noise figure and associated gain against frequency for copper-airbridged LN-PHEMT with only WNx/Cu as the thin metal system. Figure 4-19 The cut-off frequency of the LN-PHEMTs before and after thermal annealing at 200℃ for 3 hours. (Bias: Vd=1.5 V, Vg= -0.2 V) Figure 4-20 The cut-off frequency of the LN-PHEMTs with various airbridges processes.. XII.
(15) Chapter 1 Introduction Airbridge process is widely used as the interconnect technology in the fabrication of III-V devices and monolithic microwave integrated circuits (MMICs). This technology is used to cross another metal layer or to connect two sources ends. Their characteristics include the lower parasitic capacitance resulted from the low dielectric constant of air and the ability to carry substantial currents. Traditionally, plated gold was employed for airbridges on the high electron mobility transistors (HEMTs). Gold is extensively used for GaAs device fabrication, mainly owing to its high electrical conductivity and relative chemical inertness [1]. However, gold is expensive, which causes the high cost for the GaAs device fabrication. Gold electroplating is also a more dangerous process. Most gold plating baths utilize a gold cyanide complex. Potassium gold cyanide, KAu(CN)2, is often the source of the gold cyanide complex. It is poisonous and harmful to health, especially to the operator. Now, non-cyanide gold plating baths have been developed. But non-cyanide gold plating bath may degrade after using for one year. The quality of the plated gold becomes worse. The used plating bath may be thrown away and affects the environment. It is an unsolved problem now. Various different materials can be the candidates for interconnect metallization. 1.
(16) in the fabrication of integrated circuits (ICs). Gold and copper both have low resistivity (2.2µΩ-cm for Au; 1.67µΩ-cm for Cu), and they provide high endurance against electromigration resulting in failure [2]. Recently major semiconductor companies have widely employed copper as interconnection materials of the ultralarge-scale integration (ULSI) circuits [3-7]. This is principally because of its low resistivity of Cu (1.67µΩ-cm), resulting in a lower RC time delay, and potential enhancements in electromigration and stress resistance [8, 9], which can improve the device performance. Two key issues should be known for Cu interconnections though. They are: 1) Necessity of a thin barrier layer to block Cu diffusion arising in narrow, high aspect-ratio structures. 2) Forbidden the oxidation of Cu surface [10]. In prior work, we use WNx as the diffusion barrier between Cu and GaAs, which was successfully applied to the Cu metallization of the airbridge interconnects of the AlGaAs/InGaAs low noise pseudomorphic high electron mobility transistors (LN-PHEMTs) [11]. Electroplating 2.5-µm copper on the thin layers of the sputtered Cu seed layer formed copper airbridges and the WNx barrier layer on the gold contacted PHEMTs. The copper plating bath is a copper sulfate based solution (CuSO4.5H2O), and it may be recycled. It affects the environment less than the gold. 2.
(17) plating bath does. Nevertheless, we found that the airbridges were peeled off the Au metal pad and Si3N4 passivation layer in the sample, as shown in Figure 1-1. The adhesion between separately Au/WNx and WNx/Cu is not good because the Au-W phase diagram shows the absence of any intermetallic compounds of Au and W, and WNx would not form compounds with copper (Figure 1-2 a~b). As we sampled 72 dies randomly to measure the electrical performance, there are 27 dies failed. The yield was about 62.5%. The airbridges were also easily peeled off the dies when processing in an ultrasonic tank with ultrasonic vibration for removing the first via photoresist. The process needed to be more carefully controlled to avoid the airbridges broken. In this work, we have built the new multilayer systems Ti/WNx/Ti/Cu as the thin metal for the study of copper airbridges of GaAs devices to assure the film with good adhesion and diffusion barrier properties. Copper replaces gold as the interconnect material used for the airbridges in the GaAs PHEMTs and WNx was used as the diffusion barrier. Additionally, we inserted Ti thin films between Au/WNx layers and between WNx/Cu layers respectively. The goal of the study is to find a reliable diffusion barrier with good adhesion for copper metallization of GaAs devices in order to reduce the production cost of the GaAs devices and to provide better thermal and electrical conductivities for the interconnects. And plasma-enhanced. 3.
(18) chemical vapor deposition (PECVD) silicon nitride film was deposited on the copper airbridges to prevent copper surface from oxidation. Then, the samples were annealed at higher temperature to investigate the thermal stability of the devices. The copper-airbridged low noise PHEMT fabricated by using the Ti/WNx/Ti/Cu multilayer system has shown good electrical characteristics. The following chapters will discuss the details of the fabrication process and device performance.. 4.
(19) Chapter 2 Paper Review The barrier layer must be as thin as possible not to affect interconnect resistance while still acting as a good barrier against Cu diffusion. Otherwise, the copper would diffuse into GaAs to form a variety of deep levels and reduce the minority-carrier lifetime, which results in degradation of the device performance [12]. Barrier materials need to satisfy some demands. These are: a. prevent efficient diffusion of metals through the barrier layer b. not react with the interconnecting metal or underlying material c. be stable during the manufacturing and operation of the device d. have low electrical resistivity e. have a good adhesion to the underlying material and the deposited metal layer. Refractory metals may be the good choice as a diffusion barrier because of their high melting point and lower solubility in copper even though in high temperature. However, when using a single diffusion barrier metal, like Cu/Ti/Si, the sheet resistance will increase rapidly at a 400℃ annealing. It was shown the copper diffused into the silicon to form copper-silicide. Therefore, refractory metal nitrides such as TiN, TaN and WNx have been investigated. These transition metal nitrides. 5.
(20) have high melting points, relatively high thermal stability, and chemical inertness. Some investigations have been reported (Table 2-1) [13]. Most barrier materials are stable with Cu up to 550°C and provide sufficient thermal stability for current metallization processes. We choose the WNx with lean nitrogen content as the diffusion barrier layer for the fabrication of the LN-PHEMT devices. There are some reasons for this decision. They are: a. WNx thin film is a very good oxygen diffusion barrier material. b. WNx thin film is electrically conductive (~ 200 to 600 µΩ-cm). c. WNx is thermally and mechanically stable –W & N generally do not chemically interact with copper, making WNx extremely stable up to 700°C. d. WNx thin film with lean nitrogen content has amorphous microstructures (Figure 2-1), which can be protective against Cu diffusion effectively [14]. e. WNx thin film is easily patterning by available process equipments and compatible with current process, while tantalum (Ta) is a new material and process. f. WNx has a better etching selectivity than TiN and TaN with using appropriate etchants for thin metal system removal. As described in the chapter 1, we observed the problem of the copper airbridges. 6.
(21) peelings off the gold contacts. Further investigation is needed to develop the best barrier system for the Cu interconnects. It is probable that a multilayer system, similar to Ti/TiN for Al interconnects, is required. Conventionally, an intermediate metal film (Ti, Cr, and W) deposited between gold and oxide substrate may improve the adhesion. Gold wets tungsten, titanium and chromium because its surface energy is lower compared to that of these three metals (Table 2-2) [15]. Ti and Cr are widely used as the adhesion film for ball-limited-metal (BLM) system under solder bumps. For flip-chip interconnections, Ken’ichi Mizuishi et al. have introduced the mechanical pull-strength of BLM layers formed under controlled-collapse solder bumps [16]. Mechanical pull-strength values of solder-bump joints were shown in Figure 2-2. The BLM systems with Ti adhesive metal showed generally higher solder-joint strength than those with Cr, independent of the barrier metal used. And greater solder-joint strength appeared in the order of Ni, Pt, Pd, and Mo with the same adhesive metal. Therefore, we decided to use Ti as the adhesion layer for our multilayer system. We have established a new multilayer thin metal system with metal scheme of Ti/WNx/Ti/Cu for solving the adhesion problem. The reason is that the adhesion is good between Ti and Au layers because Ti diffuses into Au fast, producing Au-rich. 7.
(22) intermetallic compounds [17]. The Ti /Au/Ti thin metal scheme is the traditional airbridges process in GaAs devices. F. C. T. SO et al. introduced that nitrogen in the W-N layer redistributes into Ti after annealing at 550 ℃ in the Si/Ti/WNx/Al samples [18]. For the Ti/WNx interface, it showed that the Ti layer reduces WNx content to W and forms a good adhesion Ti-N interface. About the Si3N4/Ti interface, T. W. Orent et al. found that Ti reduced the silicon nitride to produce TiN and free Si during deposited process[19]. Kazuhide Abe et al. introduced a Ti/TiN/Ti/Cu (similar to our Ti/WNx/Ti/Cu) layered damascene interconnects to investigate the electromigration reliability compared with the traditional scheme of Ti/TiN/ Cu [20]. The Cu damascene interconnects with inserted Ti layer show up to 100 times longer electromigration lifetime than those without Ti inserted. From the materials study of the silicon ultralarge-scale integration (ULSI) technology in these papers, we think the Ti/WNx/Ti/Cu scheme should improve the adhesion of the airbridges efficiently, and would be suitable for the development of copper-metallized airbridges on GaAs PHEMTs.. 8.
(23) Chapter 3 Experiments 3.1 Comparison between Gold Airbridge and Copper Airbridge Process Conventionally, the interconnect metal of III-V devices was gold. We tried to use copper instead of gold for the fabrication of airbridges. Electroplating is usually adopted for bridge structure fabrication. Electroplated metals result in higher electromigration resistance than evaporated or sputtered metals [21]. Copper produced by plating has larger grain size with reduced grain boundaries, which reduces the electromigration. As indicated above, gold airbridges need an adhesion layer Ti to enhance the adhesion to other dielectric materials [22]. Gold is resistant to oxidation, so it does not need the silicon nitride passivation. However, the copper airbridges need not only the adhesion layer but also the diffusion barrier layer to prevent the copper diffusion. And it requires the adhesion and conducting seed layer for the subsequent copper electroplating. Finally the copper airbridges need a passivation layer of silicon nitride to prevent the copper surface oxidation. So, there are some differences between the gold airbridge and the copper airbridge processes, which are shown in Table 3-1.. 9.
(24) 3.2 Copper Airbridge Process Flow Copper airbridges process flow is shown in Fig.3-1. A layer of resist is spun and patterned to form open areas over metal pads by removing the nitride layer on the pads. Then, various thin layers of metal, which include adhesion layer, diffusion barrier, and adhesion/conducting seed layers, are deposited sequentially on the entire wafer. A second coating of resist is applied and patterned subsequently. The wafer is then electroplated, the thin metal layer conducting the plating current through all parts of the wafer. After electroplating, the top resist, thin metals, and lower resist were removed, and the plated bridges were formed. In order to enhance the adhesion between the WNx and the Au layer, we established the multilayer system, Au / Ti /WNx /Ti /Cu / EP (Electroplated) Cu /Si3N4, for the fabrication of the airbridges. The metal layers in the Ti /WNx /Ti /Cu structure were called the thin metal layers because their thickness was very thin. The metals in the multilevel system were deposited by three different methods. The first level thin metal layers (Ti /WNx) were deposited by sputtering. The second level thin metal layers (Ti /Cu) were deposited by evaporation. The final third level metal layer (Ep. Cu) was then electroplated to form the copper airbridges. Finally the passivation layer Si3N4 was deposited by PECVD. In the following sections, we will describe the copper airbridge process in detail. The major steps of copper airbridge process are. 10.
(25) shown in Figure 3-2. Figure 3-3 shows the SEM photo of the finished Cu airbridge.. 3.2.1 The First Photolithography for Cu Airbridge Process 3.2.1.1 Wafer Clean The wafer cleaning process includes 1) immersed in acetone for 5 minutes, 2) immersed in IPA for 5 minutes, and then followed by drying in nitrogen.. 3.2.1.2 PR. Coating First, a spin rate of 1000 rpm was used for 10 seconds to spread the resin (S1818 PR.) on the substrate, then, a 45 seconds spin at a rate of 3000 rpm was used to achieved a good uniformity of photoresist thickness across the wafer. The total thickness of the PR.was about 2.5μm.. 3.2.1.3 Soft Bake The sample was heated on a hot plate at 90°C for 120 seconds to drive out the rest solvent.. 3.2.1.4 Exposure Karl Suss MJB3 I-line (405nm) aligner was used to expose the PR. with a lamp power of 225mJ/cm2.. 11.
(26) 3.2.1.5 Development The samples after exposure were immersed into the developer (FHD5) for 20 seconds at room temperature and followed by D.I. water rinse and nitrogen drying.. 3.2.1.6 Descum This step is to remove the thin PR residues in the developed region by O2 plasma process. The descum condition was 100W for 1 minute with O2 of 45 sccm at 60 mTorr by the STS inductive coupling plasma (ICP).. 3.2.1.7 Hard Bake The wafer was then baked on a hot plate immediately after the ICP descum. This served to further dry the film and to stabilize the sidewall of via. On the other hand, the first photo resist must be sufficiently baked to avoid the “bubbling” after thin metal deposition and the later hot bake of the second layer photoresist. In this process, the wafer was baked at 133°C for 10 minutes.. 3.2.2 Thin Metal Deposition The thin metal structure of the copper airbridges was Ti/WNx/Ti/Cu with WNx as the barrier layer which was deposited by sputtering. The thickness of the adhesion layer of Ti was 300 Å deposited by sputtering. Ti/Cu layers, which used. 12.
(27) as the adhesion and the conducting seed layer for the subsequent copper electroplating, were deposited by evaporation. The barrier metal must also be deposited continuously as a good conformal seed layer for void-free electroplating of copper [23, 24]. The thicknesses of the four metal layers were 300 Å, 400 Å, 300 Å, and 1000 Å, respectively, from bottom to top.. 3.2.3 The Second Lithography for Cu Airbridge Process 3.2.3.1 Photoresist Coating Positive photoresist S1818 was coated on the thin metal system. First, a spin rate of 1000 rpm for 10 seconds is used to spread the resin out from the center of the substrate. Second, a high-speed (3000 rpm) spin for 45 seconds is used to improve the uniformity. The thickness is about 2.5μm.. 3.2.3.2 Soft Bake The soft bake was at 90°C for 3 minutes on a hot plate.. 3.2.3.3 Exposure The coated S1818 was exposed by I-line aligner with 405nm wavelength and 360mJ/cm2 lamp power.. 3.2.3.4 Development The wafer was immersed in the developer (FHD5) for 20 seconds at. 13.
(28) room temperature, followed by rinsing in D.I. water and then drying in nitrogen.. 3.2.3.5 Descum Descum was performed by using O2 gas which usually results in a smooth surface on the developed region after descum process. The descum condition was 100W for 1 minute with O2 of 45 sccm at 60 m Torr by ICP.. 3.2.3.6 Hard Bake The wafer was then baked on a hot plate. In this process, the wafer was baked at 105°C for 5 minutes.. 3.2.4 Copper Electroplating So far, the popular copper plating bath in semiconductor industry is sulfuric acid/copper sulfate based solution; the function of CuSO4.5H2O is the source of Cu ions; H2SO4 will raise the electrical conductivity of electrolyte and stabilize the concentration change between cupric and cupreous ions; Cl- will enhance the deposition of cupreous ions in order to generate better electroplated layers; and the function of electroplating additives is to wet the substrate surfaces and to enhance/inhibit the surface electricity. Suitable additives could enhance the quality, uniformity and filling performance of electroplated layer. At present, additives of cupric sulfate electroplating solution could be. 14.
(29) separated into three categories described as follows: 1. Dispersion agents or carriers (suppressors) :Able to be adhered or dispersed on the surface of the electroplated substrates, to inhibit the deposition rate, and lower the surface tension of solutions, to raise wetting effect, and to improve the micro-distributing ability. 2. Accelerators:Easy to be absorbed by cathodes, replacing local dispersion agents or carriers, to speed up electroplating rates of certain areas. Meanwhile, it can also decrease the crystal size and improve the physical properties of electroplated layers. 3. Levelers:It can be absorbed and replace certain carriers and accelerators in specific high-electricity areas. The deposition rate of the area absorbed by the levelers will be dramatically decreased. We can get smooth surface by well controlling the levelers. The best performance can be achieved by well control the ratio of above three kinds of additives (as shown in the Figure 3-4) [25]. We used the copper-plating bath from the MERCK Company, which provides superior performance of the surface flatness and roughness of the copper airbridges after electroplating. It is important for the RF signal transferring in the high frequency devices. The processes for the copper plating are described below.. 15.
(30) 1) Cleaning The wafer was dipped in diluted sulfuric acid to remove the surface copper oxide. The wafer is usually dipped in the diluted sulfuric acid (1:10) for 5 seconds. 2) Copper Plating Electroplated Cu is applied on Cu airbridge to generate a thick metal layer of interconnects to provide high conductivity interconnects. The thickness of the electroplated Cu is typically 2 to 2.5µm. As a result, the current density of the copper electroplating used was 1 ASD (A/dm2). The plating time was 10 minutes for a 2.5μm thick plated copper. (Where dm=10cm.) As shown in Figure 3-5, the plated copper surface is the smoothest by using 1ASD current densiiiity.. 3.2.5 Second PR. Removal and Thin Metal Etch 3.2.5.1 Second PR. Remove Each specimen was dipped in acetone (ACE) for 30 seconds. And then the specimens were rinsed in D.I. water for 1 minute and dried by nitrogen blowing.. 3.2.5.2 Thin Metal Etch for Cu Airbridges The thin metal that we used for Cu airbridges is Ti/WNx/Ti/Cu, plated on the Au pads from bottom to top. This is a multilayer system, and it needed to be removed by selective etching with appropriate etchants at room temperature. 16.
(31) about 24℃. The detailed process of thin metal etch is as follows. 1) After the second photoresist was removed, the wafer was dipped in diluted sulfuric acid to remove the surface copper oxide. The wafer is usually dipped in the diluted sulfuric acid (1:10) for 5 seconds. 2) Next, the thin copper metal can be etched by diluted hydrogen peroxide-sulfuric acid solution H2SO4/H2O2/H2O, mixed in the volume ratio of 5:6: 100. In order to obtain fine surface with minimum roughness for RF signal transferring, wraparound etch experiment was performed on the monitor wafer with the scheme of Ti /WNx /Ti /Cu copper airbridges for finding the optimal ratio of chemical compositions. The optimal ratio of H2SO4 /H2O2/H2O solution is 5:6:100. The etch rate of this solution is very high, and the etch stop was when the underlayer Ti was revealed, which is in gray color. 3) Diluted HF can etch the Ti thin metal. The titanium etchant was amixture of 1:100 HF (49%): H2O solution. Titanium is readily oxidized, so it likely forms an oxide from the water, which is readily etched by the HF in this solution resulting in the bubbles of oxygen. The etch rate is about 12Å/sec, and the etch stops at the bubbles evolved for about 22 seconds depending on the Ti film thickness. 4) The thin metal of tungsten nitride was etched by diluted hydrogen. 17.
(32) peroxide. The etchant was a mixture of H2O2 (commercially 30% by weight): H2O in the ratio of 1:10. This etchant is used to wet-etch tungsten and its alloys, and also etches tungsten/titanium alloys, but not for pure titanium. The etch rate is very slow, but rises with temperature. It is difficult to decide the end point of the tungsten nitride etch by the observation of the color change because the color of the tungsten nitride is similar to the underlayer of titanium. The etch process will last for 15 minutes. 5) Finally, the last thin metal film was etched by diluted HF solution. The titanium etchant was mixed by 1:100 HF (49%): H2O solution. The etch rate is about 12Å/sec, and the etch stops after 5 seconds delay of the bubbles evolved for etching thoroughly. The etching time lasted for about 27 seconds depending on the Ti film thickness and the delay time.. 3.2.6 The First PR. Removal The specimens were dipped in acetone (ACE) for 10 minutes to remove the first photoresist for airbridges. And then the specimens were dipped in acetone by placing it in an ultrasonic tank with ultrasonic vibration for 20 seconds. Finally, they were immersed in D.I. water, and then followed by nitrogen drying. Sometimes there were some residuals PR left, and they can be removed by ICP.. 18.
(33) Processing samples with copper may contaminate the chamber of ICP because Cu can easily diffuse into other samples. So a specific ICP for copper device processing is very necessary to improve the performance.. 3.2.7 Silicon Nitride Passivation Copper is easily oxidized in air. So a passivation layer is necessary for copper airbridges at the last step process. Before the passivation layer was deposited, we use diluted sulfuric acid to remove the surface copper oxide. The silicon nitride (Si3N4) passivation was applied by plasma enhanced chemical vapor deposition (PECVD). The temperature of process and auxiliary chamber were 300 ℃, and 250℃ respectively. The arc angle was 50 degree. The RF power was 50W at a vacuum pressure of 500 mTorr. The flow of nitrogen was 500 sccm, ammonia 80 sccm, and silane 20 sccm. The thickness of the deposited silicon nitride was about 460 Å for 30-second deposition.. 3.3 Measurements 3.3.1 DC Measurements Keithley 2400 source meter, HP 4142B, and Karl Suss semi-automatic probe system was set up to measure the DC characteristics of the devices.. 19.
(34) a). I-V characteristics In this experiment, the drain-to-source voltage is applied from 0 to 2 volts. The gate-to-source voltage ranges from 0 to –1 volt for GaAs Low Noise pHEMT. b). Transconductance Gm The drain-to-source voltage is at 1.5 volts and the gate-to-source voltage varies from 1.5 to –3 volts for GaAs Low Noise pHEMT. The value of Gm was calculated by differentiating Id vs. Vgs curve.. 3.3.2 RF Measurements The RF characteristics were measured to evaluate the effects of using copper airbridges on the device performance. a.) S-parameters measurement The s-parameters were measured by voltage-traveling waves with a vector network analyzer (HP8510C). The scattering parameters (S-parameters) are four complex numbers, S11, S12, S21 and S22, which represent the relationship between incident and reflected voltage waves (having amplitude and phase) at the input and output ports of a FET.. 20.
(35) The S-parameter measurements can reveal gain, loss, reflection coefficient, etc. of a device. In order to obtain scattering parameters (S), we need to measure the incident and reflected waves at ports 1 and 2 of the two-port network. From Figure 3-6, the relationship between a1, a2, b1, and b2, can be expressed as: b1 = S11 a1 + S12 a 2. (1). b2 = S 21 a1 + S 22 a 2. , where S11, S12, S21, S22 are defined as different ratios of the reflected waves to the incident waves with proper terminations. S11 =. b1 a1. (2) a2 = 0. S11 is the input reflection coefficient with the output matched. S12 =. b1 a2. (3) a1 = 0. S12 is the reverse transmission coefficient with the input matched. It is also a measure of the isolation of the device. S 21 =. b2 a1. (4) a2 = 0. S21 is the forward transmission coefficient with the output matched; it also measures the voltage gain of the device. S 22 =. b2 a2. (5) a1 = 0. 21.
(36) S22 is the output reflection coefficient with the input matched. S-parameters do not require short circuits or open circuits during the measurement. It only requires that the device be terminated in matched impedance equivalent to the characteristic impedance of the transmission line.. b.) Equivalent circuit model An equivalent circuit model is useful for circuit design. Another important function of S-parameters is to allow the calculation of equivalent circuit parameters of the device. Figure 3-7 illustrates the equivalent circuit components in a PHEMT structure based on a physical view point. The small signal equivalent circuit model is shown in Figure 3-8, which includes two parts: intrinsic and extrinsic. The elements in the box labeled “intrinsic” represent the fundamental elements responsible for the inherent nature of the PHEMT device. Other resistors and inductances, known as extrinsic elements, generally represent undesirable parasitic elements that can be suppressed by good design and process, but would never be eliminated. The small–signal model is required to analyse the measured S-parameter at microwave frequencies. Computer modeling programs are used to determine the circuit. 22.
(37) parameters that will generate measured scattering parameters. The H, Y, or Z parameters can be derived from the S-parameters measured. Relationships exist between S-parameters and other two-port network parameters. For Y-parameters, the following relationships are used:. (1 − y )(1 + y ) + y = ∗. S11. 11. ∗. 22. ∗. 12. y 21. ∗. (6). ∆. − 2 y12 S12 = ∆ S 21 =. ∗. − 2 y 21 ∆. (7). ∗. (8). (1 + y )(1 − y ) + y ∗. S 22 =. 11. ∗. 22. 12. ∗. y 21. ∗. (9). ∆. Here,. (. ∗. )(. ∗. ). ∗. ∆ = 1 + y11 1 + y 22 − y12 y 21. ∗. (10) , and. ∗. y xy = y xy Z O. (11). Therefore, the circuit modeling will be established. Modeling process is as follows. a). Intrinsic model value 1.. Measurement of device S-parameters. 2.. Translate S-parameters into Z-parameters. b). Parasitic impedance 1.. Measurement of device S-parameters 23.
(38) 2.. Translate S-parameters into Z-parameters. 3.. Deduct parasitic impedance The. study. of. small. signal. equivalent. circuit. models. of. copper-airbridged and gold-airbridged PHEMTs was made to investigate the RF performance difference. The source resistance (Rs) with copper airbridges and gold airbridges can be derived from the small signal equivalent circuit models with fitting the measured S-parameters. c.) Noise Figure Three sources of noise resulted from circuits are thermal noise, shot noise and flicker noise. Thermal noise is caused by the thermal agitation of the carriers in the ohmic resistance. Shot noise is a current dependent effect caused by fluctuations in the electron and hole currents due to bias conditions. The flicker noise, which manifests itself at low frequencies (usually 0.01 kHz – 100 kHz) with the 1/f spectral density dependence, is caused by carrier density fluctuation and mobility fluctuation. The intrinsic noise sources in a GaAs FET are the thermal-generated channel noise and the induced noise at the gate. For pHEMT, at high frequencies (> 1 GHz), the flicker noise(1/f noise) sources are unimportant, and the transistor channel noise is mainly due to thermal noise of the carriers if. 24.
(39) the device is biased into the Ohmic region of the DC characteristic. If the device is biased at the saturated region, shot-like noise also contributes. The extrinsic noise sources are associated with the Rg and Rs resistances and the gate bonding pad resistance. Noise figure is also a function of the operating bias condition. In general, the optimum impedance match for lowest noise figure will not be the optimum impedance match for maximum gain. Hence, noise figure measurements are often accompanied by associated gain, the gain achieved at that impedance match. The noise performance of a FET may be quantified by the noise figure, NF, which is a function of frequency, FET bias voltages, and impedance matching. Noise figure is an important characteristic of an amplifier, especially for one intended to amplify weak signals, as in the receiver applications. These amplifiers are commonly called LNAs. The lower the noise figure is; the weaker the signal that can be detected after amplification is. Noise figure reflects the noise added to the signal by the imperfect amplifier, and is defined as the signal-to-noise ratio (S/N) of the input signal divided by the signal-to-noise ratio of the output signal, It is expressed in dB:. 25.
(40) ⎡ Si ⎤ ⎡ SNRinput ⎤ ⎢ Ni ⎥ = 10 log ⎢ NF = 10 log ⎢ ⎥, ⎥ So SNR ⎢ ⎥⎦ output ⎣ ⎢ N ⎥ o ⎦ ⎣. (12). (Base 10 logarithms). Where, Si:Input signal power, So:Output signal power, Ni:Input noise power, No:Output noise power, SNR:Signal to noise power ratio The optimum noise figure, NFo, occurs when the biases and impedance matching are optimized to obtain the best noise figure for the device at a given frequency. In order to achieve the lower noise performance, a low noise FET should be with a short gate(0.5μm or less) to minimize Cgs, high channel doping to increase gm and decrease Rs, and a short source-to-gate spacing to decrease Rs.. 26.
(41) CHAPTER 4 Results and Discussions From the above study, we know that barrier layer should have inherent characteristics of the high melting point and lower solubility in copper even though at high temperatures. But a trade-off between the barrier property and the adhesion performance with Cu will be made. Barrier material may reveal excellent barrier property but poor adhesion if the barrier does not react with Cu to form compounds. An ideal barrier material should be with good barrier property as well as good adhesion with Cu. But it is hardly to achieve it. New multilayer system, Ti/WNx/Ti/Cu, was used to solve this problem for getting good film adhesion and good diffusion barrier properties. In this chapter, the results of the copper airbridges are described. DC and RF performances are also presented. Furthermore, a small signal equivalent circuit derived from measured S-parameters is established in order to compare the performance of the copper-airbridged and gold-airbridged PHEMTs.. 4.1 Thin Metal Etching In order to obtain fine surface with minimum roughness for RF signal transferring, we performed wraparound etch experiments on the monitor wafer. 27.
(42) with copper airbridges of the scheme of Ti /WNx /Ti /Cu for finding the optimal ratio of chemical compositions of the etching solution. The thin copper metal was etched by diluted hydrogen peroxide-sulfuric acid solution with various ratios of constituents. The experiments were performed by using the solution of H2SO4: H2O2: H2O with the ratios of 5:3:100, 5:6:100, 5:9:100, 10:6:100, 15:6:100, 1:1:20, 1:1:50, and 1:1:100, respectively. The experiment data were measured by KLA-Tencor P10 and were shown in Table 4-1 and Figure 4-1a. From Figure 4-1a, the surface roughness of the thick copper interconnects was slightly changed when etched in the solution with the ratio of 1:1:100 (5ml: 5ml: 500ml). When etched in the solution with the ratio of 1:1:50 (5ml: 5ml: 250ml) for 12 seconds, the surface. roughness of the plated thick. copper was slightly reduced. When etched in the solution with the ratio of 5:6:100 (10ml: 12ml: 200ml), the surface of the thick copper was very shining. The roughness value reduced a lot and was etched quickly and the film just last for 6 seconds. But when etched in the solution with the ratio of 1:1:20 (5ml: 5ml: 100ml), the surface roughness was increased and was etched off rapidly in 3 seconds. The ratio of 1:1:20 is close to the ratio of 5:6:100, but the results are so different. So we need to check more ratios of the solution constituents. Next, the experiments by the ratios of 1:1:20, 1:1:30, 1:1:50, 1:1:100,. 28.
(43) 5:4:100, 5:5:100, 5:6:100, 5:7:100, and 5:8:100 were performed. And the experiments data were shown in Table 4-2 and Figure 4-1b. From Figure 4-1b, among the first group of 1:1:20, 1:1:30, 1:1:50, and 1:1:100 ratios, the solution ratio of 1:1:100 resulted in the reduction of the surface roughness. From another group of 5:4:100, 5:5:100, 5:6:100, 5:7:100, and 5:8:100 ratios, the solution ratio of 5:6:100 resulted in the reduction of the surface roughness. But the etching time of the ratio of 1:1:100 was 30 seconds, which is longer than the 6 seconds etching time of the ratio of 5:6:100. To avoid dipping the sample in the etching solution too long, which would result in some uncontrollable failure, we decided to use the optimal ratio of H2SO4 to H2O2 and H2O with 5:6:100. The solution ratio of 5:6:100 would give rise to the shining copper surface and took a short etching time. After the copper thin metal etching test, we had run a series of experiments to optimize the etching parameters of the various thin metal layers. The optimized etching recipes of the thin metal layers were shown in Figure 4-2. The optimal processes had been described in detail in Chapter 3. The thin metal was also tested with using the solution mixed from NH4OH/H2O2/H2O of the ratio 1:1:5 to etch all the layers. Cu was etched severely and more rapidly than WNx. And WNx protruded at the bridge edges (Figure 4-3).. 29.
(44) It was a non-selective etchant. However, the solution mixed from H2SO4/ H2O2/ H2O was a selective etchant. The profile of Cu airbridge used of H2SO4/ H2O2/ H2O etching revealed better than that used of NH4OH/H2O2/H2O solution (Figure 4-4).. 4.2 AES Depth Profile Analysis Blanket samples with Ti/WNx/Ti/Cu multilayer were used to study the material property of the thin metal systems. The Au layer was deposited on GaAs blanket wafer and followed by sputtered 300 Å Ti, which was used as the adhesion layer between WNx and Au-contacts, and 400 Å WNx, was used as the diffusion barrier for copper. Then Ti/Cu layers, which used as the adhesion and the conducting seed layer for the subsequent copper electroplating, were applied by evaporation. The thicknesses of Ti and Cu layer were 300 Å and 1000 Å respectively. The wafer was subsequently split up to four pieces. One was as deposited and without annealing; the others were separately annealed at 300°C, 400°C and 500°C for 30 minutes in the oven. Then Auger Electron Spectroscopy (AES) with model of VG Scientific Microlab 350 were used to analyze the depth profiles of all these four samples.. 30.
(45) The AES depth profiles of the Ti/WNx/Ti/Cu multilayer scheme, which were annealed at various temperatures, were shown in Figure 4-5a~c. From the results of these profiles, the diffusion barrier WNx was thermally stable even up to 300°C thermal annealing for 30 minutes. When the annealing temperature was higher than 400°C, the profile of WNx remained changed and the copper began to diffuse into the WNx layer.. 4.3 X-ray Diffraction Patterns (XRD) The XRD data were measured by detector scan with 5 degree fixed axis setting, using the Siemens Diffraktometer D5000 system. The XRD patterns of Ti/WNx/Ti/Cu scheme after thermal annealing at different temperatures for 30 minutes are shown in Figure 4-6. Intermetallic compounds of Au and Cu were formed after the annealing at 500°C. Compared to the AES depth profiles, these intermetallic compounds resulted from that copper atoms diffused through the WNx layer and formed several kinds of intermetallic compound with gold atoms. (Figure 4-7 is Au-Cu phase diagram.) The resistances of these intermetallic compounds are higher than those of copper and gold, which impacts the RF performance of the LN-PHEMTs. Although there were no obvious intermetallic compounds formed after 400°C annealing from the XRD patterns shown, the. 31.
(46) copper diffusion through the WNx layer were observed in the AES profile. The AES profiles indicate that the barrier property of WNx was weak after annealing at such a high temperature. But from the results of AES and XRD, WNx was still a good diffusion barrier between copper and gold even after 300 °C annealing for 30 minutes.. 4.4 Adhesion Layer A Ti adhesion layer was added to solve the copper-airbridged peeling problem. Titanium was extensively used as the adhesion layer in the Si IC industry. The pull-strength of the BLM test systems with Ti adhesive metal was superior to those with Cr [15]. Ti was easily wetting on gold and also conventionally used in the fabrication of gold airbridges. Mainly, Ti can be selectively etched by diluted hydrogen fluoride solution in the thin metal removal process. The deposition and etch processes of Ti are compatible with the conventional processes of GaAs device fabrications. Airbridge peeling off were not observed again when processing in a tank with ultrasonic vibration for removing the first via photoresist. Also, the diffusion barrier layers with Ti adhesion layers stay quite stable in the scotch tape peeling test. As we sampled 72 dies randomly to measure the electrical performance,. 32.
(47) there were only 9 dies failed. The yield of Ti/WNx/Ti/Cu structure was about 85.5% and was better than those of the Au/WNx/Cu scheme, which the yield was just 62.5%. Figure 4-8 and Figure 4-9 show the uniformities of the DC characteristics of the GaAs PHEMTs samples, which were fabricated with different thin metal systems. The average transconductance of devices using Ti/WNx/Ti/Cu as thin metals was greater than those of WNx/Cu. The standard deviations of Gm and Vp of GaAs PHEMTs fabricated with WNx/Cu were 97 mS/mm and 0.22 V. The standard deviations of Gm and Vp of GaAs PHEMTs fabricated with Ti/WNx/Ti/Cu were 33 mS/mm and 0.14 V. GaAs PHEMTs with Ti/WNx/Ti/Cu scheme showed much better uniformity of Gm and Vp than those with WNx/Cu thin metal layers. The standard deviations of Gm and Vp of GaAs PHEMTs fabricated with gold airbridges in the same wafer were 45 mS/mm and 0.11 V. So the uniformity of Gm and Vp of GaAs PHEMTs using copper airbridges with Ti/WNx/Ti/Cu multilayer system was comparable to those fabricated with using gold airbridges. When using Ti/WNx/Ti/Cu as the thin metal systems, the peelings of the plated metal no longer occurred on the LN-PHMTs.. 33.
(48) 4.5 DC Characteristics The gate width of LN-PHEMT was 40μm × 4, and the gate length was 0.25μm. Low Noise PHEMT with copper airbridges using of Ti/WNx/Ti/Cu as thin metal layers was annealed at 200℃ for 3 hours in the air to test the thermal stability of the diffusion barrier, WNx. The DC and RF characteristics before and after the thermal annealing were measured and compared. The comparison of the drain I-V characteristics on the same copper-metallized LN-PHEMT with Ti/WNx/Ti/Cu scheme was shown in Figure 4-10a and the dependence of the transconductance on the gate bias voltage was shown in Figure 4-10b. The saturated drain current was about 200 mA/mm and the maximum transconductance was almost up to 449 mS/mm when tested at VDS = 1.5 Volts and VGS = -0.05 Volts. These DC characteristics showed little change after thermal annealing. The saturated drain current after thermal annealing was higher than that before about 11 mA/mm at VDS=1.5V. The knee voltage of the drain I-V curve remains almost the same after the thermal annealing. To compare with the copper-airbridged PHEMTs with only WNx/Cu as thin metal, for which the saturated drain current was about 150 mA/mm and the maximum transconductance was 375 mS/mm when VDS = 1.5 Volts and VGS = 0 Volts (Figure 4-11a, b), the DC characteristics of copper-airbridged with. 34.
(49) Ti/WNx/Ti/Cu as thin metal system were better than those with only WNx/Cu. The DC characteristics of the fabricated gold-airbridged PHEMTs were compared with that of the copper-airbridged devices. The saturated drain current of the gold-airbridged PHEMTs was about 180 mA/mm and the maximum transconductance was 452 mS/mm when VDS = 1.5 Volts and VGS = 0 Volts. Both devices have the same knee voltage of 0.3 Volts. So the additional Ti layers do not have significant impact on the DC performance of the devices.. 4.6 RF Characteristics The RF characteristics were measured to evaluate the effects of using the Cu airbridges on the device performance. The airbridge of the device is responsible for the parasitic resistance and parasitic inductance and exhibits different impedance at high frequencies. If the airbridges were with poor adhesion and insulation on the device, there would be much attenuation during the signal propagation.. 4.6.1 S-parameters Measurement The S-parameters were measured by HP8510C before and after Si3N4 passivation and thermal annealing at 200℃ for 3 hours. The results are shown in Figure 4-12a,b and Figure 4-12c,d. The comparison is shown in Figure 4-13a,b.. 35.
(50) Both the s-parameters were measured under a DC supply-voltage of Vds=1.5 V and the bias voltage Vg = -0.2 V. There is a little change of the S-parameters for devices before and after thermal annealing. Figure 4-14 shows the curves of magnitude of S21, which presents the gain of the GaAs LN-PHEMT. The values of S21 are almost the same before and after thermal annealing shown. The chart of S12 indicates the isolation of the GaAs LN-PHEMTs. As shown in Figure 4-15, the magnitude values of S12 before thermal annealing are little higher than those after thermal annealing about 0.1 dB at high frequency region. The isolation of after thermal annealing maybe would be better than that before thermal annealing. This means the Si3N4 passivation and the thermal annealing treatment do not influence the gate-drain negative feedback. There would be not much attenuation in the signal propagation after the device was passivated with Si3N4 and with the thermal annealing treatment.. 4.6.2 Equivalent Circuit Model The study of small signal equivalent circuit model is made to investigation the influence of the airbridges on the RF performance of the GaAs LN-PHEMTs. The equivalent circuit-modeling diagram was shown in Figure 4-16. It includes two parts: intrinsic and extrinsic. The intrinsic part is FET itself, and extrinsic parts. 36.
(51) are the other components. The calculated s-parameters of equivalent circuit model are fitted to the measured S-parameters of Au-airbridged, Cu-airbridged with WNX/Cu, and Cu-airbridged devices with Ti/WNx/Ti/Cu within the frequency range of 10~18 GHz after thermal annealing (shown in Figure 4-17 a~d). From the simulations, we get those parameters values as following: g m =130 mS, Cgs=0.247 pF, Cdg=0.056 pF, Rs=3.3 ohms, for Au-airbridged device; g m =135 mS, Cgs=0.25 pF, Cdg=0.05 pF, Rs=5.5 ohms, for Cu-airbridged device with WNx/Cu; g m =128 mS, Cgs=0.245 pF, Cdg=0.045 pF, Rs=3.5 ohms, for Cu-airbridged device with Ti/WNx/Ti/Cu before thermal annealing; g m = 135 mS, Cgs=0.23 pF, Cdg=0.055 pF, Rs=3.5 ohms, for Cu-airbridged device with Ti/WNx/Ti/Cu after thermal annealing. Where g m , Cgs, and Cdg are intrinsic parameters, Rs is extrinsic parameter. As we know, the cut off frequency equation can be expressed as: fT =. gm 2π (C gs + C gd ). (13). g m :the transconductance, Cgs:the gate-source capacitance, Cgd:the gate-drain capacitance.. 37.
(52) Using the simulation data, we can calculate fT by the above equation and get:. fT =68.3 GHz, for Au-airbridged device; fT =71.62 GHz, for Cu-airbridged device with only WNx/Cu; fT =70.248 GHz, for Cu-airbridged device with Ti/WNx/Ti/Cu before thermal annealing;. fT =74.95 GHz, for Cu-airbridged device with Ti/WNx/Ti/Cu after thermal annealing; these values are similar to 70GHz shown in Figure 4-19 and Figure 4-20. So the equivalent circuit model is reasonable for these S-parameters measured. Compared with these source resistance values (Rs), the Rs= 5.5 ohms of Cu-airbridged PHEMT with only WNx/Cu as thin metal system is higher than the others. This suggested that the adhesion between WNx/Cu and Au-contacts was not good and resulted in the resistance increase. The insertion of Ti layer can improve the adhesion problems to decrease the source resistance. After thermal annealing, there was no significant impact on the source resistance because the source resistances are 3.5 ohms before and after thermal annealing for the copper-airbridged PHEMTs with Ti/WNx/Ti/Cu multilayer as the thin metal system. And the source resistance of copper-airbridged PHEMT with Ti/WNx/Ti/Cu multilayer system was comparable to that of gold-airbridged device,. 38.
(53) which has source resistance of 3.3 ohms.. 4.6.3 Noise Figure Figure 4-18a shows the thermal effect upon the noise performance of the copper-airbridged LN-PHEMT with Ti/WNx/Ti/Cu multilayer as the thin metal system. The values were measured at Vds=1.5 V with Ids=14.584 mA and Vg = -0.5 V with Ig=0 mA before and after thermal annealing 200℃ for 3 hours. The noise figure of the fabricated device was 0.96dB and the associated gain was 10.68dB when tested at 17 GHz. After 200°C thermal annealing for 3 hours in the air, the noise figure was 0.99dB and the associated gain was 10.37dB at 17 GHz. The noise performance decayed very little after thermal annealing at 17GHz. The noise performance decayed about 0.155 dB on the average and the associated gain decayed about 0.471dB on the average. These noise data fabricated with Ti/WNx/Ti/Cu in Figure 4-18a were better than those fabricated with only WNx/Cu in Figure 4-18b. The plated metal peelings will impact the noise performance of the device. The additions of Ti adhesion layers efficiently improved the noise performance of the copper-metallized airbridges.. 39. LN-PHEMTs. fabricated. with.
(54) 4.6.4 The Unity-Current-Gain Cut-off Frequency The unity-current-gain cut-off frequency, fT, is defined as the frequency at when the short-circuited current gain (H21) becomes equal to 1 (0 dB) and it is a dependable indicator for high frequency transistor operation. Figure 4-19 shows the cut-off frequency of the LN-PHEMTs before and after thermal annealing at 200℃ for 3 hours. The values of fT were measured under a DC supply-voltage of Vds=1.5 V and the bias voltage Vg = -0.2 V. The H21 is almost the same before and after thermal annealing. Their cut-off frequencies are similar with a value of 70 GHz. This shows that it doesn’t impact the cut-off frequency too much after thermal annealing. The cut-off frequencies of LN-PHEMTs fabricated using various airbridge processes were shown in Figure 4-20. All the curves have the similar cut-off frequency of about 70 GHz. These results show that the unit current gain performance of copper-metallized LN-PHEMTs is comparable to those with gold-airbridged devices.. 40.
(55) Chapter 5 Conclusions In this study, WNx layer was used as the diffusion barrier for Cu airbridge fabrication. The Ti layers were added in the Au/WNx and WNx/Cu structures, respectively, to improve the adhesion of the metal structure in the airbridge for solving the problem of the copper-plated airbridge peeling off the gold-contacts. We also developed a optimal selective etching processes for etching the thin metal system of Ti/WNx/Ti/Cu in the copper-airbridged PHEMT fabrication. From the results of AES depth profiles and XRD patterns, WNx sustained as the diffusion barrier between Au and Cu even after thermal annealing at 300℃ for 30 minutes. Ti adhesion layers did not make a great impact on the diffusion barrier property of the WNx layer. When using Ti/WNx/Ti/Cu as the thin metal system, the peelings of the plated metal no longer occurred on the LN-PHMTs even though it was immersed in a tank with ultrasonic vibration for removing the first via photoresist. The yield of the devices with Ti/WNx/Ti/Cu structure was about 85.5% and was better than those with the Au/WNx/Cu scheme which had the yield of just 62.5%. The results show that the addition of Ti adhesion layers in the Au/WNx and WNx/Cu is necessary to improve the yield of the device.. 41.
(56) Low Noise PHEMT with copper airbridges using of Ti/WNx/Ti/Cu as thin metal layers had the saturated drain current of 200 mA/mm and the maximum transconductance was up to 449 mS/mm when tested at VDS = 1.5 Volts and VGS = -0.05 Volts. The noise figure of the fabricated device was 0.96dB and the associated gain was 10.68dB when tested at 17 GHz under Vds=1.5 V and Vg = -0.5 V. The noise performance decayed very little after thermal annealing at 17GHz. The DC characteristics and NF performance were thermally stable even after the 200 ℃ annealing for 3 hours. From the above results, the DC and NF characteristics of copper-airbridged devices with Ti/WNx/Ti/Cu as thin metal system were better than those with only WNx/Cu structure and were comparable to that of gold-airbridged PHEMTs. The plating metal peelings impact the noise performance and the addition of Ti adhesion layers sufficiently improved the noise performance of the copper-airbridged LN-PHEMTs. The values of S-parameters changed very little before and after thermal annealing. This means the Si3N4 passivation and the thermal annealing treatment do not influence the gate-drain negative feedback. There is not much attenuation during the signal propagation after Si3N4 passivation and the thermal annealing. The equivalent circuit-modeling diagram was reasonable for these s-parameters measured. Because of the poor adhesion between WNx and Au, the. 42.
(57) LN-PHEMT using only WNx/Cu as thin metal system had higher resistance. The insertion of Ti layer can improve the adhesion and there was no significant impact on the source resistance after thermal annealing. The source resistance of the copper-airbridged PHEMTs with Ti/WNx/Ti/Cu multilayer was comparable to that of gold-airbridged devices. The values of the short-circuited current gain (H21) were almost the same before and after thermal annealing. Their cut-off frequencies were similar with a value of about 70 GHz. This shows that it did not impact the cut-off frequency too much after thermal annealing. These results show that the copper-metallized LN-PHEMTs have the comparable unit current gain performance to the LN-PHEMTs with gold airbridges. All these results show that LN-PHEMTs with copper-airbridge using of Ti/WNx/Ti/Cu multilayer as the thin metal system have been successfully developed. The electrical performance of these devices was better than those using only WNx/Cu scheme and was comparable to those with the conventional gold airbridges. And the best benefit is that the use of Ti/WNx/Ti/Cu scheme improved the yield of the devices because the Ti insertion layers improved the adhesion with the diffusion barrier layer and solved the copper-airbridge peeling problem.. 43.
(58) References 1. Ralph Williams, Modern GaAs Processing Methods, Artech House, Norwood, MA, 1990, pp. 272-273. 2. Stanley Wolf, Silicon Processing for the VLSI Era,Volume 2, Lattice Press, Sunset Beach, 1990, pp. 192-193. 3. Li, L.P. (Advanced Module Technology Division, Research and Development, Taiwan Semiconduct. Mfg. Company); Lu, Y.C.; Lu, H.H.; Yang, Y.L.; Lin, C.H.; Lin, K.C.; Chen, B.T.; Liang, M.; Jang, S.M.; and Liang, M.S.; “Advanced 300mm Cu/CVD LK (k=2.2) Multilevel Damascene Integration for 90/65nm Generation BEOL Interconnect Technologies”, Digest of Technical Papers - Symposium on VLSI Technology, 2003, pp. 105-106 4. Lytle, S.A.(Chartered Semiconductor Mfg. Inc.); Karthikeyan, S.; Oladeji, I.O.; Lee, T.J.; Li, H.M.; Zhang, A.; Steiner, K.G.; Merchant, S.M.; Oh, M.; Jessen, S.W.; Gibson Jr., G.W.; Ramappa, D.; Taylor, J.A.; Tse, T.Y.; Hariharaputhiran, M.; Hua, G.; Kim, H.T.; Mattern, L.N.; Kamat, N.; Chew, P.K.H.; Chesire, D.P.; Kang, S.H.; Vitkavage, S.C.; Adebanjo, R.O.; Wolf, T.M.; Kook, T.; Huang, R.Y.S.; Cuthbertson, A.; Hillenius, S.J.; Ibbotson, D.E.; “Overcoming Cu/CVD low-k integration challenges in a high performance interconnect technology”, Technical Digest - International Electron Devices Meeting,. 44.
(59) 2001, pp. 611-614 5. Zhao, B. (Rockwell Semiconductor Systems); Feiler, D.; Ramanathan, V.; Liu, Q.Z.; Brongo, M.; Wu, J.; Zhang, H.; Kuei, J.C.; Young, D.; Brown, J.; Vo, C.; Xia, W.; Chu, C.; Zhou, J.; Nguyen, C.; et al.; “Cu/low-κ dual damascene interconnect for high performance and low cost integrated circuits”, Digest of Technical Papers - Symposium on VLSI Technology, 1998, pp. 28-29 6. Jang, S.M. (Advanced Module Technology Division, R and D Taiwan Semiconduct. Mfg. Co.); Chen, Y.H.; Chou, T.J.; Lee, S.N.; Chen, C.C.; Tseng, T.C.; Chen, B.T.; Chang, S.Y.; Yu, C.H.; and Liang, M.S.; “Advanced Cu/low-k (k = 2.2) multilevel interconnect for 0.10/0.07 µm generation” IEEE Symposium on VLSI Circuits, Digest of Technical Papers, 2002, pp. 18-19 7. Schiml, T. (Infineon Technologies, IBM SRDC); Biesemans, S.; Brase, G.; Burrell, L.; Cowley, A.; Chen, K.C.; Ehrenwall, A.V.; Ehrenwall, B.V.; Felsner, P.; Gill, J.; Grellner, F.; Guarin, F.; Han, L.K.; Hoinkis, M.; Hsiung, E.; Kaltalioglu, E.; Kim, P.; Knoblinger, G.; Kulkarni, S.; Leslie, A.; Mono, T.; Schafbauer, T.; Schroeder, U.; Schruefer, K.; Spooner, T.; Warner, D.; Wang, C.; Wong, R.; Demm, E.; Leung, P.; Stetter, M.; Wann, C.; Chen, J.K.; and Crabbe, E.; “A 0.13µm CMOS platform with Cu/low-k interconnects for system on chip applications”, IEEE Symposium on VLSI Circuits, Digest of Technical. 45.
(60) Papers, n TECHNOLOGY SYMP., 2001, pp. 101-102 8. G. Braeckelmann, D. Manger, S.C. Seo, S. Beasor, S. Nijsten, and A.E. Kaloyeros, “Deposition of barrier layer and CVD copper under no exposed wafer conditions: adhesion performance and process integration”, Materials for Advanced Metallization, 1997. MAM '97 Abstracts Booklet., European Workshop , March 16-19, 1997, Pages:27 - 29 9. a) M.H. Kiang, J. Tao, W. Naamgoong, C. Hu, M. Liebennann, N.W. Cheung, H.K. Kang, S.S. Wong, Mater. Res. Soc. Symp. 265, 187 (1992); (b) S.P. Murarica, R.J. Gutman, A.E Kaloyeros, W.A. Landfwd, Thin Solid Films 236,257 (1993) 10. Kazuyoshi Ueno, Koichi Ohto, and Kinji Tsunenari , “A HALF-MICRON PITCH Cu INTERCONNECTION TECHNOLOGY”, VLSI Technology, 1995. Digest of Technical Papers. 1995 Symposium on, 6-8 June 1995, pp.27 28 11. Chang, H.C.; Chang, E.Y.; Lien, Y.C.; Chu, L.H.; Chang, S.W.; Huang, R.C.; and Lee, H.M.; “Use of WNx as diffusion barrier for copper airbridged low noise GaAs PHEMT”, Electronics Letters, Volume: 39, Issue: 24, 27 Nov. 2003, pp. 1763 – 1765 12. J.C. Lin, C.S. Liu, S.L. Shue, C.H. Yu, and M.S. Liang, “The Evaluation of. 46.
(61) the Diffusion Barrier Performance of Reactively Sputtered TaNx Layers for Copper Metallization”, Interconnect Technology Conference, 2000. Proceedings of the IEEE 2000 International, 5-7 June 2000, pp.191 – 193 13. S. Wong, C. Ryu, H. Lee and K. Kwon, "Barriers for Copper Interconnections," Materials Research Society Spring Meeting, I2.3, San Francisco, CA, April 1998. 14. Suh, B.-S. et al., “Crystallization of amorphous WNx films”, Journal of Applied Physics, Vol. 89, 2001, (7), pp. 4128-4133 15. Evelyne Darque-Ceretti1, Doriane Helary1, and Marc Aucouturier2, “An Investigation of Gold/Ceramic and Gold/Glass Interfaces”, Gold Bulletin 2002, 35/4, pp. 118-129. 16. KEN’ICHI MIZUISHI and TAKAO MORI, “Thermal Stability of Various Ball-Limited-Metal Systems Under Solder Bumps”, IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURING TECHNOLOGY, VOL II, NO. 4, DECEMBER 1988, pp.481-484 17. I. Shalish and Yoram Shapira, “Thermal stability of a Ti-Si-N diffusion barrier in contact with a Ti adhesion layer for Au metallization”, J. Vac. Sci. Technol. B V17, (1), Jan/Feb 1999, pp. 166-173 18. F. C. T. So, E. Kolawa, H. P. Kattelus, X.-A. Zhao, M-A. Nicolet, and C.-D.. 47.
(62) Lien, “Thermal stability and nitrogen redistribution in the /Ti/W--N/Al metallization scheme”, J. Vac. Sci. Technol. A 4 (6), Nov. 1986, pp. 3078-3081 19. T. W. Orent and R. A. Wagner, “Investigation of the chemical bonding of Cr and Ti to silicon nitride”, J. Vac. Sci. Technol. B 1(3), July 1983, pp. 844-849 20. Kazuhide Abe and Hiroshi Onoda, “Effects of Ti insertion between Cu and TiN layers on reliability in Cu/Ti/TiN/Ti layered damascene interconnects”, J. Vac. Sci. Technol. B 21(3), May 2003, pp. 1161-1168 21. Changsup Ryu; Kee-Won Kwon; Loke, A.L.S.; Dubin, V.M.; Kavari, R.A.; Ray, G.W.; Wong, S.S.; “Electromigration of submicron Damascene copper interconnects”, VLSI Technology, 1998. Digest of Technical Papers. 1998 Symposium on, 9-11 June 1998 pp.156 – 157 22. Williams, Ralph; “Modern GaAs Processing Methods”, 1990 Artech House, Inc. pp.315-318 23. T. Nogami, J. Romero, V. Dubin, D. Brown, and E. Adem, “Base Layer for Electrochemical Deposition Process for Fabrication of Copper Interconnect for ULSI”, UC Extension, Jun. 1998 24. T. Nitta, T. Ohmi, M. Otsuki, T. Takewaki, and T. Shibata, J. Electrochem.. 48.
相關文件
(Another example of close harmony is the four-bar unaccompanied vocal introduction to “Paperback Writer”, a somewhat later Beatles song.) Overall, Lennon’s and McCartney’s
達、創意及思 維,透過音律 的演繹,具體 地展現. 靈活運用在創 作上,樂曲與
Several methods that modulation effective work function to maintain p-type gate material is the direction of future research, sush as microwave annealing with plasma
The second coated layer is the Ag reference mirror layer with the thickness of about 100nm, 450nm and 900nm corresponding to sapphire/Ti/Ag/AuSn, sapphire/Cr/Ag/AuSn, and
本研究旨在使用 TI-Nspire CAS 計算機之輔助教學模式,融入基礎 統計學的應用,及研究如何使用 TI-Nspire CAS
[r]
The mechanical properties of organic solder ability preservatives (OSP) Cu substrate with a Sn-3Ag-0.5Cu-8In-1Zn Pb-free solder have been studied.. For comparison, a
This study first surveys the thin film solar cell application of new components and thin film solar photovoltaic characteristics of the current situation in the