IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 9, SEPTEMBER 2004 625
Mobility Enhancement of MOSFETs on
p-Silicon (111) With In situ HF-Vapor
Pre-Gate Oxide Cleaning
Tien Sheng Chao, Senior Member, Yu Hsin Lin, and Wen Luh Yang
Abstract—In this paper, we grow and characterize in detail
na-tive-oxide-free ultrathin gate oxide on silicon (111) by an advance clustered vertical furnace with in situ HF-vapor stripping of the native oxide. Excellent results are demonstrated. Gate oxide in-tegrity is significantly improved in terms of time-to-breakdown, drain current, and transconductance. In-situ HF-vapor cleaning by a clustered vertical furnace appears to be very promising to grow high-quality native-oxide-free gate oxide on silicon (111).
Index Terms—In situ HF, MOSFETs, native oxide, silicon (111),
vapor.
I. INTRODUCTION
R
ECENTLY, silicon (111) has been attracting much atten-tion since higher channel mobility of pMOSFETs can be achieved than that fabricated on conventional (100) substrates [1]. Similar result was also reported for the pMOSFETs with high- dielectrics, [2]. On the other hand, AlGaN–GaN HEMTs has been reported grown on Si (111) [3]. Using a buffered layer, silicon (111) can be used as the substrate for GaN growth for radio frequency (RF) and power applications. This is very attractive because of silicon’s low cost, large size substrate available, good thermal conductivity. This success makes the integration of optical devices, high power and/or high-speed devices on silicon with advanced ULSI silicon technology possible. The requirements for gate oxide reliabilities become more and more stringent as the device size scales down to the deep-submicrometer era [4]. This is because the gate oxide thick-ness is fast approaching the physical limit imposed by the high leakage current due to direct tunneling. In general, the ultimate oxide thickness is believed to be around 1.5 nm. Beyond that, silicon dioxide would have to be replaced by high- materials [5], [6]. However, we face the serious mobility degradation when depositing high- directly on silicon. This degradation can be released if a buffered thin oxide exists before high-deposition. But this buffered layer is not easy to scale down,Manuscript received June 21, 2004; revised July 8, 2004. This work was supported by the National Science Council of Taiwan, R.O.C., under Contract NSC-93-2215-E-035-002. The review of this letter was arranged by Editor K. De Meyer.
T. S. Chao is with the Department of Electrophysics, National Chiao-Tung University, Hsinchu 30050, Taiwan, R.O.C., and also with the National Nano Device Labs, Hsinchu 300, Taiwan, R.O.C. (e-mail: [email protected]). Y. H. Lin is with the Department of Electrical Engineering, Feng Chia Uni-versity, Taichung, Taiwan, R.O.C.
W. L. Yang is with the Department of Electronic Engineering, Feng Chia University, Taichung, Taiwan, R.O.C.
Digital Object Identifier 10.1109/LED.2004.834733
consequently equvilent oxide thickness (EOT) is too thick to use for high-speed applications. Under this condition, the removal of the native oxide prior to gate oxidation becomes very critical for oxide thickness less than 2 nm. This is because the native oxide is in general poor in quality with low density [7]. This native oxide on the silicon surface is known to grow very quickly in the open air. Thickness can reach 0.5–1.0 nm within 10 min in the laboratory ambient. That makes the growth of ultrathin oxide difficult. Huge ratio of native oxide in the final gate oxide cannot be tolerated in the preparation for ultrathin oxide. In addition, the effective dielectric constant of the stacked high-k structure would be significantly reduced as the native oxide thickness increases. Recently, the integrated circuit (IC) industries have begun to realize the advantage of dry cleaning technology in the cluster system. Among these, HF-vapor, instead of wet HF-dip, is attractive because of fluorine-terminated surface [8]. In this paper, we grow and characterize in detail native-oxide-free ultrathin gate oxide on silicon (111) by an advance clustered vertical furnace with in situ HF-vapor stripping of the native oxide. We found that the mobility of MOSFETs on silicon (111) can be significantly increased.
II. EXPERIMENT
The clustered vertical system consists of three modules, i.e., HF-vapor cleaning, oxidation, and in situ -doped poly-Si deposition. Wafers, 6-in p-type (111) of resistivity 3–6 -cm, were processed through these three modules in sequence without exposure to the ambient, so as to obtain native-oxide-free poly-Si–SiO –Si MOS capacitors. To achieve this, the cabinet is filled with high purity nitrogen (with residual oxygen content of less than 4 ppm), to suppress any native oxide growth after the HF-vapor stripping of the original native oxide. Four kinds of samples, with oxide thickness of 3.5 nm and 3.2 nm , were obtained as follows: Wafers were split to receive either a conventional wet HF-dip or the in situ dry HF-vapor (HFV) cleaning, and then wafers were further split to receive either a conventional or oxidation. The oxidation temperature was at 800 C. The oxide thickness was 3.5 nm for samples and 3.2 nm for , respectively. Uniformity of the gate oxide was found to be within across the 6-in wafer. To inves-tigate oxygen residual on the silicon surface, another testing experiment was executed. After loading into the cluster system, wafers were split to receive the HF-vapor treatment (HFV) or without the HFV (HF-Dip). Then wafers were directly deposited a poly-Si film in the same cluster system.
626 IEEE ELECTRON DEVICE LETTERS, VOL. 25, NO. 9, SEPTEMBER 2004
Fig. 1. SIMS profiles of oxygen. Native: without any HF treatment after RCA cleaning processes. HF-dip: with HF-H O (1:100) dip after RCA cleaning processes. HF-V: with HF-dip and clustered HF-vapor treatment after RCA cleaning processes. All samples skip the oxidation step in the cluster system and deposit poly-Si.
Fig. 2. I versus V curves under different V 0 V = 0:5, 1.0, 1.5, and 2.0 V. The gate oxide was split four conditions, i.e.,O versus N O oxide and with/without HF-vapor (HFV) treatment. TheI is normalized for all condition by taking Cox into consideration.
III. RESULT ANDDISCUSSION
Fig. 1 shows the resultant SIMS-profile at the interface of poly-Si/Si samples which skip oxidation step in cluster system. The sample without any HF-treatment after conven-tional RCA cleaning was also shown, which shows the largest oxygen counts at the interface. It is seen that the oxygen is significantly reduced (about one order of magnitude) using the in situ HFV treatment compared with the conventional HF-dip. This implies the native oxide can be precisely con-trolled. Fig. 2 shows the drain current versus drain voltage at , 1.0, 1.5, and 2.0 V for . To eliminate the slight difference of oxide thickness among devices, the drain current is normalized for all conditions
by taking C of oxide into
consid-eration. It can be seen that oxide (solid circles) with conventional HF-dip treatment is slightly larger than that of counterpart (solid triangle) at high field. This crossover
Fig. 3. Field-effect mobility deduced from transconductance andT for four split conditions at the linear regime atV = 0:1 V.
phenomenon is similar to previous report on silicon (100) [9]. For both and devices with HFV-treatment, the drain current is increased. Increase of drain current for oxide (22% increase at , and ) is higher than that of counterpart (7% increase). No crossover phenomenon was found again for samples with HFV treat-ments. Since it is believed that degradation of current in the high field is due to surface roughness, this implies the sur-face roughness can be improved by using HFV treatment, this is consistent with our previous report [10] and in [7]. The field-effect mobility deduced from transconductance and C at linear regime at was plotted in Fig. 3. Both and devices exhibit increased field-effect mo-bility with HFV-treatment. The momo-bility of MOSFETs with -oxide increases 4% with HFV-treatment compared to the conventional HF-dip one; while 30% increase was found for -oxide with HFV-treatment. The significant increase of mobility makes the crossover phenomenon disappear for oxide versus oxide. However, the maximum of Si-(111) with HFV-treatment is still lower than that of Si-(100) [11]. Since the interfacial trap density exhibits strong relation with the device’s mobility, as we have reported in [10] and also in Chin et al. [7], the interface trap density can be reduced by HF-vapor treatment on silicon (100). From the result of Fig. 3, we found that devices with HFV-treatment show significant improvement on mobility for Si-(111), which is similar to the report on Si-(100) in [10]. The charge pumping current for all samples were measured. The maximum Icp of oxide was 110 nA, which decreases to 70 nA with HFV-treatment; while Icp of oxide was 120 nA, which decreases to 90 nA with HFV-treatment. Based on these results, it can be clearly seen that the interface has been significantly improved with HFV-treatment. Time-to-breakdown test were executed on MOS capacitors at constant , and result is shown in Fig. 4. It is clear that samples with HFV-treat-ment show an improved time-to-breakdown than counterparts for both and devices.
CHAO et al.: MOBILITY ENHANCEMENT OF MOSFETs ON p-SILICON (111) 627
Fig. 4. The time-to-breakdown for samples withO versus N O oxide and with/without HFV treatment under constantE = 10 MV=cm. The area of capacitor is300 2 300 m .
IV. CONCLUSION
In summary, significant mobility enhancement was found for MOSFETs grown in p-silicon (111). Using an in situ HF-vapor stripping of the native oxide prior to gate oxidation has been demonstrated to improve the gate oxide integrity in terms of driving current, mobility, and time-to-breakdown, especially for the MOSFETs with conventional ultrathin gate oxide.
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