先進元件中原子尺寸缺陷之研究

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(1)國立交通大學電子工程學系電子研究所. 博士論文. 先進元件中原子尺寸缺陷之研究 Study on the Atomic-sized Traps in Advanced Devices. 研究生：呂明霈指導教授：陳明哲博士. 中華民國九十五年七月.

(2) 先進元件中原子尺寸缺陷之研究 Study on the Atomic-sized Traps in Advanced Devices 研究生 : 呂明霈. Student : Ming-Pei Lu. 指導教授 : 陳明哲博士. Advisor : Dr. Ming-Jer Chen. 國立交通大學電子工程學系電子研究所博士論文 A Dissertation Submitted to Institute of Electronics College of Electrical & Computer Engineering National Chiao Tung University in Partial Fulfillment of the Requirement for the Degree of Doctor of Philosophy in Electrical Engineering July 2006 Hsinchu, Taiwan, Republic of China 中華民國九十五年七月.

(3) 先進元件中原子尺寸缺陷之研究研究生: 呂明霈. 指導教授: 陳明哲博士. 國立交通大學電子工程學系電子研究所. 摘要隨著電子元件尺寸縮小的未來趨勢，將會面對更多的單電子效應，尤其以隨機擾動的電子訊號 (RTS) 更為之重要。研究小尺寸元件中，經由單一一個氧化層缺陷所造成的雜訊行為，可以提供更不一樣的當元件操作過程中氧化層退化的訊息。因此，一個單一缺陷是否為中性或是帶電性，可經由電流的擾動行為來觀察判斷。低頻雜訊 (又稱 1/f noise) 可以視為一個在頻率域把所有不同的 RTS 訊號的貢獻都加起來的電子訊號，低頻雜訊可以當成研究半導體和絕緣層之間的介面性質的有效方法。在本篇論文中最主要的目的是，更深入的研究探討雜訊與擾動在超薄氧化層元件、擁有高介電常數之絕緣層 (high-k) 的元件以及受製程應力 (process strained) 之元件。根據在不同元件上的研究，本篇論文的架構如下所描述。首先，第一章是針對雜訊與擾動的介紹。接下來，在超薄氧化層元件中 RTS 現象的研究將在第二章中會有所描述，庫倫能量 (Coulomb energy) 可以視為對一個奈米尺寸的缺陷充電過程中所不可忽略的要素，在本論文，我們首次發表實驗上在 1.7 奈米厚度的氧化層元件所做的研究分析，發現更深入氧化層的缺陷將會面對到更高的庫倫能量，另一個成果是，利用 multiphonon 理論成功的解釋電子被缺陷抓取以及釋放的能量問題。相對應的能量配置座標圖也建立在本論文中。在第三章中，我們將探討經由 RTS 振幅大小所淬取出庫倫散射在二維電子氣中所造成的影響，基於對一個單一缺陷所造成的 RTS 現象的相關實驗，發現到更 i.

(4) 深的氧化層缺陷將會造成更小的庫倫散射現象。但是當在強反轉 (strong inversion) 範圍，庫倫散射對在表面的缺陷而言，會造成更強烈的變化現象，一個更強烈的遮蔽效應反映在庫倫電位是造成這這現象的主因，庫倫散射和缺陷的位置的關係將是未來奈米元件中更需要重視的問題。接下來在第四章中，我們將研究有關高介電的絕緣層元件，打開-關閉切換的行為或是兩個級別的隨機擾動雜訊都是在低電壓下量測 N 型通道超薄閘介電層( 1 奈米的氧化層 + 1 奈米的氮化矽 )金氧半電晶體的邊緣直接穿透電流。起因是由於製程所造成的缺陷可以說是局部的閘極堆疊變薄(或是等效於具傳導性的漏電流蘇)。在這個非固有的狀況中，電流中電子被陷阱抓住或是電子被陷阱釋放出來的理論可以適當的解釋我們所量到的數據，尤其隨機擾動雜訊振幅的大小比例高達百分之十八。電流對電壓的特性曲線很直覺的關聯著某些個缺陷點，展現和氧化層變薄的事實十分的一致。RTS 可以用來觀察電流流通過一個奈米線狀的缺陷點的有效工具，一個敏感的監督製程的角色就像是展示出缺陷發生的機率及位置所在。之後在第五章中，低頻雜訊拿來使用在監控受不同的製程應力程度下的氧化層介面品質，在低頻雜訊在承受製程應力的金氧半電晶體中的量測中，發現靠近表面的缺陷密度隨著通道寬度而變化。這個發現可以解釋為在矽和氧化矽的介面間，因為晶格長度不匹配所造成的 Pb 中心可視為靠近表面的缺陷的主要來源。在低頻雜訊的實驗中，對於通道寬度的縮減，相對應於應力的提高，也降低晶格長度不匹配的程度。最後，我們把所有所做過的研究結論放在第六章。. ii.

(5) Study on the Atomic-sized Traps in Advanced Devices Student: Ming-Pei Lu. Advisor: Dr. Ming-Jer Chen. Department of Electronics Engineering & Institute of Electronics National Chiao-Tung University Hsinchu, Taiwan, R.O.C.. Abstract The continuous shrinking in the feature dimensions of metal-oxide -semiconductor field-effect transistors (MOSFETs) brings into prominence the single electron effects, among which the most important is the Random Telegraph Signals (RTS). Studies on noise from individual oxide traps in small structures can supply new information of device operation as well as degradation phenomena. Thus, individual traps can be observed in their neutral or charged state and, as a consequence, the current fluctuates between two discrete levels. The low-frequency noise (so-called 1/f noise) can be considered as the superposition of several random telegraph signals (RTS) in frequency domain. The 1/f noise can be used as a potential tool for studying the interface between the semiconductor and insulator. The main purpose of this dissertation is to deeply investigate the fluctuations and noise in ultrathin oxide devices, high-k devices and process strained devices. Based on the study of different devices, the organization of this dissertation is described below.. iii.

(6) First, an introduction to the RTS and noise is described in Chapter 1. The study of the RTS phenomenon in ultrathin oxide devices is demonstrated in Chapter 2 of the dissertation. Coulomb energy is essential to the charging of a nanometer-scale trap in the oxide of a metal-oxide-semiconductor (MOS) system. In this dissertation, we present for the first time experimental evidence from a 1.7-nm oxide: substantial enhancements in Coulomb energy due to the existence of a deeper trap in the oxide. Other corroborating evidence is achieved on a multiphonon theory, which can adequately elucidate the measured capture and emission kinetics. The corresponding configuration coordinate diagrams are established. Then, Chapter 3 presents the study on Coulomb scattering in a two-dimensional electron gas (2DEG) system through the relative amplitude of RTS. Experiments on an individual nanoscale trap in the oxide responsible for random telegraph signals lead to remarkable results. In this work, we demonstrated a study for relationship between the capture time, emission time, and the relative amplitude. Initially, the deeper trap in oxide corresponds to weaker Coulomb scattering in a 2DEG. However, as the 2DEG enters into the strong inversion regime, the amount of Coulomb scattering with an interface trap drops with a faster rate than the deep trap. A stronger screening potential confinement is shown to be the physical origin of this effect. The near-distance effect is expected to remain a challenging issue in the area of nanoscale devices. Second, the study of the high-k devices is described in Chapter 4. On-off switching behaviors or two-level RTS are measured in the low voltage direct tunneling currents in ultrathin gate stack (10 Å oxide + 10 Å nitride) tunneling diode. The plausible origin is the process-induced defects in terms of localized gate stack thinning (or equivalently the conductive filament). In such extrinsic case, the current trapping-detrapping theories can adequately elucidate the data, particularly the RTS magnitude as large as 18%. The current-voltage (I-V) characteristic associated with a iv.

(7) certain. defective. spot. is. assessed. straightforwardly,. showing. remarkable. compatibility with existing oxide thinning case. The current tunneling through the wire-like weakened spot can be probed by RTS. The role as a sensitive process monitor is demonstrated in terms of the occurrence probability of the defects as well as their locations. Third, the 1/f noise used to monitor the quality of oxide interface with different tensile stress is presented in Chapter 5. Low-frequency noise measurement in process tensile-strained n-channel metal-oxide-semiconductor field-effect transistors yields the density of the interface states, exhibiting a decreasing trend while decreasing the channel width. This finding corroborates the group of Pb centers caused by the lattice mismatch at (100) Si/SiO2 interface as the origin of the underlying interface states. The present noise experiment therefore points to the enhancement of the tensile strain in the presence of channel narrowing, which in turn reduces the lattice mismatch. Finally, we summarize the conclusion of our works in Chapter 6.. v.

(8) 致謝首先，這篇論文能完成，必須要感謝我的指導教授陳明哲博士，他不僅是在學業上給予我耐心的指導，也在我的研究陷入迷惘的時候，指引我正確方向，以及教導我做人處世的態度。他不僅僅是我求學生涯的導師，也是我人生學習的對象，在與其相處的這幾年，這所有一切都是我永難忘懷的人生經驗。另外感謝師母侯錦珊博士，感謝她在工作繁忙之時，還能對於實驗室每一份子付出那份溫暖的關懷。再來要感謝在我求學過程中，幫助過我，關心過我的學長們，感謝矽介觀系統實驗室的每一份子，感謝你們對實驗室的付出，也才有這篇論文的完成。在實驗室這幾年，因為有你們的陪伴，才讓我在孤獨的研究路上走完一個階段。感謝國立交通大學的生物科技學系的楊裕雄教授研究團隊以及蕭程允同學，感謝楊教授提供研究上的資源以及合作的機會，也感謝蕭同學在我研究過程中提供不同方向的研究想法以及實驗上的幫助，也感謝在研究過程中，提供意見的研究團隊其他成員。感謝台積電的李文欽博士提供量測元件以及研究上的指導，感謝工研院的魏拯華博士提供奈米碳管元件，感謝所有幫助過我，關心過我的人。最後，感謝這幾年來，若不是我家人朋友全心全力的支持，讓我無後顧之憂，可以放心的朝向自己想要的目標前進，也因為有他們，才有今天的我，感謝奶奶、爸爸、媽媽、敏瑜、明穎、明諺、舒婷，也以這篇論文，獻給在我博士班求學過程中，去世的爺爺。. vi.

(9) Table of Contents Chinese Abstract. i. English Abstract. iii. Acknowledgement. vi. Table of Contents. vii. Figure Captions. x. List of Symbols. xiv. Chapter 1. Introduction to Random Telegraph Signals. 1. and 1/f Noise. Chapter 2. 1.1 Overview. 1. 1.2 Dissertation Organization. 2. References. 5. Oxide Trap Enhanced Coulomb Energy in a. 10. Metal-Oxide-Semiconductor System 2.1 Introduction. 10. 2.2 Experimental. 11. 2.3 Analysis and Physical Interpretations. 12. 2.4 Further Considerations. 17. A. On the Definition of Coulomb Energy in Trap Case. 17. B. On the Nanocrystals Case. 17. 2.5 Critical Issues. 18. A. Screening Length. 18 vii.

(10) Chapter 3. B. Silicon Depletion Charge. 19. C. Electron Tunneling. 20. 2.6 Conclusion. 21. References. 22. Near-distance Effect of a Charged Oxide Trap on. 31. Coulomb Scattering in a Two-dimensional System. Chapter 4. 3.1 Introduction. 31. 3.2 Experimental Procedure. 32. 3.3 Analysis and Physical Interpretations. 35. 3.4 Conclusion. 39. References. 40. Observation of RTS in Direct Tunneling Regime for. 47. Local Wire-like Spot with High-k Dielectric. Chapter 5. 4.1 Introduction. 47. 4.2 Experimental Details. 48. 4.3 Observation of RTS. 50. 4.4 Discussion. 51. 4.5 Conclusion. 52. Appendix. 53. References. 54. Channel-width Dependence of Low-frequency. 64. Noise in Process Tensile-strained N-channel metal-oxide- semiconductor Transistors viii.

(11) Chapter 6. 5.1 Introduction. 64. 5.2 Experimental. 65. 5.3 Experiment Results and Discussion. 66. 5.4 Conclusion. 68. References. 69. Conclusions. 77. Vita. 79. Publication List. 80. ix.

(12) Figure Captions. Chapter 1. Fig. 1.1 The two-level RTS in drain current measured from nMOSFET with 1.7 nm gate oxide. Fig. 1.2. The multi-level RTS in drain edge direct tunneling current measured from nMOSFET with ultrathin gate stack (10 Å oxide + 10 Å nitride).. Fig. 1.3. The low-frequency (1/f) noise measured from the device.. Chapter 2. Fig. 2.1 Measured. mean. capture. time to mean emission time ratio versus gate. voltage for two devices labeled Trap A and Trap B. The inset shows the time records of RTS drain current at a fixed gate voltage of 0.3 V. The fitting lines from (2) are also shown. Fig. 2.2 Capacitive coupling equivalent circuit, accounting for the effect of the trap depth and the charge sharing between gate, inversion layer, and silicon depletion region. Fig. 2.3. Simulated results of the key capacitance components versus gate voltage.. Fig. 2.4 Calculated gate image charge and Coulomb energy versus gate voltage for two trap depths in the oxide. Fig. 2.5 The MOS energy band diagram schematically indicating the Fermi level, the trap energy level, and the trap depth. Fig. 2.6 Comparison of the measured and calculated capture time constants and x.

(13) emission time constants versus gate voltage. Fig. 2.7 Schematic configuration coordinate diagrams used for a phenomenological description of the capture and emission kinetics encountered in Trap A and Trap B. The corresponding energy band diagrams in flatband conditions are also given, schematically showing the trap depth and its energetic level in the oxide.. Chapter 3. Fig. 3.1 The discrete current fluctuations in time domain along with the definitions for ID and ∆ID. The high-current level and low-current level represent the empty trap state and filled trap state, respectively. Fig. 3.2 The normalized RTS relative amplitude measured versus gate voltage for two different trap depths. Fig. 3.3 Calculated image (polarized) charge on the gate (QG), the inversion layer (Qinv), and the depletion region (Qdep) versus gate voltage for different trap depths. The inset shows corresponding capacitance equivalent circuit [11], taking into account the trap depth and the charge sharing between the gate, inversion layer and silicon depletion region. Fig. 3.4 Separated relative current magnitude due to number fluctuations and relative current magnitude due to mobility fluctuations, plotted against gate voltage. Fig. 3.5 Experimental. (symbols) and calculated. (lines) Coulomb scattering. coefficients versus inversion-layer carrier density for two different trap depths. The calculated results with and without screening effect are plotted in terms of the solid lines and dash lines, respectively.. xi.

(14) Chapter 4. Fig. 4.1. The experimental setup.. Fig. 4.2. Measured steady-state terminal currents versus negative gate voltage.. Fig. 4.3. Time records of drain, gate, and source currents at VG = -1.08 V.. Fig. 4.4. The definitions of time constants τ on , τ off and ∆Itunneling.. Fig. 4.5 Experimental high and low state currents versus magnitude of gate voltage for the measured device. Also shown is a line for comparison. Fig. 4.6 (a) Cross section views of a gate stack overlap part devoted to EDT, defined by the thickness tox A localized gate stack thinning or conductive filament is drawn in terms of the thinning thickness ∆tox and the occupied area ∆A. Fig. 4.6 (b) Topside section views of a gate stack overlap part devoted to EDT, defined by the gate width WG, the effective tunneling size LEDT(∼6 nm). A shaded circle with the trapped electron as the origin is drawn with a radius r. Fig. 4.7. The scheme of the ∆Itunneling tunneling through a local wire-like spot.. Chapter 5. Fig. 5.1 The measured drain current per unit channel width versus drain voltage with gate overdrive as a parameter. Fig. 5.2 The experimental drain current enhancement factor versus channel width for gate overdrive Vgo = 0.75 V and drain voltage VD = 1 V. Fig. 5.3 The measured input-referred noise voltage spectral density at Vgo = 0.6 V and VD = 0.2 V versus frequency for three different positions on the wafer.. xii.

(15) Fig. 5.4 The corresponding average threshold voltage shift versus channel width with the wide structure (i.e., 10 µm) as a reference point. Here, the threshold voltage was determined at VD = 0.01 V. Fig. 5.5 The measured input-referred noise voltage spectral density at a specific frequency of 100 Hz versus channel width for Vgo = 0.6 V and VD = 0.2 V. The error bar represents the standard deviation of the distribution and the data point the mean of the distribution. Fig. 5.6. The extracted effective interface state density corresponding to Fig. 5.5.. xiii.

(16) List of Symbols Chapter 2 τc. mean time for an electron captured by a single trap. τe. mean time for an electron emission from a single trap. q. elementary charge. tox. oxide thickness. zT. trap depth. ADB. effective Debye screening area. Cox. gate oxide capacitance per unit area. Cg. trap to anode (near the gate) capacitance per unit area. Cc. trap to cathode (near the channel) capacitance per unit area. Cinv. inversion layer capacitance per unit area. Cdep. silicon depletion layer capacitance per unit area. Ceff. equivalent capacitance per unit area. QG. image charge developed on the gate electrode. kB. Boltzmann’s constant. T. absolute temperature. EF. Fermi energy level. ET. trap energy level. νth. carrier thermal velocity. ns. inversion-layer electron density per unit area. zqm. average thickness of the inversion layer. σ. capture cross section. E0. energy level of the lowest subband for unprimed valley. xiv.

(17) Shω. the lattice relaxation energy. ∆ES. the storage energy. Chapter 3 ID. drain current. ∆ID. drain current fluctuation. Qinv. image charge developed on the channel. A. channel area. Ns. carrier density per unit area. µ. total mobility. µox. mobility due to the charged oxide trap. µn. mobility due to the other mechanisms. Nox. number of charged oxide trap per unit area. α. Coulomb scattering coefficient. m*. the effective mass. ∆EC. barrier height of the conduction-band discontinuity. ε(z). position-dependent dielectric permittivity. εsi. permittivity of silicon. Ni. inversion carrier density for subband i. Ef. Fermi energy level. Chapter 4 tEOT. gate stack’s equivalent oxide thickness. tox. total effective oxide thickness. εox. permittivity of oxide. εni. permittivity of nitride xv.

(18) τon. mean time for an electron captured by a single trap. τoff. mean time for an electron emission from a single trap. ∆tox. gate dielectric thinning thickness. Jn. tunneling current density associated with the gate stack thickness tox. AEDT. edge direct tunneling area. ∆Jn. tunneling current density for a net thickness of tox - ∆tox. Chapter 5 Svg. input-referred noise voltage spectral density. Ceff. equivalent capacitance per unit area. q. elementary charge. kB. Boltzmann’s constant. T. absolute temperature. λ. tunneling distance (∼ 0.1 nm). W. channel width of active area. L. channel length of active area. xvi.

(19) Chapter 1 Introduction to Random Telegraph Signals and 1/f Noise. 1.1 Overview The continuous shrinking in the feature dimensions of metal-oxide -semiconductor field-effect transistors (MOSFETs) brings into prominence the single electron effects, among which the most important is the Random Telegraph Signals (RTS). These signals are generally considered as carrier trapping–detrapping from traps situated in the silicon oxide [1-6]. Studies on noise from individual oxide traps in small structures can supply new information of device operation as well as degradation phenomena. When the channel area of the devices is small enough, it is possible that only one trap or few traps may be close to the surface Fermi level over the entire channel [1-5]. Thus, individual trap can be observed in their neutral or charged state and, as a consequence, the current fluctuates between two discrete levels. Taking an acceptor-like trap as one example, the high-level current corresponds to the trap in a neutral state while the low-level current corresponds to the negatively charged state. Fig. 1.1 and Fig. 1.2 show the two-level current fluctuations and multi-level current fluctuations due to a single trap and few traps, respectively. Therefore, the RTS properties are completely determined by the up and down times and its amplitude. Through the examination of the mean captured and emission times, the trap depth and trap energy level can be obtained [1,3-5]. However, there is the 1.

(20) lack of a clear physical model including power dissipation and quantum effect. Different models trying to explain RTS amplitude have been proposed [3,7-8], although the physical grounds of RTS phenomenon are not fully understood yet. Therefore, any results, whether experimentally or theoretically, that can shed light on this subject will undoubtedly be welcome. The low-frequency noise (so-called 1/f noise) can be considered as the superposition of several random telegraph signals (RTS) in frequency domain [3,9-11]. The noise characteristic is shown in Fig. 1.3. The 1/f noise can be used as a potential tool for studying the underlying states near the interface of semiconductor and insulator. The characteristic of the 1/f noise can be related to the property of only a few traps existing in the nanoscale device. We hence believe that the 1/f noise serves as a useful means to analyzing the properties of the interface for the nanoscale devices.. 1.2 Dissertation Organization The main purpose of the dissertation is to deeply investigate the fluctuations and noise in ultrathin oxide devices, high-k devices and strained devices. Based on different devices, the organization of this dissertation is described below. First, an introduction to the RTS and noise is described in Chapter 1. Chapter 2 of the dissertation is focused on the RTS phenomenon in ultrathin oxide devices. Coulomb energy is essential to the charging of a nanometer-scale trap in the oxide of a metal-oxide-semiconductor (MOS) system. In this dissertation, we present for the first time experimental evidence from a 1.7-nm oxide: substantial enhancements in Coulomb energy due to the existence of a deeper trap in the oxide. Other corroborating evidence is achieved on a multiphonon theory, which can adequately elucidate the measured capture and emission kinetics. The corresponding configuration coordinate diagrams are established. Thus, Chapter 3 presents the study 2.

(21) on Coulomb scattering in a two-dimensional electron gas (2DEG) system through the relative amplitude of RTS. Experiments on an individual nanoscale trap in the oxide responsible for random telegraph signals lead to remarkable results. Initially, the deeper trap in oxide corresponds to weaker Coulomb scattering in a 2DEG. However, as the 2DEG enters into the strong inversion regime, the amount of Coulomb scattering with an interface trap drops with a faster rate than the deep trap. A stronger screening potential confinement is shown to be the physical origin of this effect. The near-distance effect is expected to remain a challenging issue in the area of nanoscale devices. Second, the study of the high-k devices is described in Chapter 4. On-off switching behaviors or two-level RTS are measured in the low voltage direct tunneling currents in ultrathin gate stack (10 Å oxide + 10 Å nitride) tunneling diode. The plausible origin is the process-induced defects in terms of localized gate stack thinning (or equivalently the conductive filament). In such extrinsic case, the current trapping-detrapping theories can adequately elucidate the data, particularly the RTS magnitude as large as 18%. The current-voltage (I-V) characteristic associated with a certain. defective. spot. is. assessed. straightforwardly,. showing. remarkable. compatibility with existing oxide thinning case. The current tunneling through the wire-like weakened spot can be probed by RTS. The role as a sensitive process monitor is demonstrated in terms of the occurrence probability of the defects as well as their locations. Third, the 1/f noise used to monitor the quality of oxide interface with different tensile stress is presented in Chapter 5. Low-frequency noise measurement in process tensile-strained n-channel metal-oxide-semiconductor field-effect transistors yields the density of the interface states, exhibiting a decreasing trend while decreasing the channel width. This finding corroborates the group of Pb centers caused by the lattice 3.

(22) mismatch at (100) Si/SiO2 interface as the origin of the underlying interface states. The present noise experiment therefore points to the enhancement of the tensile strain in the presence of channel narrowing, which in turn reduces the lattice mismatch. Finally, in Chapter 6 we summarize the conclusion of our works.. 4.

(23) References [1] K. S. Ralls, W. J. Skocpol, L. D. Jackel, R. E. Howard, L. A. Fetter, R. W. Epworth and D. M. Tennant, “Discrete Resistance Switching in Submicrometer Silicon Inversion Layers: Individual Interface Traps and Low-Frequency (1/f?) Noise,” Phys. Rev. Lett., vol. 52, pp. 228-231, 1984. [2] K. R. Farmer, C. T. Rogers, and R. A. Buhrman, “Localized-State Interactions in Metal-Oxide-Semiconductor Tunnel Diodes,” Phys. Rev. Lett., vol. 58, pp. 2255-2258, 1987. [3] M. J. Kirton and M. J. Uren, “Noise in solid-state microstructures: a new perspective on individual defects, interface states and low-frequency (1/f) noise,” Adv. Phys., vol. 38, pp. 367-468, 1989. [4] M. Schulz, “Coulomb energy of traps in semiconductor space-charge regions,” J. Appl. Phys., vol. 74, pp. 2649-2657, 1993. [5] H. H. Mueller, D. Wörle, and M. Schulz, “Evaluation of the Coulomb energy for single-electron interface trapping in sub-µm metal-oxide-semiconductor field-effect transistors,” J. Appl. Phys., vol. 75, pp. 2970-2979, 1994. [6] M. J. Chen and M. P. Lu, “On–off switching of edge direct tunneling currents in metal-oxide-semiconductor field-effect transistors,” Appl. Phys. Lett., vol. 81, pp. 3488-3490, 2002. [7] K. K. Hung, P. K. Ko, C. Hu and Y. C. Cheng, “Random telegraph noise of deep-submicrometer MOSFETs,” IEEE Electron Device Lett., vol. 11, pp. 90-92, 1990. [8] E. Simoen, B. Dierickx, C. L. Claeys, and G. J. Declerck, “Explaining the amplitude of RTS noise in submicrometer MOSFETs,” IEEE Trans. Electron Devices,. 5.

(24) vol. 39, p. 422, 1992. [9] K. K. Hung, P. K. Ko, C. Hu, and Y. C. Cheng, “A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors,” IEEE Trans. Electron Devices, vol. 37, pp. 654-665, 1990. [10] M. J. Chen, T. K. Kang, Y. H. Lee, C. H. Liu, Y. J. Chang, and K. Y. Fu, “Low-frequency noise in n-channel metal-oxide-semiconductor field-effect transistors undergoing soft breakdown,” J. Appl. Phys., vol. 89, pp. 648-653, 2001. [11] E. Simoen, G. Eneman, P. Verheyen, R. Delhougne, R. Loo, K. De Meyer, and C. Claeys, “On the beneficial impact of tensile-strained silicon substrates on the low-frequency noise of n-channel metal-oxide-semiconductor transistors,” Appl. Phys. Lett., vol. 86, 223509, 2005.. 6.

(25) ID (µA). 0.396 0.392 0.388 0.384 0. 20. 40. 60. Time (s) Fig. 1.1 The two-level RTS in drain current measured from. nMOSFET with 1.7 nm gate oxide.. 7.

(26) ID (nA). -8.4. -8.8. -9.2. -9.6 0. 20. 40. 60. 80. 100. Time (s). Fig. 1.2 The multi-level RTS in drain edge direct tunneling current measured from nMOSFET with ultrathin gate stack (10 Å oxide + 10 Å nitride).. 8.

(27) W= 0.11 µm, L=0.5 µm Vgo= 0.6 V, VD= 0.2 V. -9. 2. SVg (V /Hz). 10. -11. 10. -13. f. 10. -1. -15. 10. 10. 0. 10. 1. 2. 10. 3. 10. 10. 4. 10. 5. Frequency (Hz). Fig. 1.3 The low-frequency (1/f) noise measured from the device.. 9.

(28) Chapter 2 Oxide Trap Enhanced Coulomb Energy in a Metal-Oxide-Semiconductor System. Coulomb energy is essential to the charging of a nanometer-scale trap in the oxide of a metal-oxide-semiconductor (MOS) system. Traditionally the Coulomb energy calculation was performed on the basis of an interface-like trap. In this chapter, we present for the first time experimental evidence from a 1.7-nm oxide: substantial enhancements in Coulomb energy due to the existence of a deeper trap in the oxide. Other corroborating evidence is achieved on a multiphonon theory, which can adequately elucidate the measured capture and emission kinetics. The corresponding configuration coordinate diagrams are established. We further elaborate on the clarification of the Coulomb energy and differentiate it from that in memories containing nanocrystals or quantum dots in the oxide. Some critical issues encountered in the work are addressed as well.. 2.1 Introduction In a metal-oxide-semiconductor (MOS) system, a Coulomb barrier arises during the charging of a nanometer-scale trap in the oxide. Thus, a critical energy to overcome the barrier, namely Coulomb energy, plays a vital role in the capture kinetics.1,2 Traditionally the Coulomb energy was calculated on the basis of an 10.

(29) interface-like trap. This treatment essentially remains valid if the oxide used is much thicker. However, with the currently aggressive downscaling of the oxide thickness, the oxide trap is likely situated deeper into the oxide from the SiO2/Si interface and therefore, the Coulomb energy is expected to be affected due to enhanced image charge. However, little work has been done in this direction since the introduction of the Coulomb energy concept [1-2]. On the other hand, it is noteworthy that the definition of the Coulomb energy in the case of oxide trap [1-2] is significantly different from that in memories containing nanocrystals or quantum dots in the oxide [3-6]. However, such confusing issue has not been clarified yet. In this dissertation, we exhibit for the first time experimental evidence for the Coulomb energy enhancement in the presence of a deeper oxide trap. The other corroborating evidence is achieved based on a multiphonon theory with the configuration coordinate diagrams taken into account. We further elaborate on the clarification of the Coulomb energy in a MOS system containing a nanometer-scale trap in the oxide and differentiate it from that in a MOS memory containing a nanocrystal or dot in the oxide, followed by a concrete discussion on the critical issues encountered in the work.. 2.2 Experimental The n-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) with varying channel lengths and widths (60 nm to 600 nm) were fabricated in a state-of-the-art manufacturing process. The key process parameters as obtained by capacitance-voltage (C-V) fitting were n+ polysilicon doping concentration = 1.3×1020 cm-3, gate oxide thickness = 1.7 nm, and channel doping concentration = 8×1017 cm-3. To detect a potential oxide trap with fluctuating occupancy, the random telegraph signals (RTS) measurement is a good means [1-2, 7-9]. The RTS measurement 11.

(30) equipment and method used were the same as that described elsewhere [10]. The operating conditions at room temperature were VD = 10 mV and with VG ranging from 0.2 V to 0.4 V. The purpose of the low voltage operation is twofold: (i) it can ensure no extra trap created during the long-term RTS measurement; and (ii) the devices under study can readily reduce to a near-equilibrium 1-D MOS system. We conducted extensively RTS measurement across the whole wafer and found that as expected, the occurrence probability of RTS events in underlying devices is extremely low. For those devices identified with RTS, it was found that (i) the same abrupt transitions between two distinct states in drain current also simultaneously occur in source current; and (ii) no such noticeable changes can be observed in gate or bulk current, opposed to the recent literature [11] with a smaller oxide thickness ( ∼1.3 nm). Therefore, the RTS events encountered in our work are due to the transfer of a single electron between a certain process-induced defect in the oxide and the underlying conductive channel layer. The capture time associated with the upper level of RTS current and the emission time associated with the lower current level both were exponentially distributed. The mean of the capture time distribution, designated τc, divided by the mean of the emission time distribution, τe, is given in Fig. 2.1 against gate voltage for two devices labeled Trap A and Trap B. The inset of Fig. 2.1 shows the corresponding time evolutions of RTS drain current at a certain gate voltage. Fig. 1 reveals that while initially the τc/τe ratio is comparable between Trap A and Trap B, with gate voltage increasing further, the Trap B’s τc/τe drops with a faster rate than Trap A.. 2.3 Analysis and Physical Interpretations The size of the trap under study must be significantly less than the oxide thickness used (1.7 nm) since no noticeable change in the gate current was observed. 12.

(31) Hence, the trap responsible for the measured RTS in drain current is a nanometer-scale trap. To explore the measured τc/τe, it is necessary to know in advance the amount of the image or induced charge on the gate as a single electron is inserted into the oxide trap. First of all, it is well recognized that once a single electron is inserted into the oxide, the Debye screening length of a single electron (∼70 nm) [4, 6] develops laterally around a negatively charged nanometer-scale trap in the oxide. Here, the Debye screening length is the effective size of the “cloud” of the induced charges on the electrodes. Thus, only within the Debye screening length can the plate capacitor approximation readily apply, leading to a capacitive coupling equivalent circuit as shown in Fig. 2.2. The capacitance model accounts for the effect of the trap depth and the charge sharing between gate, inversion layer, and silicon depletion region. Owing to the insertion of one electron into a depth zT from the SiO2/Si interface, the gate oxide capacitance per unit area Cox associated with the oxide thickness tox can be separated into two distinct components: the trap to anode (near the gate) capacitance per unit area Cg = Coxtox/(tox – zT) and the trap to cathode (near the channel) capacitance per unit area Cc = Coxtox/zT. The other capacitances such as the inversion-layer capacitance per unit area Cinv and the silicon depletion capacitance per unit area Cdep can be quantified using a self-consistent Schrödinger-Poisson equations solver with the process parameters mentioned above as input. Fig. 2.3 shows the simulated results of the key capacitance components versus gate voltage. The proposed capacitance model exactly reduces to that by Schulz1 for the case of zT = 0. Indeed, the calculated results on a 17-nm oxide are consistent with those in the literature [2]. While a single electron is inserted into the trap, the potential change, ∆V, in the trap reads as ∆V = q/(ADB×Ceff) where ADB is the effective Debye screening area and Ceff, the equivalent capacitance per unit area seen from the trap to the ground, can be 13.

(32) derived from the model. Then the image charge (positive) QG developed on the gate electrode can be expressed as QG = ∆V×(ADB×Cg). Combining both equations while eliminating the common factor (i.e., Debye screening area), one achieves QG (= qCg/Ceff):. QG = q ×. zT × (C inv + C dep ) + C ox t ox t ox C ox + t ox (C inv + C dep ). .. (1). The calculated gate image charge as depicted in Fig. 2.4 remains constant until a 2DEG (2-D electron gas) layer critically appears (at VG ≈ 0.1 V), and then due to increasing screening by the inversion-layer charge, the gate image charge decreases with increasing gate voltage. Specifically, the figure reveals that an increase in the trap depth can substantially increase the gate image charge. In the presence of a 2DEG layer, the source and drain are electrically tied together and thereby the Coulomb energy can readily be written as ∆E ≈ QGVG [1-2]. The calculated Coulomb energy is together plotted in Fig. 2.4, showing that the Coulomb energy associated with the interface trap increases with gate voltage until encountering a certain peak. However, such peak point disappears in the case of non-zero trap depth and the Coulomb energy instead piles up over the conventional value. According to the principle of detailed balance with the Coulomb energy included, the τc/τe ratio can read as [1]. τc =e τe. ET − E F + ∆E k BT. .. (2). In (2), the trap level ET relative to the quasi-Fermi level EF is a function of gate 14.

(33) voltage and can readily be quantified using the Schrödinger-Poisson solver. The band diagram indicating the Fermi level, trap energy level and trap depth is shown in Fig. 2.5. The best fitting results achieved using (2), with zT = 0.7 nm and EOX – ET = 3.2 eV for Trap A and zT = 0 nm and EOX – ET = 3.3 eV for Trap B, are shown in Fig. 2.1. Here EOX denotes the oxide conduction band edge. Evidently, the fitting quality is fairly good. The extracted EOX – ET values are close to the SiO2/Si interface barrier height, as expected due to the low voltage operation. It is hence argued that an interface trap exists in Trap B device while a 0.7-nm deep trap in the oxide prevails in Trap A. In other words, the conventional Coulomb energy appears to work well for the Trap B device but leads to poor quality in fitting Trap A’s data. Such remarkable difference in τc/τe between Trap A and Trap B can therefore serve as experimental evidence of the Coulomb energy enhancement. Other corroborating evidence can be obtained through the fitting of the measured mean capture time versus gate voltage as shown in Fig. 2.6. Since the capture kinetics involve the thermal activation process at room temperature of operation, a multiphonon emission theory was utilized to calculate the capture time:. ∆E. n − = σν th s e k BT τc z qm 1. (3). where νth is the carrier thermal velocity (≈ 1.23 × 10 5 m/s ), ns is the inversion-layer electron density per unit area and zqm is the average thickness of the inversion layer.. σ is the multiphonon capture cross section and can be written as. σ = σ0e. −. EB k BT. .. (4) 15.

(34) The pre-factor σ 0 involves the interaction between the trap state and free electron wave function. E B is the thermal activation barrier height and according to multiphonon emission theory the thermal activation barrier height at high temperature ( k BT > hω / 2 ) can reduce to [12-13]. ( E 0 − E T − Sh ω ) 2 EB = 4 Shω. (5). where E0 is the energy level of the lowest subband for unprimed valley and Shω is the lattice relaxation energy (S is the Huang-Rhys factor). Fitting the τc data in Fig. 2.6 to (3) yielded the lattice relaxation energy Shω of 1.2 eV and 0.025 eV for Trap A and Trap B, respectively; and σ 0 of 2.03 × 10 −23 m2 and 3.66 × 10 −22 m2 for Trap A and Trap B, respectively. The fitting quality is again good and the same parameters readily reproduced the τe data as depicted in Fig. 2.6. Specifically, the extracted σ 0 values are physically reasonable from the viewpoint of the penetration of the wave function into the oxide: the capture cross section decreases with increasing trap depth from the SiO2/Si interface. The extracted values of the lattice relaxation energy also correctly reflect the status of the trap: a deeper trap (i.e., Trap A in our work) is accompanied with a higher lattice relaxation energy [14-15]. Using above extracted results, we constructed a configuration coordinate diagram of the underlying electron-lattice system as schematically shown in Fig. 2.7 for both devices. Also plotted in Fig. 2.7 are the MOS energy band diagrams (removing the polysilicon part) in flatband case, showing the spatial distance and energetic level of the trap. The calculation results show that the thermal activation barrier EB of Trap A is substantially smaller than Trap B, as clearly indicated in Fig. 2.7. 16.

(35) 2.4 Further Considerations A. On the Definition of Coulomb Energy in Trap Case Good reproduction of the measured time constants over gate voltage range, such as those in Fig. 2.1 and 2.6, is essential and crucial in the areas of MOSFET RTS. This means that the Coulomb energy involved must quantitatively follow that in Fig. 2.4. The corresponding Coulomb energy lies between 120 meV and 280 meV, comparable with that (250 meV) in the similar RTS measurements by Schulz [1]. As a single electron is inserted into the oxide trap, the total energy of the MOS system will change. The change in energy of the system can be divided into two parts: one is the storage energy and the other is the work done by the voltage source. The change in the storage energy term is. ∆ES =. q2. (6). 2 × ADB × C eff. ∆ES was calculated to have a value of around 1 meV for the Debye screening length of 70 nm, which is negligibly small in magnitude. This means that the Coulomb energy in terms of the work (≈ QGVG) done by external voltage source dominates. Therefore, the definition of ∆E ≈ QGVG as adopted in the areas of MOSFET RTS 1,2 is valid.. B. On the Nanocrystals Case There are several fundamental differences between a MOS system with a nanometer-scale trap in the oxide and a MOS system with a nanocrystal or dot in the oxide. Firstly, the self capacitance of a nanocrystal dot in the oxide can be well linked 17.

(36) to the actual dot diameter (this promises applications as a nanoscale floating gate) whereas from the MOS electrostatics point of view, it is the Debye screening length prevailing in the trap case. Secondly, in our RTS measurement the gate voltage was fixed such as to ensure a quasi-equilibrium MOS system; and different gate voltages under such quasi-equilibrium conditions produced different RTS data. However, during typical Coulomb Blockade experiments on nanocrystalline memories, the gate voltage must continuously change in order to produce a series of Coulomb Blockade events. Thirdly, once captured, the electrons essentially remain in the dots (unless a potential leakage is present or the retention time is exceeded); however, this is not the case for the oxide trap, as evidenced by the fluctuating occupancy. The experimentally determined Coulomb energy in the nanocrystalline dots memories [3-6] ranged from 46 meV to 168 meV. However, the definition of the Coulomb energy is significantly different from that in Ref. [1] and [2]. Instead, an alternative treatment on the basis of the Coulomb Blockade theory was widely adopted in the areas of nanocrystalline dots memories. For example, the product of the gate voltage shift between two subsequent Coulomb Blockade events and the gate-to-dot coupling coefficient can be directly connected to the critical energy required to overcome the barrier due to the single electron storage energy and the quantum confinement induced energy separation. The single electron storage energy is defined the Coulomb energy ∆E ≈ q2/2Cdot where Cdot is the self capacitance of the dot. Obviously, different situations encountered can lead to different definitions on the Coulomb energy.. 2.5 Critical Issues A. Screening Length Due to the usage of a heavily-doped n+ polysilicon gate, one may consider the 18.

(37) Thomas-Fermi screening length instead as employed in the metal case. However, a self-consistent Schrödinger-Poisson solving over the range of gate voltage under study reveals a band bending across a poly depletion region near the oxide. The corresponding electron density at the interface is found to be about one order of magnitude less than the immobile positively charged impurity concentration. Hence, in the presence of the poly depletion in our work, the Debye-Hueckel screening length considerably applies, which should be much larger than the Thomas-Fermi screening length (of the order of 1 nm) in the metal gate case. To further support this argument, from the measured RTS relative amplitude at Vg = 0.2 V, we estimate the amount of the affected area to be at least 28 nm and 35 nm across the charged trap for zT = 0.7 nm and zT = 0 nm, respectively. Thus, the cited 70 nm for the Debye screening length remains reasonable. Even the replacement with a lower value of 28 nm or 35 nm causes little error.. B. Silicon Depletion Charge The Coulomb energy also includes the contribution by the charge induced at the edge of the semiconductor depletion region. The corresponding amount of energy is the product of the induced charge at the edge of the semiconductor depletion region times the difference (∼ 0.07 eV) between Fermi level and valence band edge at the bulk part of the substrate. The depletion image charge at Vg = 0.2 V is found to be 0.1e and 0.07e, respectively, for zT = 0 and 0.7 nm, and each decreases with increasing gate voltage. As a result, the Coulomb energy due to the depletion image charge becomes of the order of a few meV and drops with increasing gate voltage. Obviously, the role of the charge induced at the edge of the semiconductor depletion region is so insignificant that the depletion image charge can be neglected in the present work. 19.

(38) C. Electron Tunneling First of all, a deeper oxide trap may not always dictate a longer time. According to the configuration coordinate diagrams that describe the electron-lattice coupling, our data point to the opposite case: a deeper oxide trap produces a smaller time constant. This is reasonable since all the extracted parameters can find their physical origins as detailed above. If the electron tunneling were involved only, then the capture time would be the sum of the tunneling time from the channel conduction band edge to certain oxide depth zT plus the subsequent multiphonon emission time such as to lower the energy of the tunneling electrons to the same level as the trap. One can estimate the tunneling time of around 10-9 sec across zT of 0.7 nm [16] and can reasonably hypothesize that the multiphonon emission time is a spontaneous event (as can be easily understood from the configuration coordinate diagrams in Fig. 2.6; the hypothesis also works well for the areas of the trap assisted tunneling), leading to a capture time of the order of 10-9 sec. Obviously, the possibility of the electron tunneling must in principle be removed since the measured capture times fall within 0.5 to 6 sec. On the other hand, once trapped the electrons may instantly tunnel to the gate electrode, contributing to the gate current. In other words, under such situations, no RTS in drain or gate current can be detected due to the extremely slow detection process in measurement setup. Moreover, in our work the gate current was found to be several orders of magnitude less than the drain current, indicating the absence of the electron tunneling in determining the experimental RTS drain current. Note that the high and low levels of RTS current represent the different stable states as denoted the free and bound state in the configuration coordinate diagrams in Fig. 2.6. The detailed balance essentially applies only to such two states, rather than the abrupt transitions between the two. The capture and emission time constants represent the critical times required to overcome the barrier height and reach the 20.

(39) crossing point, then instantly entering into the other stable state. Eventually, the measured discrete switching RTS drain current indicates that the transit time between the high and low level is substantially less than the integration time in measurement setup [10]. In other words, the abrupt transition between two stable states represents a spontaneous event with respect to the measurement setup. Hence, the corresponding transient displacement current through the gate electrode may escape detection. This explains why we saw only a flat gate current level (with typical thermal or shot fluctuations around it) over the whole observation time.. 2.6 Conclusion We have presented experimental evidence concerning the Coulomb energy enhancement in a MOS system with a nanometer-scale oxide trap. Other corroborating evidence based on a multiphonon theory has elucidated the measured capture and emission kinetics. The corresponding configuration coordinate diagrams have been established. We have further elaborated on the clarification of the Coulomb energy and have differentiated it from that in memories containing nanocrystals as a floating gate. Some critical issues encountered in the work have been addressed as well.. 21.

(40) References [1] M. Schulz, “Coulomb energy of traps in semiconductor space-charge regions,” J. Appl. Phys., vol. 74, pp. 2649-2657, 1993. [2] H. H. Mueller, D. Wörle, and M. Schulz, “Evaluation of the Coulomb energy for single-electron interface trapping in sub-µm metal-oxide-semiconductor field-effect transistors,” J. Appl. Phys., vol. 75, pp. 2970-2979, 1994. [3] S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E. F. Crabbe, and K. Chan, “A silicon nanocrystals based memory,” Appl. Phys. Lett., vol. 68, pp. 1377-1379, 1996. [4] L. Guo, E. Leobandung, and S. Y. Chou, “A Silicon Single-Electron Transistor Memory Operating at Room Temperature,” Science, vol. 275, pp. 649-651, 1997. [5] M. Saitoh, N. Takahashi, H. Ishikuro, and T. Hiramoto, “Large Electron Addition Energy above 250 meV in a Silicon Quantum Dot in a Single-Electron Transistor,” Jpn. J. Appl. Phys., vol. 40, pp. 2010-2012, 2001. [6] S. Huang, S. Banerjee, R. T. Tung, and S. Oda, “Electron trapping, storing, and emission in nanocrystalline Si dots by capacitance–voltage and conductance–voltage measurements,” J. Appl. Phys., vol. 93, pp. 576-581, 2003. [7] K. S. Ralls, W. J. Skocpol, L. D. Jackel, R. E. Howard, L. A. Fetter, R. W. Epworth and D. M. Tennant, “Discrete Resistance Switching in Submicrometer Silicon Inversion Layers: Individual Interface Traps and Low-Frequency (1/f?) Noise,” Phys. Rev. Lett., vol. 52, pp. 228-231, 1984. [8] K. R. Farmer, C. T. Rogers, and R. A. Buhrman, “Localized-State Interactions in Metal-Oxide-Semiconductor Tunnel Diodes,” Phys. Rev. Lett., vol. 58, pp. 2255-2258, 1987. [9] M. J. Kirton and M. J. Uren, “Noise in solid-state microstructures: a new. 22.

(41) perspective on individual defects, interface states and low-frequency (1/f) noise,” Adv. Phys., vol. 38, pp. 367-468, 1989. [10] M. J. Chen and M. P. Lu, “On–off switching of edge direct tunneling currents in metal-oxide-semiconductor field-effect transistors,” Appl. Phys. Lett., vol. 81, pp. 3488-3490, 2002. [11] A. Avellan, W. Krautschneider, and S. Schwantes, “Observation and modeling of random. telegraph. signals. in. the. gate. and. drain. currents. of. tunneling. metal–oxide–semiconductor field-effect transistors,” Appl. Phys. Lett., vol. 78, pp. 2790-1792, 2001. [12] D. V. Lang, Deep Centers in Semiconductors, edited by S. T. Pantelides (Gordon and Breach, Yverdon, 1992). [13] B. K. Ridley, Quantum Processes in Semiconductors, 3rd ed.(Clarendon, Oxford, 1993). [14] A. Palma, A. Godoy, J. A. Jiménez-Tejada, J. E. Carceller and J. A. López-Villanueva, “Quantum two-dimensional calculation of time constants of random telegraph signals in metal-oxide–semiconductor structures,” Phys. Rev. B, vol. 56, pp. 9565-9574, 1997. [15] W. B. Fowler, J. K. Rudra, M. E. Zvanut and F. J. Feigl, “Hysteresis and Franck-Condon relaxation in insulator-semiconductor tunneling,” Phys. Rev. B, vol. 41, pp. 8313-8317, 1990. [16] I. Lundström and C. Svensson, “Tunneling to traps in insulators,” J. Appl. Phys., vol. 43, pp. 5045-5047, 1972.. 23.

(42) 2. 0.266. Eox-ET= 3.2 eV, zT= 0.7 nm. ID (µA). 10. Exp. Trap A Exp. Trap B Eox-ET= 3.3 eV, zT= 0 nm. 0.264 0.262. 10. 1. 10. 0. 0. 10. 20. 30. Time (s) 0.396. 10. -1. ID (µA). τc / τe. 0.260. 0.392 0.388 0.384. 0. 10. 20. 30. Time (s). 0.15. 0.20. 0.25. 0.30. 0.35. 0.40. 0.45. VG (V). Fig. 2.1 Measured mean capture time to mean emission time ratio versus gate voltage for two devices labeled Trap A and Trap B. The inset shows the time records of RTS drain current at a fixed gate voltage of 0.3 V. The fitting lines from (2) are also shown.. 24.

(43) QG. −q. Cc. VG. Cinv. Cg. Qinv. C dep. Qdep. Fig. 2.2 Capacitive coupling equivalent circuit, accounting for the effect of the trap depth and the charge sharing between gate, inversion layer, and silicon depletion region.. 25.

(44) 1. 2. Capacitance (µF/cm ). 10. 0. 10 10 10. -1. Cox. -2. Cinv Cdep. 10. -3. 0.0. 0.1. 0.2. 0.3. 0.4. 0.5. VG (V). Fig.. 2.3 Simulated results of the key capacitance components versus gate voltage.. 26.

(45) 0.32. 0.8. 0.28. 0.6. 0.24 ▲. △. zT= 0 nm. ■. □. zT= 0.7 nm. 0.4. 0.20 0.16. 0.2 0.0 0.0. 0.1. 0.2. 0.3 VG (V). 0.4. 0.5. Fig. 2.4 Calculated gate image charge and Coulomb energy versus gate voltage for two trap depths in the oxide.. 27. 0.12. Coulomb Energy (eV). Normalized Gate Image Charge (QG). 1.0.

(46) Tox. E0. Eox − ET. EF. ZT Oxide. Si substrate. Fig. 2.5 The MOS energy band diagram schematically indicating the Fermi level, the trap energy level, and the trap depth.. 28.

(47) Time Constants (s). 10. 2. 10. 1. 10. 0. 10. Trap A. Trap B. τc. τc. τe. τe. σ 0 = 3.66 ×10 −22 m 2 Shω = 0.025 eV. -1. σ 0 = 2.03 ×10 −23 m 2 Shω = 1.2 eV. 0.20. 0.25. 0.30. 0.35. 0.40. VG (V). Fig. 2.6 Comparison of the measured and calculated capture time constants and emission time constants versus gate voltage.. 29.

(48) ↓ Electronic + Elastic Energy. Trap B free state. Trap A free state. bound state. EB. EB. S hω. E0 − ET. Shω. bound state E0 − ET. Configuration Coordinate →. (a). EC EC. Si EV. 3.3 eV. 3.2 eV. Trap B. Trap A. 0.7 nm. SiO2 EV. (b) Fig.. 2.7. Schematic. configuration. coordinate. diagrams. used. for. a. phenomenological description of the capture and emission kinetics encountered in Trap A and Trap B. The corresponding energy band diagrams in flatband conditions are also given, schematically showing the trap depth and its energetic level in the oxide.. 30.

(49) Chapter 3 Near-distance Effect of a Charged Oxide Trap on Coulomb Scattering in a Twodimensional System In this chapter, experiments on an individual nanoscale trap in the oxide responsible for random telegraph signals lead to remarkable results. Initially, the deeper trap in oxide corresponds to weaker Coulomb scattering in a two-dimensional electron gas (2DEG). However, as the 2DEG enters into the strong inversion regime, the amount of Coulomb scattering with an interface trap drops with a faster rate than the deep trap. A stronger screening potential confinement is shown to be the physical origin of this effect. The near-distance effect is expected to remain a challenging issue in the area of nanoscale devices.. 3.1 Introduction A two-dimensional electron (or hole) gas beneath the gate oxide of metal-oxide-semiconductor field-effect transistors (MOSFETs) can determine the device’s performance. In this two-dimensional system, carrier scattering via the Coulomb force plays a vital role. Over the past few decades, Coulomb scattering caused by charged centers, such as ionized impurities in the underlying silicon [1-3], charged traps in a nearby oxide or dielectric layer [4], and ionized impurities in remote depleted poly-silicon [5], have been extensively investigated. However, the. 31.

(50) charged centers involved [1-5] dealt with a number of charged centers, rather than an individual nanoscale charged center. Thus, if a study of Coulomb scattering is done with an individual nanoscale charged center, then it can be helpful in the area of nanoscale-sized devices. The measurement of random telegraph signals (RTS) is a good means by which to achieve this goal since it can provide the opportunity to communicate directly with an individual charged center. So far, there have been a large number of literature articles devoted to the area of MOSFETs RTS [6-9]; however, not all the data were addressed in a systematical way (consistently related between time constants and relative magnitude, for example), nor was a rigorous analysis done (that is, the role of Coulomb energy in capture kinetics [10] was lacking). Coulomb energy enhancements in the presence of a charged oxide trap situated away from the SiO2/Si interface have recently been demonstrated based on the measured RTS time constants [11]. In this letter, the RTS time constants and relative magnitude are both closely linked. The result is remarkable in terms of the near-distance effect: Coulomb scattering in the two-dimensional system is a strong function of the trap depth from the SiO2/Si interface.. 3.2 Experimental Procedure The devices under study were the same as those detailed elsewhere [11]: 1.7-nm gate oxide n-channel MOSFETs with varying channel lengths and widths (60 nm to 600 nm). The measured RTS events in the source and drain current under a 10-mV drain voltage indicate that an individual nanoscale trap naturally (it is unlikely that it is caused by electrical stressing during the RTS measurement) exists in the oxide or at the interface between silicon and oxide. Two distinct trap depths, one of 0 and one of 0.7 nm, were rigorously determined by accounting for the RTS emission and capture time data with the Coulomb energy enhancements included (see Ref.[11,12] 32.

(51) for details). The discrete current fluctuations in time domain along with the definitions for ID and ∆ID are displayed in Fig. 3.1. The high-current level and low-current level represent the empty trap state and filled trap state, respectively. The corresponding current fluctuations in terms of the relative magnitude ∆ID/ID (normalized with respect to 1 µm2 for fair comparison) versus gate voltage for both traps is shown in Fig. 3.2. It can be seen that (i) the ∆ID/ID decreases with increasing gate voltage; (ii) the interface trap (trap depth zT = 0 nm) produces a drop in ∆ID/ID with a faster rate than the oxide trap away from the interface (zT = 0.7 nm); and (iii) the ∆ID/ID is higher for the case of the interface trap until a crossover occurs. It is well recognized that once a single electron is captured by and released from the oxide trap, the conductance of the device fluctuates with two effects involved: one is the carrier number fluctuations and the other is referred to as the mobility fluctuations (via Coulomb scattering in the case of the charged oxide trap as studied here). The current fluctuations can hence be written as [13]. ∆I D ⎛ ∆I D = ⎜⎜ ID ⎝ ID. ⎛ ∆I ⎞ ⎟⎟ + ⎜⎜ D ⎠ number ⎝ I D. ⎞ ⎟⎟ ⎠ coulomb. (1). The number fluctuation term, occurring when a single electron is captured by the oxide trap, is a function of the image (polarized) charge Qinv (in a normalization form) induced in the two-dimensional electron gas (2DEG), the 2DEG carrier density Ns per unit area, and the channel area A (= 1 µm2 as explained above):. ⎛ ∆I D ⎜⎜ ⎝ ID. ⎞ Q ⎟⎟ = inv AN s ⎠ number. (2). 33.

(52) Until now it has been difficult in the open literature to distinguish between the contributions from the number fluctuations and from the Coulomb scattering ones. This problem can be considerably overcome by means of a capacitive coupling model [11]. The resulting image charge against gate voltage is given in Fig. 3.3 with the oxide trap depth as a parameter. The capacitance model utilized is inserted in Fig. 3.3. Obviously, moving a trap toward the underlying 2DEG can induce more image charge on 2DEG layer. The magnitude of the number fluctuations in the devices used was then achieved as shown in Fig. 3.4. The experimental ∆ID/ID was straightforwardly decoupled according to Eq.(1), leading to the Coulomb scattering counterpart as plotted together in Fig. 3.4. Fig. 3.4 clearly reveals that the Coulomb scattering dominates in most of the gate voltage range, and thereby is primarily responsible for the measured ∆ID/ID. The Coulomb scattering fluctuations originate from the mobility modulation caused by the charged oxide trap. To facilitate the procedure, a Coulomb scattering coefficient (α) is introduced based on Matthiessen’s rule:. 1 1 1 1 = + = ± αN ox µ µ n µ ox µ n. (3). where µ is the total mobility, µox is the mobility due to the charged oxide trap, µn is the mobility due to the other mechanisms, and Nox is the number of charged oxide trap per unit area. The positive/negative sign depends on the state of the trap when it is filled (the positive sign applies in our case). Consequently, the Coulomb scattering fluctuations term can be expressed by [13]. 34.

(53) ⎛ ∆I D ⎜⎜ ⎝ ID. ⎞ αµ ⎟⎟ = A ⎠ coulomb. (4). By substituting the measured total mobility and extracted Coulomb scattering fluctuations in Fig. 3.4 into Eq.(4), one obtains the values of α as depicted in Fig. 3.5 against the 2DEG carrier density Ns. The resultant α for both traps exhibits a weak dependence on Ns in the low carrier density regime while being a decreasing function of Ns in the high carrier density regime due to screening effect, in agreement with the literature [13]. Further observation reveals that a deeper oxide trap corresponds to a lower Coulomb scattering in weak inversion, as expected; however, as the channel conductivity increases further, the amount of Coulomb scattering with an interface trap drops with a faster rate. Indeed, Fig. 3.5 corroborates the existence of the near-distance effect: moving a trap toward the underlying strongly inverted 2DEG layer can dramatically reduce the carrier Coulomb scattering. The near-distance effect can also critically give rise to a crossover point as observed in Fig. 3.5. The same argument readily applies to Fig. 3.2 and 3.4.. 3.3 Analysis and Physical Interpretations A plausible explanation of the above near-distance effect is that the Coulomb potential associated with an interface trap is confined in a faster rate, relative to the deep trap case, due to a stronger screening effect in the high carrier density regime. Corroborating evidence can be obtained from the wavefunction penetration calculation; that is, for a finite barrier height of the conduction-band discontinuity at the Si/SiO2 interface, the wavefunction will penetrate into the oxide layer with a critical length called the penetration depth. The penetration depth, designated λ, by. 35.

(54) definition is. λ=. h2. 2 m * ∆E C. .. (5). where m* is the effective mass and ∆EC is the barrier height of the conduction-band discontinuity. The calculated penetration depth was around 0.1 nm in our work. The trap center at the interface (zT = 0 nm) therefore is surrounded by the mobile carriers with a local density in the presence of the wavefunction penetration. However, this is not the case for a deeper trap (zT = 0.7 nm). As a result of the different wavefunction penetrations encountered, the amount of Coulomb scattering for zT = 0 nm drops faster than that for zT = 0.7 nm in the high mobile carrier density region. In other words, the screening potential due to a single charged trap at zT = 0 nm is much more confined than zT = 0.7 nm in the strong inversion region. Other corroborating evidence can be found by means of a widely accepted theory of Coulomb scattering. According to the cylindrical geometry of the underlying system, the Coulomb potential around a single charged oxide trap can be expanded in a Fourier-Bessel form: φ(r , z ) =. ∞. ∫0 J 0 (kr )Ak (k , z)k dk ,. where J0(kr) is the zeroth. order Bessel function, r is the coordinate parallel to the SiO2/Si interface, and z is the coordinate perpendicular to it. The two-subband Poisson equation with a single charged center reduces to the following form [1,2,14]:. 2 ⎛∂ ∂ ⎞ ⎜ ε + ε ∂ − ε( z ) k 2 ⎟ A k ( k , z ) − 2 ε si Si g i (z) ⎜ ∂z ∂z ⎟ ∂z 2 ⎝ ⎠ i = 0, 0 '. ∑. ∞. ∫0 A k (k, z)g i (z) dz = −ρ ext (k , z T ). 36. (6).

(55) where i = 0 means the lowest subband of a 2-fold degenerate valley and i = 0' is the lowest subband of 4-fold degenerate valley, gi(z) is the inversion charge distribution for subband i, zT is the position of the Coulomb scattering center (charged center), ε(z) is the position-dependent dielectric permittivity, and εsi is the permittivity of silicon. Si in Eq.(5) is the two-dimensional screening constant, defined by [1, 2, 14]. Si =. q 2 ∂N i 2ε si ∂E f. (7). where Ni is the inversion carrier density for subband i and Ef is the Fermi energy level. The electron-electron interaction can be neglected in our work because of the non-degenerate system (corresponding to applied gate voltages less than 0.5 V). However, it should be kept in mind that a hypothesis behind Eq. (7), termed the weak potential approximation, exists; that is,. the scattering center must be located far. away from the wavefunction range of the two-dimensional electron gas, where the Coulomb potential slowly varies. Under such situations, the carrier distribution function gi(z) does not have a significant interaction with the Coulomb potential of the charged center. Consequently, Eq.(7) itself does not account for the aforementioned near-distance effect, as will be explained slightly later. The approximated boundary conditions [1,2] for solving of Eq. (6) were cited, followed by a calculation of the differential cross section based on the Born approximation for a Coulomb scattering center located at zT:. σ i (θ) =. 2πmd i e 2 h3υ. ∞. ∫ 0 Ak (k , z) g i ( z ) dz 37. 2. (8).

(56) where mdi is the density of states mass for subband i (md0 = 0.19m0 and md0 '= 0.417m0), θ is the scattering angle, and υ is the carrier velocity. Eq. (6) is the momentum-relaxation-time model constructed by Stern [1] on the basis of the elastic, intrasubband scattering process. A correction factor is therefore needed to account for the other processes, such as inelastic Coulomb scattering and the intersubband scattering. Use of the boundary conditions also affects the correction factor [2].. The. result is displayed in Fig. 3.5. The corresponding correction factor was adjusted to a certain value (relatively not large), producing a good match in the weak inversion region for both traps. Another correction factor with a comparable value was also utilized to reproduce the measured total mobility. It can be seen from Fig. 3.5 that a deviation appears in the large Ns regime for both traps. However, relative to interface trap, the discrepancy for the deeper trap is not so large. Thus, it is reasonably argued that the weak potential approximation remains valid for the charged trap having a large depth. As a result, the Coulomb scattering theory mentioned above can describe the screening effect in the deep trap case adequately. As to the trap at the interface, the discrepancy substantially worsens with increasing Ns. This reflects that a stronger screening potential confinement is encountered. In other words, the weak potential approximation essentially fails in the case of zT = 0 nm in the strong inversion conditions. Once again, we confirm that the charged center at the interface can cause a strong interaction of Coulomb scattering with the mobile electron carriers in the channel and, as a result, the underlying carrier distribution function gi(z) will change accordingly. The origin of the discrepancy in Fig. 3.5 for zT = 0 nm, therefore, is that the two-dimensional screening constant in Eq. (6) applies only to the weak potential case, rather than the strong potential one which is actually encountered.. 38.

(57) 3.4 Conclusion We believe that the above mentioned near-distance Coulomb scattering effect is not going to be absent in the area of nanoscale devices in the presence of one or a few traps. First, in such nanoscale active dimensions, different depths of charged traps may produce different Coulomb scatterings in the two-dimensional system, which, in turn, give rise to different mobilities. Second, the RTS due to the trapping-detrapping process can be substantially enhanced while scaling devices down toward the nanometer regime. Different energetic levels and different spatial depths of the underlying traps in the dielectric layer can produce different RTS characteristics through different capture time constants, different emission time constants, and different relative magnitudes. Finally, it is well recognized that a single RTS in the time domain can have the frequency equivalent of a Lorentzian noise. If there are one or a few traps, then the superposition of the corresponding Lorentzian type components lead to low-frequency or flicker noise. Once again, according to our work, the different energetic levels and different spatial depths of the underlying traps in dielectric layer can together produce different noise spectra. The undertaken study makes a great contribution to the areas of MOSFETs RTS. In addition, a near-distance effect is experimentally confirmed, which is that Coulomb scattering in a two-dimensional system is sensitive to the depth of a nanoscale oxide trap. Specifically, in strong inversion conditions, the amount of Coulomb scattering with an interface trap drops with a faster rate than the deep trap, indicating a stronger screening potential confinement. The near-distance effect is expected to prevail in next-generation nanoscale devices involving the mobility, the RTS, and the low-frequency noise.. 39.

(58) References. [1] F. Stern, “Two-subband screening and transport in (001)silicon inversion layers,” Surf. Sci., vol. 73, pp. 197-206, 1978. [2] T. Ando, A. B. Fowler and F. Stern, “Electronic properties of two-dimensional systems,” Rev. Mod. Phys., vol. 54, pp. 437-672, 1982. [3] M. V. Fischetti and S. E. Laux, “Monte Carlo study of electron transport in silicon inversion layers,” Phys. Rev. B, vol. 48, pp. 2244-2274, 1993. [4] F. Gámiz, J. A. López-Villanueva, J. A. Jiménez-Tejada, I. Melchor and A. Palma, “A comprehensive model for Coulomb scattering in inversion layers,” J. Appl. Phys., vol. 75, pp. 924-934, 1994. [5]. F.. Gámiz. and. M.. V.. Fischetti,. “Remote. Coulomb. scattering. in. metal–oxide–semiconductor field effect transistors: Screening by electrons in the gate,” Appl. Phys. Lett., vol. 83, pp. 4848-4850, 2003. [6] K. S. Ralls, W. J. Skocpol, L. D. Jackel, R. E. Howard, L. A. Fetter, R. W. Epworth and D. M. Tennant, “Discrete Resistance Switching in Submicrometer Silicon Inversion Layers: Individual Interface Traps and Low-Frequency (1/f?) Noise,” Phys. Rev. Lett., vol. 52, pp. 228-231, 1984. [7] K. R. Farmer, C. T. Rogers, and R. A. Buhrman, “Localized-State Interactions in Metal-Oxide-Semiconductor Tunnel Diodes,” Phys. Rev. Lett., vol. 58, pp. 2255-2258, 1987. [8] M. J. Kirton and M. J. Uren, “Noise in solid-state microstructures: a new perspective on individual defects, interface states and low-frequency (1/f) noise,” Adv. Phys., vol. 38, pp. 367-468, 1989. [9] M. J. Chen and M. P. Lu, “On–off switching of edge direct tunneling currents in 40.

(59) metal-oxide-semiconductor field-effect transistors,” Appl. Phys. Lett., vol. 81, pp. 3488-3490, 2002. [10] M. Schulz, “Coulomb energy of traps in semiconductor space-charge regions,” J. Appl. Phys., vol. 74, pp. 2649-2657, 1993. [11] M. P. Lu and M. J. Chen, “Oxide-trap-enhanced Coulomb energy in a metal-oxide-semiconductor system,” Phys. Rev. B, vol. 72, p. 235417, 2005. [12] Essentially, Coulomb energy and Coulomb scattering are different each other. Coulomb energy is the work done by system against the induced charge while inserting a single electron into the trap. Coulomb energy can be related to RTS capture time and emission time. On the other hand, Coulomb scattering involves the mobile carrier transport in the channel while suffering the collision events due to the perturbation caused by Coulomb potential. Coulomb scattering can be related to RTS relative magnitude. [13] K. K. Hung, P. K. Ko, C. Hu and Y. C. Cheng, “Random telegraph noise of deep-submicrometer MOSFETs,” IEEE Electron Device Lett., vol. 11, pp. 90-92, 1990. [14] There are at least 95% of the inversion-layer carriers occupying the lowest subband of the 2-fold and 4-fold degenerate valley for the gate voltages demonstrated (2 V to 4.5 V). The two-subband elastic momentum-relaxation-time model is therefore suitable to describe the Coulomb scattering process in our case.. 41.

(60) I (A) ID. ΔID Time (s). Fig. 3.1 The discrete current fluctuations in time domain along with the definitions for ID and ∆ID. The high-current level and low-current level represent the empty trap state and filled trap state, respectively.. 42.

(61) ∆ID / ID (% ). 0.16. ZT= 0 nm. ZT= 0.7 nm. 0.12 0.08 0.04 0.00 0.2. 0.3. 0.4. 0.5. VG (V). Fig. 3.2 The normalized RTS relative amplitude measured versus gate voltage for two different trap depths.. 43.

(62) Normalized Image Charge. 0.9. ZT= 0 nm. QG. ZT= 0.7 nm. QG. 0.6. −q. Cc. VG. 0.3. Cinv. Cg. Qinv. Cdep. Qdep. Qinv. Qdep. 0.0 0.1. 0.2. 0.3. 0.4. 0.5. VG (V). Fig. 3.3 Calculated image (polarized) charge on the gate (QG), the inversion layer (Qinv), and the depletion region (Qdep) versus gate voltage for different trap depths. The inset shows corresponding capacitance equivalent circuit [11], taking into account the trap depth and the charge sharing between the gate, inversion layer and silicon depletion region.. 44.

(63) ∆ID / ID (%). 0.12. ZT= 0 nm. (∆ID/ID)Number (∆ID/ID)Coulomb. 0.08. ZT= 0.7 nm. (∆ID/ID)Number (∆ID/ID)Coulomb. 0.04 0.00 0.2. 0.3. 0.4. VG (V). Fig. 3.4 Separated relative current magnitude due to number fluctuations and relative current magnitude due to mobility fluctuations, plotted against gate voltage.. 45.

(64) Scattering Coefficient (V-S). ZT= 0 nm -13. 10. ZT= 0.7 nm. -14. 10. 10. 10. 11. 12. 10. 10 -2. Ns (cm ). Fig. 3.5 Experimental (symbols) and calculated (lines) Coulomb scattering coefficients versus inversion-layer carrier density for two different trap depths. The calculated results with and without screening effect are plotted in terms of the solid lines and dash lines, respectively.. 46.