Investigation of High-Frequency Noise Characteristics in Tensile-Strained nMOSFETs

perimentally examined. Our experimental results show that with

similar saturation voltages, the strained device is found to have

larger channel noise than the control device at the same bias point.

For given direct-current power consumption, however, due to

enhanced transconductance, the strained device has better

small-signal behaviors (higher

f

and

f

) and noise characteristics

(smaller

NF

and

R

) than the control device.

Index Terms—Metal–oxide–semiconductor field-effect

transis-tors (MOSFETs), noise, radio frequency (RF), temperature,

ten-sile strained, van der Ziel model.

I. I

A

S THE GATE length of complementary metal–oxide–

semiconductor (CMOS) transistors is down-scaled to a

decananometer regime, device scaling is becoming extremely

difficult due to many physical and technological problems [1].

Strain engineering technology is one way to maintain scaling

trends of CMOS devices. It is well known that strained-channel

MOS field-effect transistors (MOSFETs) have larger carrier

mobility and drain current than unstrained counterparts [2]–[6].

It is expected that improved direct-current (dc) performances

can also enhance radio-frequency (RF) performances.

Recently, CMOS technologies with incorporation of

high-tensile contact etch stop layer (CESL) stressors have been

demonstrated for RF applications, and a very high cutoff

fre-quency f

has been shown [7], [8]. There have been many

stud-ies on high-frequency noise characterization and modeling of

conventional MOSFET devices [9]–[17]. However, the effects

Manuscript received August 3, 2010; revised October 8, 2010 and November 5, 2010; accepted December 15, 2010. Date of current version February 24, 2011. This work was supported in part by the National Sci-ence Council of Taiwan. The review of this paper was arranged by Editor Z. Celik-Butler.

S.-C. Wang is with the National Nano Device Laboratories, Hsinchu 300, Taiwan and also with Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: scwang@ndl.narl.org.tw).

P. Su is with the Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: pinsu@faculty.nctu.edu.tw).

K.-M. Chen and B.-Y. Chen are with the National Nano Device Laboratories, Hsinchu 300, Taiwan.

G.-W. Huang is with the National Nano Device Laboratories, Hsinchu 300, Taiwan, and also with the Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan.

C.-C. Hung, S.-Y. Huang, C.-W. Fan, C.-Y. Tzeng, and S. Chou are with the United Microelectronics Corporation, Hsinchu 300, Taiwan.

Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TED.2010.2104153

Fig. 1. Tensile stress in the channel of a high-strained nMOSFET.

of highly tensile stressors on high-frequency noise

character-istics have rarely been known. In this brief, high-frequency

noise characteristics of tensile-strained n-channel MOSFETs

(nMOSFETs), including their temperature dependence, will be

investigated and analyzed for the first time.

II. D

M

Multifinger CMOS transistors were fabricated using a 65-nm

generation technology with a

100-channel orientation on a

(100) wafer. For enhancing the electron mobility of the

chan-nel, an 850-Å-thick SiN

CESL was grown as a high-tensile

stressing layer. As indicated in Fig. 1, this eventually applied

a lateral tensile stress of 1.5 GPa in the device’s channel. In

addition, for the control device, a conventional low tensile

strength

(SiN

= 360 Å) CESL was used.

The gate length of the test devices is 60 nm, and the total

gate width of the test devices is 128 μm (4 μm by 32 gate

fingers). The noise parameters of the MOSFET under different

temperatures were measured using Auriga noise and

scatter-ing parameter measurement system. The dummy OPEN and

SHORT deembedding technique was used to eliminate parasitic

contributions from probing pads and metal interconnections

[12]. Finally, the intrinsic channel noise current was extracted

following the approach presented in [13].

Fig. 2 compares the dc characteristics of the tensile-strained

and control devices. The strained device presents larger drain

current than the control one for each ambient temperature

because of its enhanced carrier mobility, which can also help

to boost the cutoff frequency f

and maximum oscillation

frequency f

, as shown in Fig. 3.

Fig. 4 compares the noise measurement results in terms of

the minimum noise figure

NF

and equivalent thermal noise

resistance R

for the strained and control devices. The strained

device shows a better high-frequency noise performance than

the control one. The good match between measured and

Fig. 2. I–V characteristics for the strained and control devices.

Fig. 3. ftand fmaxversus drain current for the strained and control devices.

Fig. 4. Measured and modeled results forNFminand Rn.

modeled results based on the equivalent circuit in [14] also

indicates the validity of the extracted noise parameters shown

in this brief.

III. C

N

C

The extracted power spectral density of channel noise S

is

shown in Fig. 5. It shows that the strained device has larger S

than the control one for a given bias point. This phenomenon

Fig. 5. Power spectrum density of channel noise Sidversus temperature for

the strained and control devices.

Fig. 6. (a) Similar drain saturation voltage VD, satfor the strained and control devices at each temperature, and (b) the good match between measured Sidand

the Asgaran model [see (1)].

can be explained by the following model equation developed

by Asgaran et al. [15]:

S

= 4k

T I



1

V

+

α

_V

3V



≈

4k

T I

V

(1)

where k

≈ 1. 38 × 10

J/K is the Boltzmann’s constant,

T is the ambient temperature in Kelvin, V

is the drain

saturation voltage, V

is the gate overdrive voltage, and α is

the bulk charge coefficient.

This model indicates that in the saturation region, channel

length modulation is the main mechanism responsible for

ex-cess channel noise. Since the impact of tensile strain on V

is negligible, as shown in Fig. 6(a), the larger drain current I

present in the strained device is responsible for larger S

. The

validity of Asgaran model has been verified in our previous

study [14] and also reconfirmed in Fig. 6(b).

On the other hand, the well-known van der Ziel model [11],

which uses the white noise gamma factor to characterize S

,

can be written as

S

= γ4k

T g

(2)

where g

is the channel conductance at zero drain bias, and γ

Fig. 7. (a) Channel conductance at zero drain bias gd0and (b) noise factor γ versus temperature.

2/3 in the saturation region. For short-channel devices, however,

it would be greater than 2/3, and can be considered as a figure

of merit used to assess excess channel noise.

Fig. 7(a) shows the extracted g

value versus temperature.

The larger g

value for the strained device results from its

higher mobility. In addition, two different temperature

depen-dence values can be observed. At lower V

, the lowered

threshold voltage at higher temperature contributes to the

pos-itive temperature coefficient of g

. At higher V

, however,

degraded carrier mobility overwhelms the threshold voltage

lowering effect at higher temperature, causing g

to decrease

with increasing temperature.

Fig. 7(b) shows that both the strained and control devices

have nearly the same noise factor γ, which means they suffer

approximately the same short-channel effect on high-frequency

noise performance. In addition, since both S

and I

(or g

)

scale with mobility, the results of similar γ for both the strained

and control devices can be expected, as indicated in (1).

It is worth noting that for the 65-nm technology node, S

tends to decrease with increasing temperature at high V

(see Fig. 5). This is consistent with the result presented in

[16] for the medium-long-channel device

(L = 0. 36 μm) for

the severe decrease in g

counterbalancing the increase in

temperature [see (2)]. However, the temperature dependence is

not so obvious for the 65-nm device in this brief.

IV. N

P

C

The minimum noise figure

NF

and equivalent thermal

noise resistance R

can be approximately expressed by the

following equations [14], [17]:

NF

≈ 1 +

2

g



(R

+ R

)

S

4kT

×



ωC

g

+ ω

_C

R



S

4kT



(3)

R

≈

T

T

(R

+ R

) +

S

4k

T

g

(4)

where T

= 290 K is the reference temperature, and C

=

C

+ C

is the gate capacitance. Note that since the induced

Fig. 8. Transconductance gmversus drain current for the strained and control devices. The insets show the gate capacitance versus drain current.

Fig. 9. Sidversus drain current for the strained and control devices.

gate noise current has been found to be insignificant at a 65-nm

node even in the millimeter-wave application [14], it has been

neglected in the above derivation.

For given dc power consumption, compared with the control

device, since the strained device exhibits larger

transconduc-tance but comparable S

, as shown in Figs. 8 and 9,

respec-tively, (3) and (4) imply that the strained device would have

smaller

NF

and R

, as shown in Fig. 10(a) and (b),

respec-tively. In addition, the magnitude and phase of the optimum

source reflection coefficient (

|Γ

| and ∠Γ

) versus drain

current are respectively depicted in Fig. 10(c) and (d) for the

reader’s reference.

Note that the similar access resistance and gate capacitance

values shown in Fig. 11 and the insets in Fig. 8, respectively,

indicate the little impact of tensile strain on them for these

two different fabrication processes. Therefore, they cannot be

attributed to the discrepancy of the high-frequency small-signal

and noise performance between these two devices.

V. C

In this brief, we have investigated the high-frequency noise

behavior of the tensile-strained nMOSFET. With nearly the

same saturation voltages and noise factors, the strained device

Fig. 10. (a)NFmin, (b) Rn, (c)|Γopt|, and (d) ∠Γoptversus drain current

for the strained and control devices.

Fig. 11. Access resistance values for the strained and control devices. Rs, Rd, and Rgare access resistance values associated with the source, drain, and gate terminals, respectively.

presents larger S

than the control device due to its enhanced

mobility for a given bias point. In addition, both the strained

and control devices have the same temperature dependence

of S

. Finally, for a given dc power consumption, due to

enhanced transconductance, our experimental results show that

the strained device has better

NF

and R

than the control

device.

A

The authors would like to thank United Microelectronics

Corporation for providing the devices used in this brief.

R

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Sheng-Chun Wang received the B.S. and M.S.

de-grees in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1999 and 2001, respectively. He is currently working toward the Ph.D. degree with the National Chiao Tung Uni-versity, Hsinchu, Taiwan.

In 2001, he joined the National Nano Device Laboratories, Hsinchu, as an Assistant Re-searcher. His current research interests include small-signal and noise characterization and modeling for radio-frequency complementary metal–oxide– semiconductor devices.

Pin Su (S’98–M’02) received the B.S. and M.S.

degrees in electronics engineering from the National Chiao Tung University, Hsinchu, Taiwan, and the Ph.D. degree from the University of California at Berkeley, Berkeley.

From 1997 to 2003, he conducted his doctoral and postdoctoral research in silicon-on-insulator (SOI) devices with the University of California at Berkeley. He was also one of the major contributors to the unified Berkeley short-channel insulated-gate field-effect transistor (FET) SOI model, the first indus-trial standard SOI metal–oxide–semiconductor (MOS) FET model for circuit design. Since August 2003, he has been with the Department of Electronics Engineering, National Chiao Tung University, where he is currently an As-sociate Professor. He has authored or coauthored over 100 research papers in refereed journals and international conference proceedings in these areas. His research interests include silicon-based nanoelectronics, modeling and design for exploratory complementary MOS (CMOS) devices, and device/circuit interaction and cooptimization in nano-CMOS.

Bo-Yuan Chen was born in Miaoli, Taiwan, in 1980.

He received the M.S. degree in materials science and engineering from the National Dong Hwa University, Hualien, Taiwan, in 2006.

In 2006, he joined the National Nano Device Laboratories, Hsinchu, Taiwan, as an Assistant Re-searcher. He was engaged in research on III–V com-pound semiconductors and radio-frequency device characterization.

Guo-Wei Huang (S’94-M’97) was born in Taipei,

Taiwan, in 1969. He received the B.S. and Ph.D. degrees in electronics engineering from the National Chiao Tung University, Hsinchu, Taiwan, in 1991 and 1997, respectively.

In 1997, he joined the National Nano Device Laboratories (NDL), Hsinchu, where he is currently a Researcher and the Manager of High-Frequency Technology Division. Since August 2008, he has been an Adjunct Associate Professor with the De-partment of Electronics Engineering, National Chiao Tung University. His current research interests include characterization and modeling techniques of high-frequency devices and characterization and ver-ification of radio-frequency/monolithic microwave integrated circuit.

Cheng-Chou Hung received the B.S. and M.S.

de-grees in electrical engineering from the National Cheng Kung University, Tainan, Taiwan, in 1996 and 1999, respectively.

Currently, he is with the Advanced Technology Department Division, United Microelectronics Corporation, Hsinchu, Taiwan, as a radio-frequency (RF) Device Development Manager. His current research interests include RF complementary metal–oxide–semiconductor technology characteri-zation/delivery, including active and passive devices.

Ph.D. degrees in electronics engineering from the National Chiao Tung University Hsinchu, Taiwan, in 2003 and 2007, respectively.

Since 2003, he has been with the Advanced Technology Development Division, United Micro-electronics Corporation, Hsinchu, working on radio-frequency (RF)-related technologies. His current research interests include advanced mixed-mode and RF complementary metal–oxide–semiconductor design, including device mod-eling, noise characterization, power behavior, and reliability studies.

Cheng-Wen Fan was born in Chiayi County, Taiwan, in 1972. He received the

M.S. degree in material science and engineering (major field is on the plasma-enhanced chemical vapor deposition process) from the National Chiao Tung University in 1995.

Since 1998, he has been with the semiconductor manufacturing industry, where his first job was as an Etch Module Process Engineer with the Powerchip Technology Corporation. Afterward, he joined the United Microelectronics Corporation (UMC), working on dynamic random-access memory, logic, and analog and radio-frequency complementary metal-oxide-semiconductor. Most of his time in the UMC was in the MM&RF department and research and development with handling customer’s advance-technology products.

tional Cheng Kung University, Tainan, Taiwan, in 1993 and 1998, respectively.

From 1998 to 2000, he was with Winbond Elec-tronics Corporation, Hsinchu, Taiwan, where he was engaged in deep-trench dynamic random-access memory (RAM) process development integration and manufacture. Then, he joined the United Micro-electronics Corporation (UMC), Shin Chu, Taiwan, working in the areas of logic, Flash, field-programmable gate array, static RAM, analog and radio-frequency complementary metal-oxide-semiconductor (RF CMOS) process integration and manufacture. In 2002, he was a Program Manager with the Research and Development department, UMC, where he was in charged of 130-nm-and-beyond technology analog and RF CMOS process, and device development and characterization. Since 2006, he has been the Department manager of the Research and Development department, UMC, responsible for advance analog and RF CMOS technology development.

Sam Chou was born in Taiwan in 1968. He received

the B.S. degree in electronic physics from the Na-tional Chiao Tung University, Hsinchu, Taiwan, in 1990, and the M.S. degree in electrical engineering from the National Tsing Hua University, Hsinchu, in 1992.

Since 1994, he has been with the United Micro-electronics Corporation, Hsinchu, Taiwan, where he is currently the Manager responsible for advanced device development.