IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 22, NO. 6, JUNE 2012 321
A Bias-Varied Low-Power K-band
VCO in 90 nm CMOS Technology
Szu-Ling Liu, Xin-Cheng Tian, Yue Hao, Senior Member, IEEE, and Albert Chin, Fellow, IEEE
Abstract—This letter presents a novel bias-varied low-power
K-band voltage controlled oscillator (VCO) in a standard 90 nm CMOS technology. This circuit exhibits low power consumption of 3mW and a 12.2% tuning range with low phase noise characteristic. These performances are realized by combination of the transformer-feedback and the switchable active circuit block, which can control the dc power at different frequencies and improve the phase noise.
Index Terms—Bias-varied, k-band, phase noise, switchable
ac-tive circuit, voltage controlled oscillator (VCO).
I. INTRODUCTION
I
N microwave CMOS voltage controlled oscillator (VCO) designs, the phase noise performance is substantially limited by two device-related issues: the relatively high noise of sub-micron MOSFETs [1], [2], and the poor Q-factors of on-chip passive components due to lossy silicon sub-strate. These effects; therefore, hamper the low-power and low-voltage targets in CMOS VCOs because of lacking accept-able signal-to-noise ratio (SNR) in circuits.To achieve the low-power goal, several transformer-based feedback CMOS VCOs (TF-VCOs) were proposed [3]–[9]. The major advantage of TF-VCOs is that the dynamic gate-to-source voltage can be enhanced to improve the circuit SNR under a low supply voltage. In addition, a properly designed transformer has a higher Q-factor than an on-chip inductor of the similar size. However, the severe challenge to design high frequency TF-VCOs is that the parasitic capacitance within transformer significantly restricts the operation frequency and the tuning range. To address this issue, the edge-coupled transformers were usually used in K-band TF-VCOs to minimize the para-sitic capacitance [7]–[9]. Nevertheless, this approach inevitably decreases the coupling coefficient of the transformer and the strength of magnetic feedback. Different circuit techniques were also adopted in these K-band TF-VCOs to achieve the
Manuscript received December 22, 2011; revised April 03, 2012; accepted April 26, 2012. Date of publication May 17, 2012; date of current version June 01, 2012. This work was supported in part by the MediaTek Fellowship and National Science Council of Taiwan.
S.-L. Liu and A. Chin are with the Department of Electronic Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 300, Taiwan (e-mail: [email protected]; [email protected]).
X.-C. Tian and Y. Hao are with the School of Microelectronics, Xidian Uni-versity, Xi’an. China (e-mail: [email protected]; zerosecond@hotmail. com).
Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/LMWC.2012.2197817
Fig. 1. Schematic diagram of the proposed VCO.
low power target, as forward body-bias [7], [8] and the cur-rent-reused topology [9]. However, the tuning ranges of these circuits are still relatively limited and seldom exceed 10%.
In this letter, we proposed a low power K-band TF-VCO based on another power-reduction perspective. In addition to using transformer-feedback for low power operation, the bias-varied method is adopted in this circuit to control the dissipated power at different frequency ranges. Besides, the active circuit design has an extra merit of improving phase noise with lesser power consumption.
II. CIRCUITDESIGN
Fig. 1 shows the schematic of the proposed circuit. The drain-to-source transformer-feedback technique in [3] is used in low power operation, where and are the self-in-ductances of the primary and the secondary coils in the transformer, respectively. To design a VCO operating around 20 GHz with a tuning range larger than 10%, the single-turn, edge-coupled structure was adopted in the transformer design to reduce unwanted parasitic capacitance. This transformer has , and a moderate coupling factor of 0.72, which is designed for a balance between the feedback strength and the operation frequency.
The frequency tuning is realized by the accumu-lation mode varactor, , with the device size of . In a low-power K-band VCO, another major difficulty to achieve a wide frequency tuning is the significant degradation in Q-factor of while changes from the depletion region to the inversion region, as shown in Fig. 2. This result implies that the minimum dc power for maintaining oscillation at different frequencies is restricted by the lower . From this point of view, we de-signed a bias-varied TF-VCO by dividing the active circuit into
322 IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 22, NO. 6, JUNE 2012
Fig. 2. Simulated capacitance and Q-factor ofC at 20 GHz.
two cross-coupled pairs, and , where utilizes the traditional cross-coupled topology, and uses the capacitive feedback as in [10]. The MIM capacitor of 0.62 pF is used to provide the feedback paths in and to separate the dc levels of the gate and the drain terminals of transistors. The operation state of is controlled by through the large resistor of . In the high frequency range with lower , the oscillation is maintained by operating solely, where the negative is used to switch off for the power-saving goal. When the operation frequency decreases and enters into the inversion mode, the gate-bias is increased to turn on the , providing additional negative resistance to compensate the loss due to the decreased . Since is used to compensate the significant varactor loss at the inversion mode, the total transistor width in should be larger than in to acquire enough trans-conductance; however, the size of should be compromised with the design targets of power consumption, operation frequency and tuning range for a low-power K-band VCO. In this design, a small unit-gate-width of is applied for the active device to reduce gate resistance, while each transistor in and in has gate-fingers of 8 and 16, respectively. For the interest K-band frequency, the selected and satisfy , therefore ensuring that the input voltages in both cross-coupled pairs can keep almost the same phase.
When the proposed VCO operates in the lower re-gion, it is worth to investigate the relationship between the phase noise performance and power consumption. It seems raising level can directly improve the circuit SNR because of the tran-sistor trans-conductance is positively related to the over-drive voltage . However, because of the small threshold voltage of 90 nm NMOSFETs, the large-signal voltage swing can easily push the transistor biased at a high into the nonlinear triode region. This issue can further decrease the tank Q-factor due to the lower transistor output impedance in the triode region. Fig. 3 exhibits the simulated voltage wave-forms under different biases, where the transistor turns on during but only works in the saturation region while or . Although am-plitude can be monotonically increased with increasing , the transistor also enters in the triode region deeply and further devi-ates from the linear voltage-to relation. On the other hand, while decreases, the conduction periods of the transistor are
Fig. 3. Simulated voltage waveforms in the LC-tank (top) and in CP (bottom).
Fig. 4. Measured phase noise of the fabricated VCO at 18.11 and 20.1 GHz with respect to 1 MHz frequency offset.
further away from the zero-crossing of the tank voltage. Ac-cording to the LTV model, the noise current has the maximum effect on the excess phase if the charge injection is applied at the zero-crossing of the tank voltage [11]. Therefore, the pro-posed circuit can improve the cyclo-stationary noise property by adopting the semi-Class-B biasing of , with lesser power dissipation than using the traditional cross-coupled pair of the same total transistor size. For high-frequency and low-power designs, the combination of and is also a more feasible topology to realize such semi-Class-B opera-tion than only using a single capacitive feedback cross-coupled pair, which is because of the two advantages: First, the proposed topology has the smaller parasitic capacitance, which is due to that part of active devices are biased at higher overdrive voltage ; therefore the overall transistor size can be shirked while providing the same trans-conductance as a larger cross-coupled pair biased at Class-AB or Class-B mode; besides, in this ap-proach, the difference between the two states can be rela-tively large to prevent incorrect switching due to external noise but do not increase the power consumption; this is difficult to realize in a single capacitive feedback cross-coupled pair, since its dc power is sensitive to the gate bias.
III. MEASUREMENTRESULTS
The proposed VCO was implemented in a standard 1P9M 90 nm CMOS technology. The performance measurements were carried out by an Agilent E5052 system through on-wafer probing, while the core circuit is biased at a supply voltage
LIU et al.: A BIAS-VARIED LOW-POWER K-BAND VCO IN 90 NM CMOS TECHNOLOGY 323
TABLE I
PERFORMANCECOMPARISON OF THERECENTREPORTEDLOW-POWER, K-BANDCMOS TF-VCOS
Fig. 5. Measured tuning range and phase noise of the proposed VCO.
Fig. 6. Microphotograph of the fabricated VCO.
of 0.6 V. Fig. 4 shows the measured phase noises as and at 1-MHz offset from the 18.11- and 20.1-GHz carriers.
The frequency tuning and the phase noise characteristics of this circuit are shown in Fig. 5. When the controlled voltage ranges from 0 to 0.4 V, a negative of is applied to turn off . The corresponding oscillation frequency in this condition is from 20.36 to 19.59 GHz. As increases from 0.4 to 1.2 V, a small of 0.25 V is used to bias the at a semi-Class-B mode, and the corresponding carrier frequency is from 19.59 to 18.02 GHz. The average phase noises of
and regions are and , respectively. The whole tuning range of this VCO is as large as 12.2% at K-band. The VCO core consumes 1.4 and 3 mW power at and , respectively. Table I com-pares the performance of the recent K-Band CMOS TF-VCOs
with low power consumption of . The proposed oscil-lator achieves a 12.2% tuning range, low phase noise and the excellent Figure-of-merit-with-tuning-ranges . Fig. 6 displays the microphotograph of the fabricated VCO. The total chip size is , and the core circuit area is about excluding the buffer stage and the pad frames.
IV. CONCLUSION
The proposed low power K-band VCO is demonstrated in a standard 90 nm CMOS process. By combining the switchable active circuit design with the transformer-feedback, this circuit exhibits low power, large tuning range and excellent at two adjacent operation frequency ranges.
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