n(+)-doped-layer-free microcrystalline silicon thin film transistors fabricated with the CuMg as source/drain metal

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n + -doped-layer-free microcrystalline silicon thin film transistors fabricated with the

CuMg as source/drain metal

M. C. Wang, T. C. Chang, Po-Tsun Liu, R. W. Xiao, L. F. Lin, Y. Y. Li, F. S. Yeh, and J. R. Chen

Citation: Applied Physics Letters 91, 022113 (2007); doi: 10.1063/1.2749847

View online: http://dx.doi.org/10.1063/1.2749847

View Table of Contents: http://scitation.aip.org/content/aip/journal/apl/91/2?ver=pdfcov Published by the AIP Publishing

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n

+

-doped-layer-free microcrystalline silicon thin film transistors fabricated

with the CuMg as source/drain metal

M. C. Wang

Department of Materials Science and Engineering, National Tsing Hua University, Hsin-Chui, 300 Taiwan, Republic of China

T. C. Changa兲

Department of Physics and Institute of Electro-Optical Engineering, Center for Nanoscience and Nanotechnology, National Sun Yat-set University, 70 Lien-hai Road, Kaohsiung, 804 Taiwan, Republic of China

Po-Tsun Liu

Department of Photonics and Display Institute, National Chiao Tung University, Hsin-Chu, 300 Taiwan, Republic of China

R. W. Xiao, L. F. Lin, Y. Y. Li, and F. S. Yeh

Institute of Electronics Engineering, National Tsing Hua University, Hsin-Chui, 300 Taiwan, Republic of China

J. R. Chen

Department of Materials Science and Engineering, National Tsing Hua University, Hsin-Chui, 300 Taiwan, Republic of China

共Received 24 April 2007; accepted 26 May 2007; published online 13 July 2007兲

The feasibility of using CuMg as source/drain metal electrodes for n+_{-doped-layer-free}

microcrystalline silicon thin film transistors 共␮-Si: H TFTs兲 has been investigated. The Ohmic-contact characteristic has been achieved by using the CuMg alloy as source/drain metal. Furthermore, a wet etching process of Cu alloy source/drain metal has been completed by using the ferric chloride base etchant. The proposed␮-Si: H TFT has shown similar electrical characteristic with the␮-Si: H TFT with n+_{-doped layer. The experimental result also showed that the CuMg alloy}

was suitable for the replacement of n+_{-doped layer in thin film transistor liquid-crystal displays.}

Hydrogenated amorphous Si thin film transistors 共a-Si:H TFTs兲 have been widely used as switching devices for active matrix liquid crystal displays. The a-Si: H TFT is particularly advantageous to the production of large flat panel displays and facilitates mass production.1,2 The main objectives for flat panel display application are to enhance the field effect mobility and to reduce the off-state leakage current under backlight illumination.3Crystallized polycrys-talline silicon共poly-Si兲 thin film transistors with high mobil-ity are very attractive for peripheral circuit driver and switch-ing applications in active matrix backplanes for flat panel displays and imagers.4,5This is particularly true with active matrix organic light emitting diode displays. However, poly-Si suffers from high cost, complex processing, and sig-nificant nonuniformity over large area.

As a result, hydrogenated microcrystalline silicon has recently received considerable attention as a viable alterna-tive to its amorphous counterpart for large-area applications. In terms of TFT performance, not only a-Si: H TFTs employ-ing n+␮-Si: H as Ohmic contact layer show an improved electrical property6but also fully␮-Si: H TFTs are expected to yield higher field effect mobility and better electrical stability.7,8 More importantly,␮-Si: H films can be prepared using low thermal budget glow discharge gas decomposition method, which is also a standard industrial technique for a-Si: H deposition. However, small grain sizes 共a few tens

nanometer size兲, and poor quality at grain boundaries and at low thicknesses, are obstacles in achieving device grade

␮-Si: H films for high performance ␮-Si: H TFTs. In addi-tion, most of the␮-Si: H TFTs reported have been fabricated using nonindustrial reactors such as very high frequency plasma enhanced chemical vapor deposition共PECVD兲,7 hot wire CVD,9 and electron cyclotron resonance CVD.10 It is very desirable to achieve high grade TFTs using intrinsic and doped␮-Si: H films by the standard PECVD compatible to mass production. Therefore, the direct deposition of high quality ␮-Si thin films is a promising alternative for high mobility TFTs.11–13 On the other hand, the Ohmic-contact characteristic of the␮-Si: H was also important for the ap-plication of␮-Si: H TFTs. Compared to its amorphous coun-terpart, highly doped microcrystalline silicon共n+_-_␮_{-Si: H兲 is}

attractive due to its much higher conductivity and doping efficiency.6However, the thickness of␮-Si: H was also lim-ited by n+-etching process for the production concern. In this letter, the CuMg alloy was used as source/drain metal and provided self-aligned Ohmic-contact characteristic.

A 100-nm-thick MoW gate electrode was deposited and patterned on the glass substrate. It was followed that the back-channel-etched共BCE兲␮-Si: H TFT devices were fabri-cated by depositing a 100-nm-thick silicon oxide共SiOx兲, and

a 100-nm-thick ␮-Si: H active layer subsequently on the MoW gate using PECVD method. However, the n+-doped-layer was not deposited in the proposed structure compared with the conventional process. After the ␮-Si: H

a兲_{Electronic mail: [email protected]}

APPLIED PHYSICS LETTERS 91, 022113共2007兲

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active islands were patterned, a thin CuMg alloy layer 共300 nm兲 was deposited by dc magnetron sputtering a 99.99% purity level of CuMg alloy target共4.5 at. % Mg兲 at room temperature. The sputtering condition of CuMg alloy was as follows: the base pressure of the deposition chamber was 7.0⫻10−7 _{torr, the Ar pressure was 6 mtorr, the}

sputter-ing power was 1500 W, and the substrate temperature was at room temperature. The CuMg metal films were patterned by wet etching process to form source/drain electrodes. The wet etching process of the CuMg alloy structure was also com-pleted by introducing the ferric chloride base etchant, typi-cally used in printed circuit boards. The etch rate of CuMg film was about 1.9 nm/ s and the critical dimension loss was less than 1.4␮m. The detail process flow was illustrated in Fig.1. For comparison, the BCE␮-Si: H TFT devices with n+-a-Si: H layer were also fabricated by depositing a 100-nm-thick SiOx, a 100-nm-thick␮-Si: H active layer, and

a 50-nm-thick n+_{-a-Si: H layer subsequently on the MoW}

gate using PECVD method. After the␮-Si: H active islands were patterned, a 300-nm-thick sputter-deposited Al layer was patterned by wet etching process to form source/drain electrodes. Finally, the n+_{-a-Si: H layer on the TFT channel}

region was etched via the source/drain pattern electrodes as the etching mask. The channel length and width were 12 and 36␮m, respectively. The␮-Si: H film was confirmed by Ra-man analysis and the scanning electron microscopy共SEM兲. The annealing stability of CuMg alloy as source/drain metal was also tested at 300 ° C for 30 min in a vacuum chamber. The electrical measurement was carried out at an HP 4156C precision semiconductor parameter analyzer.

Figure 2 showed the Raman analysis of ␮-Si: H. We deposited ␮-Si: H films at 400 ° C using a standard large-area single-chamber 13.56 MHz PECVD system by high H₂

dilution of SiH₄ process gas 共H₂/ SiH₄= 80兲. The Raman peaks of the film were very sharp at 510 cm−1_{. The full width}

half maximum共FWHM兲 was measured about 11 cm−1. The Raman peak was deconvoluted using a Lorenztian multipeak function. The crystal fraction was calculated using the for-mula共Ic+ I␮兲/共Ic+ I␮+ Ia兲 where Icis the area of crystalline

peak共520 cm−1_{兲, I}

␮is the area of the microcrystalline peak

共510 cm−1_{兲, and I}

a is the area of the amorphous peak

共480 cm−1_兲.14

The resulting ␮-Si: H film shows a Raman crystallinity共XC兲 about 70% 共Fig. 2兲. The films were

ana-lyzed for their surface morphology using SEM. As shown in the inset of Fig.2, presence of small grains can be observed in the SEM image. The size of the grains and the grain size distribution across the film surface vary depending on spe-cific deposition conditions of␮-Si: H and pretreatments on the silicon oxide surface. The performance of a bottom gate TFT with back-channel etch is very sensitive to the grain size distribution uniformity. It was, therefore, important to de-velop the thin film with uniform grain structure. The grain size of the ␮-Si: H using SEM images was about 80 nm. Figure3共a兲shows the transfer characteristics of the n+-doped layer-free ␮-Si: H TFT with the CuMg source/drain metal after annealing at high temperature process.15,16 The pro-posed n+_{-doped layer-free}_␮_{-Si: H TFT with the CuMg alloy}

source/drain metal demonstrated the field-effect mobility of 0.1 cm2_{/ V s, the subthreshold slope of 1.26 V/decode, and}

the threshold voltage of 5.02 V. The mobility was extracted from the linear ID-VGplot, where the drain voltage 共VD兲 is

0.1 V, and the threshold voltage was extracted from the

lin-FIG. 1. Detail process flow of the proposed␮-Si: H TFT with the CuMg source/drain and back-channel-etched 共BCE兲 inverted-staggered TFT structure.

FIG. 2. Raman analysis of␮-Si: H and a-Si: H film. The inset shows the SEM surface profile of␮-Si: H.

FIG. 3. 共a兲 Transfer characteristics 共ID-VG curve兲 of n+-doped-layer free ␮-Si: H TFT with the CuMg source/ drain metal after the 300 ° C 30 min annealing process in the vacuum chamber. The channel length and width are 12 and 36␮m, respectively. 共b兲 Output characteristics 共ID-VD

curve兲 of n+_{-doped-layer-free}_␮_{-Si: H}

TFT with the CuMg source/drain metal after the 300 ° C, 30 min anneal-ing process in the vacuum chamber.

022113-2 Wang et al. Appl. Phys. Lett. 91, 022113共2007兲

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ear ID-VGplot, where the VD= 0.1 V. The a-Si: H-like

char-acteristic was due to 20-nm-thick a-Si: H incubation layer in bottom-gate structure. The electrical characteristic of␮-Si: H TFT with the n+_{-doped layer also showed the same}

a-Si: H-like characteristic. Therefore, the a-Si: H-like char-acteristic was not due to the CuMg alloy as source/drain metal. Furthermore, the output characteristics of ␮-Si: H TFT are also shown in Fig.3共b兲, measured at the gate volt-ages sweeping from 6 to 10 V by a voltage step of 2 V. It is shown no current crowding effect appears in the CuMg alloy source/drain metal ␮-Si: H TFT device. This indicates also the voltage applied on the TFT was not limited by the source/ drain contact resistance. According to pervious report, the Ohmic behavior is observed for metals having work function 共⌽m兲 lower than the electronic affinity 共␹s兲 of the Si film

共␹s⬃4.0±0.1 eV兲. Because the ⌽mof Mg was 3.46 eV, the

Mg was easily to form the Ohmic contact with ␮-Si: H.17 The ␮-Si: H layer also reduced the contact resistance. Ac-cording to previous report,18 the carrier transfer mechanism across the barrier is a thermally activated process, the contact resistance will be proportional to the Si film resistivity. As s result, the lower Si film bulk resistivity is resulted in lower contact resistance. The similar electrical characteristic of

␮-Si: H TFT with n+_{-a-Si doped layer also indicated the}

good Ohmic-contact characteristic of CuMg alloy structure. The␮-Si: H TFT device without n+-a-Si doped layer has been developed in this work. The CuMg alloy film acting as the source/drain electrode could replace the n+_{-a-Si doped}

layer due to the lower work function 共⌽m兲 of Mg than the

electronic affinity共␹s兲 of Si film and the use of␮-Si layer to

reduce the contact resistance. Compared to the␮-Si: H TFT with n+-doped layer, the ␮-Si: H TFT with CuMg alloy source/drain metal exhibited the similar electrical perfor-mance. For the production concern, the CuMg source/drain metal could be applied for the TFT with the n+_-doped

layer-free process and provided self-aligned Ohmic-contact characteristic.

This work was partially supported by National Science Council, the Republic of China under Contract Nos. NSC-94-2120-M-110-005, NSC94-2215-E-009-031,

NSC-95-2120-M-110-003, and NSC 95-2221-E-009-254-MY2, and MOEA Technology Development for Academia under Project 94-EC-17-A-07-S1-046 and MOE ATU Program. Also, the authors thank the Taiwan TFT LCD Association 共TTLA兲, and AU Optronics Corp. 共AUO兲, Taiwan, for their support.

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022113-3 Wang et al. Appl. Phys. Lett. 91, 022113共2007兲