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Radio-Frequency Small-Signal and Noise Modeling for Silicon-on-Insulator Dynamic
Threshold Voltage Metal–Oxide–Semiconductor Field-Effect Transistors
View the table of contents for this issue, or go to the journal homepage for more 2009 Jpn. J. Appl. Phys. 48 04C041
(http://iopscience.iop.org/1347-4065/48/4S/04C041)
Radio-Frequency Small-Signal and Noise Modeling for Silicon-on-Insulator
Dynamic Threshold Voltage Metal–Oxide–Semiconductor Field-Effect Transistors
Sheng-Chun Wang1;2, Pin Su1, Kun-Ming Chen2, Sheng-Yi Huang3, Cheng-Chou Hung3, and Guo-Wei Huang2
1Department of Electronics Engineering, National Chiao Tung University, Hsinchu 300, Taiwan 2National Nano Device Laboratories, Hsinchu 300, Taiwan
3United Microelectronics Corporation, Hsinchu 300, Taiwan
Received September 30, 2008; accepted November 20, 2008; published online April 20, 2009
This paper presents small-signal and noise modeling for radio-frequency (RF) silicon-on-insulator (SOI) dynamic threshold voltage (DT) metal–oxide–semiconductor field-effect transistors (MOSFETs). The inherent body parasitics, such as source- and drain-side junction capacitances, and access body resistance have been incorporated in this model. In addition, the analytical equations useful for parameter extractions are derived. The modeling results show good agreements with the measured data both in RF small-signal and noise aspects up to 12 GHz. Besides, we have made comparisons of important model parameters for DT and standard MOSFETs. The extracted parameters show reasonable trend with respect to applying voltages and channel lengths, which reveals the accuracy of the extraction results using our proposed method. #2009 The Japan Society of Applied Physics
DOI: 10.1143/JJAP.48.04C041
1. Introduction
The DC and AC characteristics of the dynamic threshold voltage (DT) metal–oxide–semiconductor field-effect tran-sistor (MOSFET) have been widely studied since its introduction in 1994. Due to its larger driving ability with low leakage current, it is attractive for low power applica-tions.1)To improve its performance, some optimized silicon-on-insulator (SOI)- or bulk-based fabrication processes have been reported as well.2,3)
Especially, several investigations have demonstrated its ability of radio-frequency (RF) applications with high cut-off frequency ( ft) and maximum oscillation frequency ( fmax).4–6) On the other hand, a physical RF small-signal model along with an efficient parameter extraction method is very important for the RF process control and circuit simulations, but its related studies is deficient so far.
In this paper, we will conduct RF small-signal modeling for the SOI DT MOSFET and demonstrate a practical extraction method to facilitate the extraction work with physical accuracy. Based on the small-signal model struc-ture, the RF noise model for the DT MOSFET will be built, and this model is shown to well capture its RF noise behavior. Finally, the accuracy of some important model parameters will be examined by comparing them to those of the standard devices with different channel lengths at various bias conditions.
2. Devices
The RF SOI DT MOSFETs used in this work were fabricated using UMC 65 nm SOI technology. These RF devices were laid out in the multi-finger and multi-group structure with the following denotations: L for channel length, WF for finger width, NF for the number of fingers, and NGfor the number of groups.
On-wafer two-port common-source S and high frequency noise parameters up to 12 GHz were measured using ATN noise parameter measurement system with microwave probes. To eliminate the inevitable parasitic accompanied with the probing pads, the S-parameters of devices’ corresponding open dummy were measured and then used to perform the S and noise parameters de-embedding
procedure. Furthermore, the proposed zero method has been used to extract the series resistances, and the good extraction results are shown in Fig. 1.7)
3. Model and Parameter Extraction
The small-signal equivalent circuit for SOI DT MOSFETs has been presented and is depicted in Fig. 2.8) For simplification, the neutral-body resistance between the two junction capacitances is ignored due to its lower effect below GHz.9) Based on this circuit, its simple and analytic two-port admittance (Y) parameters can be derived when the effect of series resistances compared to access body resistance (Rb) can be neglected. Following espe-cially shows the expressions benefiting the parameter extraction: Re Y11 ðRbþRbsÞ þ!22=Rb den ð1Þ Im Y11 ! ðCgsþCgdÞ þ 2=½R2bðCbsþCbdÞ den ð2Þ Re YgainReðY21Y12Þ ¼gmþ gmbðRbþRbsÞ=½RbðCbsþCbdÞ den ð3Þ Im Ygain ! ImðY21Y12Þ ! ¼ gm gmb2=½RbðCbsþCbdÞ den ð4Þ Re Y22 1 Rds þ! 2C bd½gmb þ CbdðRbþRbsÞ=ðCbsþCbdÞ den ð5Þ Im Y22 ! ðCgdþCdsÞ þCbdðRbþRbsÞ½ðRbþRbsÞ þgmb=ðCbsþCbdÞ den þ! 22C bd½ðCbsþCbdÞ Cbd=ðCbsþCbdÞ den ð6Þ Im Y12 ! Cgd CbdðRbþRbsÞ=½RbðCbsþCbdÞ den ð7Þ
where den ðRbþRbsÞ2þ!22 and RbRbsðCbsþ CbdÞ. A practical extraction procedure shown in Fig. 3 is then proposed. Compared to the method proposed in ref. 8, our extraction method relies only on local optimizations with definite fitting targets and model parameters, so the excellent modeling results with less than 10% relative root-mean-square errors for each real and imaginary part of Y-parameters, as shown in Fig. 4, can be expected. For the reader’s reference, the extracted model parameters are listed in Table I.
Besides, as shown in Fig. 5, based on the RF small-signal equivalent circuit, the RF noise equivalent circuit can be built by adding the corresponding noise current sources. In
this noise equivalent circuit, id stands for the intrinsic channel noise current, and the assumption that the high-frequency prominent drain-induced gate noise can be neglected is adopted. This assumption had been shown to be reasonable especially for deep sub-micrometer devices.10) Furthermore, the noise current sources related to series
ν ν Port 1 Gate 2 Cgd gm gmb Cgs Cds Cj,db Cj,sb Rg Rd Rds Rj,sb Rs Rb Port Drain gs bs
Fig. 2. RF small-signal equivalent circuit for the SOI DT MOSFET.
Using Eqs. (1) and (2) to respectively
(Rb Rbs), Rb ,Rbs Rb gm , gmb, gm , gmb, (Cgs Cgd), (Cgd Cds) Cbs Cgd Cgd , Cgs , Cds Rds , Cbd , Rds , Cbd , Using Eqs. (5) and (6) to respectively
Using Eqs. (3) and (4) to respectively
ω
Using Eq. (7) to
ω
optimize Re(Y11) and Im(Y11 )/
optimize Re(Y22) and Im(Y22 )/ optimize Re(Ygain) and Im(Ygain )/ω
ω optimize Im(Y12)/ parameters fitting parameters extracted Δ, + + τ τ +
Fig. 3. Proposed parameter extraction flow.
Table I. Extracted model parameters for bias condition VGS¼0:8 V, and VDS¼1 V (L=WF=NF=NG¼0:24 mm=1 mm=8=16). gm (mS) Rds () Cgs (fF) Cgd (fF) Cds (fF) (ps) gmb (mS) Rb () Rbs () Cj;sb (fF) Cj;db (fF) id (pA/pffiffiffiffiffiffiHz) 127 93 550 79 1.3 1.6 38 597 2083 246 20 60 0 -0.02 0.00 0.02 0.04 0.06 0.08 0.10
Symbols for measured data Lines for simulated data
Real par ts of Y par ameters (S) Freqeuncy (GHz) Re(Y11) Re(Y22) Re(Y21) Re(Y12) VGS=0.8V, VDS=1V (a) 14 13 12 11 10 9 8 7 6 5 4 3 2 1 -0.06 -0.04 -0.02 0.00 0.02 0.04 0.06 0.08 Imaginar y par ts of Y par ameters (S) Freqeuncy (GHz) Im(Y 11) Im(Y22) Im(Y 21) Im(Y12) VGS=0.8V, VDS=1V Symbols for measured data Lines for simulated data
(b)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
Fig. 4. (Color online) Modeling results for (a) Re Y and (b) Im Y (L=WF=NF=NG¼0:24 mm=1 mm=8=16). 0 0 100 200 300 400 500 600 -400 -350 -300 -250 -200 -150 -100 -50 0 50 100
Lines for modeling resutls
Rd=6.4Ω Rg=7Ω Re(Z12) Re(Z22-Z12) ω ω ω 2 2 + − = − + + = − + + Re( Rd Rg A Z12) Z12) ( ) Z11 A 2 2 A B B B Re(Z22 Re(Z12) = Rs Re( Z12 ) and Re( Z22 -Z 12 ) ( Ω ) Frequency (GHz) Rs=3.2Ω Re(Z11-Z12) Re( Z 11 -Z 12 ) (Ω) 12 10 8 6 4 2
Fig. 1. (Color online) Model-data comparison for the extraction of series resistances using zero method (L=WF=NF=NG¼0:24 mm=1 mm= 8=16, and VGS¼VDS¼0 V). ν ν Port 1 Gate Rg gm gmb id ij,sb Cgd Cgs Cds Cj,sb Cj,db Rds Rd Rj,sb Rs Rb Port 2 Drain gs bs
Fig. 5. RF noise equivalent circuit for the SOI DT MOSFET.
resistances and access body resistance are considered as thermal noise current sources (i ¼pffiffiffiffiffiffiffiffiffiffiffiffiffi4kT=R, R: resistance value). Finally, the inherent shot noise current caused by the source-side junction current is estimated using shot noise current formula (ij;sb¼ ffiffiffiffiffiffiffiffiffi 2qIb p ffiffiffiffiffiffiffiffiffi2qIg p ).
The only one unknown model parameter idcan be directly obtained by optimizing the four measured high-frequency noise parameters (NFmin; Rn; joptj, and =opt). The good noise modeling results are shown in Fig. 6.
4. Model Verification and Discussions
To further examine the accuracy of the modeling results, some important model parameters versus VDD [the bias applying to both gate and drain terminals, i.e., VDS¼ VGSð¼VBSÞ ¼VDD] for different channel lengths are exam-ined. Figure 7 shows that compared to the standard device, the DT device has larger transconductance (gm) due to its lower threshold voltage (VT) and higher mobility arising from lower depletion charge.1) Hence, this phenomenon could be more obvious at larger VDD. Besides, lower VTand higher mobility can also help decrease the channel resist-ance. However, in the saturation region the DT devices may have lower channel electric field than the standard devices, which in turn tends to increase the channel resistance.11)This effect is more prominent for shorter DT devices, and it explains the smaller difference in channel resistance (Rds) for shorter channel devices in Fig. 8.
Besides, lower threshold voltage also increases the channel charge, and hence increases the intrinsic capaci-tance.1)Therefore, as shown in Fig. 9, the DT device would have larger gate-to-source capacitance (Cgs) than the standard one. Figure 10 shows that the body transconduc-tance (gmb) tends to increase with VDD. However, in the low-voltage regime where the DT device normally operates, compared to gm, its value is small and hence its contribution to the total device performance could be negligible. 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.2 0.3 0.4 0.5 0.6 0.7 0.8 NFmin (dB) Freqeuncy (GHz) Nor maliz ed Rn VGS=0.8V, VDS=1V
Symbols for measured data Lines for simulated data
VGS=0.8V, VDS=1V
Symbols for measured data Line for simulated data
(a) (b) 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
Fig. 6. (Color online) Noise modeling results for (a) NFmin, Rn, and (b) opt(id¼60 pA= ffiffiffiffiffiffi Hz p , and L=WF=NF=NG¼0:24 mm=1 mm=8=16). 0.2 0 50 100 150 200 250
Symbols for DT MOSFETs Lines for stanard MOSFETs
(mS) (V) DT L=0.06μm DT L=0.12μm DT L=0.24μm 0.9 0.8 0.7 0.6 0.5 0.4 0.3 gm VDD
Fig. 7. (Color online) gmvs VDDcharacteristics for DT and standard MOSFETs with different channel lengths (WF=NF=NG¼1 mm=8=16).
0.2 0 50 100 150 200 250 300
Symbols for DT MOSFETs Lines for stanard MOSFETs
(Ω ) (V) DT L=0.06μm DT L=0.12μm DT L=0.24μm 0.9 0.8 0.7 0.6 0.5 0.4 0.3 VDD Rds
Fig. 8. (Color online) Rdsvs VDDcharacteristics for DT and stand-ard MOSFETs with different channel lengths (WF=NF=NG¼ 1 mm=8=16). 0.2 0 100 200 300 400 500 600 700 800
Symbols for DT MOSFETs Lines for stanard MOSFETs
L=0.06μm L=0.12μm (fF) (V) DT L=0.06μm DT L=0.12μm DT L=0.24μm L=0.24μm 0.9 0.8 0.7 0.6 0.5 0.4 0.3 VDD Cgs
Fig. 9. (Color online) Cgsvs VDDcharacteristics for DT and stand-ard MOSFETs with different channel lengths (WF=NF=NG¼ 1 mm=8=16).
Finally, the source- and drain-side junction capacitances (Cj;sband Cj;db) as well as access body resistance (Rb) versus VDD are examined. In Fig. 11, Cj;sb tends to exponentially increase as VDD increases due to the nature of its forward-biased diffusion capacitance, while Cj;db shows less bias dependence. Besides, decreasing channel length can help decrease Cj;sb, but increase Cj;db. Figure 12 shows that Rb may decrease with increasing VDD, which results from the abundant positive charge supplied by the external DC source through the body contact. The figure also supports that because the shorter device has a smaller cross-section for current flowing into the body, it has larger Rb. Note that all the channel length dependences for Cj;sb, Cj;db, and Rb become weak for channel length below 0.12 mm.
5. Conclusions
In this paper, we have demonstrated the RF small-signal and noise modeling for SOI DT MOSFETs. Based on a set of simple and analytic expressions of Y-parameters, model parameters can be physically extracted, and the model has been shown to be valid up to 12 GHz.
Using our proposed extraction technique, we have compared several important parameters between DT and standard MOSFETs. Compared to the standard MOSFET,
the DT MOSFET is shown to have larger gmand smaller Rds due to its lower threshold voltage and higher mobility. However, comparable Rds would be observed for shorter devices because of its better suppression of short channel effect. The low threshold voltage also helps increase the channel charge and causes Cgs to increase. Besides, for the low-voltage regime where the DT device normally operates, our study indicates that the body transconductance gmb can be neglected. Finally, with channel length scaling, the access body resistance seems to rise due to the decreasing cross section for body current to flow. The source-side junction capacitance can be minimized with channel length scaling as well.
Acknowledgements
The authors would like to thank UMC for providing the devices used in this study. This work was supported in part by the National Science Council of Taiwan.
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Fig. 10. (Color online) gmb and gm vs VDD characteristics for DT MOSFETs with different channel lengths (WF=NF=NG¼1 mm=8=16).
0.2 0 50 100 150 200 250 300 L L Cj,sb and C j,db (fF) VDD (V) Cj,sb - L=0.06um Cj,sb - L=0.12um Cj,sb - L=0.24um Cj,db - L=0.06um Cj,db - L=0.12um Cj,db - L=0.24um 0.9 0.8 0.7 0.6 0.5 0.4 0.3
Fig. 11. (Color online) Cj;sband Cj;dbvs VDDcharacteristics for DT MOSFETs with different channel lengths (WF=NF=NG¼1 mm=8=16).
0.2 0 2 4 6 8 10 12 14 Rb (k Ω ) VDD (V) Rb - L=0.06um Rb - L=0.12um Rb - L=0.24um L 0.9 0.8 0.7 0.6 0.5 0.4 0.3
Fig. 12. (Color online) Rbvs VDDcharacteristics for DT MOSFETs with different channel lengths (WF=NF=NG¼1 mm=8=16). Table I Extracted model parameters for bias condition VGS¼0:8 V, and VDS¼1 V (L=WF=NF=NG¼0:24 mm=1 mm=8=16).
