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High Field-Emission Stability of Offset-Thin-Film Transistor-Controlled Al-Doped Zinc Oxide
Nanowires
View the table of contents for this issue, or go to the journal homepage for more 2011 Jpn. J. Appl. Phys. 50 04DN07
(http://iopscience.iop.org/1347-4065/50/4S/04DN07)
High Field-Emission Stability of Offset-Thin-Film Transistor-Controlled
Al-Doped Zinc Oxide Nanowires
Po-Yu Yang, Jyh-Liang Wang1, Wei-Chih Tsai2, Shui-Jinn Wang3, Jia-Chuan Lin4, I-Che Lee, Chia-Tsung Chang, and Huang-Chung Cheng
Department of Electronics Engineering and Institute of Electronics, National Chiao Tung University, Hsinchu 30010, Taiwan 1Department of Electronics Engineering, Ming Chi University of Technology, Taipei 24301, Taiwan
2Department of Electronic Engineering, National Formosa University, Yunlin 63201, Taiwan
3Institute of Microelectronics, Department of Electrical Engineering, National Cheng Kung University, Tainan 70101, Taiwan 4Department of Electronics Engineering, St. John’s University, Taipei 25135, Taiwan
Received September 15, 2010; accepted November 24, 2010; published online April 20, 2011
Aluminum-doped zinc oxide (AZO) nanowire (NW) arrays incorporating an offset thin-film transistor (offset-TFT) have been proposed to achieve high field-emission (FE) stability. The AZO NW field emission arrays (FEAs) were hydrothermally grown at a low temperature of 85C. The uncontrolled AZO NW FEAs demonstrated superior FE characteristics (i.e., turn-on field of2:17 V/m and threshold field of 3:43 V/m) compared with those of the conventional CNT FEAs grown at a temperature below 600C. However, uncontrolled AZO NW FEAs show a larger current fluctuation of 15.6%. Therefore, the offset-TFTs were used to control the AZO NW FEAs. Consequently, the fluctuation of AZO NW FEAs could be significantly reduced to less than 2%. This novel field emission device exhibits good emission stability, voltage controllability, low-temperature processing, and structural simplicity, making it promising for applications in flat panel displays.
# 2011 The Japan Society of Applied Physics
1. Introduction
Field emission display (FED) has emerged as a leading contender in display technologies, because it combines the analogous features of cathode ray tubes (CRTs) and flat panels. The field emitters provide cold electrons to bombard phosphors in an anode plate to generate high luminance. In the last decade, various one-dimensional (1D) nanomaterials with high aspect ratios have been intensively investigated for field emitter arrays (FEAs).1–4)Among these candidates, carbon nanotubes (CNTs) have attracted considerable attention as a field emission source owing to their small tip radii of curvature, high electrical conductivity, good chemical inertness, and high mechanical strength.5–8) How-ever, Fowler–Nordheim (FN) field emission (FE) is very sensitive to the work function of the emitter surface and the nanometer structure of the emitter, giving rise to the problems of instability and nonuniformity in anode cur-rents.9)A long-channel thin-film transistor (LC-TFT, i.e., a TFT with a channel width of 100m and channel length of 250m) has been used to reduce the current fluctuation and driving voltage of CNT FEAs.10)Despite this, the LC-TFT occupied a large substrate area and showed drawbacks with respect to fine pixels. Furthermore, the reported CNT FEAs fabricated by microwave plasma-enhanced chemical vapor deposition (MPCVD) with high power (1500 W) and high substrate temperature (800C) inside a vacuum facility showed seriously degraded field-effect mobility and on/off current ratio of LC-TFT owing to plasma damage and high-temperature processing. The required high high-temperature and vacuum facility of CNT growth introduce difficulties with respect to the fabrication of large-area FEDs by the direct deposition of CNTs.11) Hence, the architecture of a high-voltage TFT with integrated Al-doped ZnO (AZO) nanos-tructure FEAs is suggested to solve these issues of LC-TFT-controlled CNT FEAs. A high-voltage TFT can be realized by an excimer laser crystallization (ELC) technique with an offset design of the undoped region in the drain side, and
excellent transistor performance (i.e., high field-effect mobility and on/off current ratio) can be achieved with low-temperature processing and a high-breakdown voltage between the drain and the gate/source can be ensured.12–14) Recently, AZO nanostructures revealed their potential on the FEAs because of the high conductance and good crystal quality,15)and they can be expected to have lower turn-on fields and higher anode currents. Moreover, AZO nano-structures can be prepared by hydrothermal methods, which are suitable for FEA fabrication because of the low reaction temperature, low cost, catalyst-free growth, uniform produc-tion, large area, and compatibility with plastic electronics.16) In this study, a complete low-temperature fabrication of offset-TFT-controlled AZO nanostructure arrays is proposed to obtain highly stable FEAs. The accompanying field emission characteristics and current stability of FEAs is systematically addressed.
2. Experimental Procedure
Figure 1 shows the fabrication procedures for offset-TFT-controlled AZO nanostructure FEAs. An amorphous silicon (-Si) film 100 nm thick was deposited on the oxidized wafer by low-pressure chemical vapor deposition (LPCVD) using a pure SiH4 gas at 550C [Fig. 1(a)]. After standard RCA cleaning, the -Si thin films were irradiated by a KrF ( ¼ 248 nm) ELC system (Lambda Physik LPX 210i). During the laser process, the samples were placed on a substrate in a vacuum chamber with 103Torr while the substrate was maintained at room temperature [Fig. 1(b)]. Each irradiated pulse of 30 ns duration delivered a maximum energy density of 400 mJ/cm2over an area of1:8 25 mm2. The laser beam was homogenized into a semi-gaussian shape along the short axis and a flat-top shape along the long axis. The number of laser shots was 100 with an equivalent overlap of 99%. After laser irradiation, the polycrystalline silicon (poly-Si) film was patterned to form the active region [Fig. 1(c)]. Next, a 300-nm-thick tetraethylorthosilicate silicon dioxide (TEOS–SiO2) layer and a 200-nm-thick poly-Si layer were deposited using plasma-enhanced chemi-cal vapor deposition (PECVD) at 350C and LPCVD at E-mail address: [email protected]
550C, respectively [Fig. 1(d)]. The poly-Si and oxide layers were then etched to form the gate electrode [Fig. 1(e)]. Afterwards, the offset region was defined with protection using a photoresist. Different offset-region lengths were established. After ion implantation of phospho-rus with a concentration of 5 1015cm2, a self-aligned source and drain were formed for the offset-TFT [Fig. 1(f)]. To activate the dopant, the sample was annealed at 600C for 24 h in N2ambient. A sputtered AZO seed layer 200 nm thick with a 1 1 mm2 square pattern was formed at the drain of the offset-TFT by the lift-off technique [Fig. 1(g)]. Subsequently, AZO NW FEAs were grown selectively on the AZO seed layer by a hydrothermal method at 85C for 60 min [Fig. 1(h)]. The precursor solution was prepared by mixing 25 mM zinc nitrate hexahydrate [Zn(NO3)2
6H2O] and 25 mM hexamethylenetetramine (HMTA) in 300 ml deionized water at room temperature. The 0.77 mM aluminum nitrate nonahydrate [Al(NO3)39H2O] was added as the dopant source into the precursor solution. The samples were thoroughly rinsed with deionized water to eliminate residual salts and dried in air at room temperature.The morphology of the AZO nanostructures was observed by field-emission scanning electron microscopy (FE-SEM; Hitachi S-4700I). The crystallinity and chemical composi-tion of the samples were investigated by high-resolucomposi-tion transmission electron microscopy (HRTEM; JEOL JEM-3000F) integrated with energy-dispersive X-ray spectrosco-py (EDS). The HRTEM samples were prepared by scraping the nanostructures off the substrates, dispersing them in ethanol, and then drop casting them onto holey
carbon-coated copper grids. The field emission characteristics of AZO nanostructure FEAs with or without offset-TFT con-trol were analyzed using Kiethley237 high-voltage units through an IEEE 488 interface controlled by a personal computer in a vacuum chamber under 1:0 107Torr at room temperature.
3. Results and Discussion
Figure 2(a) presents the FE-SEM images (45 tilt view) of the AZO nanostructure FEAs synthesized on an AZO seed layer. The morphology of AZO nanostructures reveals the shape of nanowires (NWs), which were well ordered and vertically aligned on the AZO seed layer/poly-Si substrate. The AZO NWs are uniformly distributed over the entire area of the AZO seed layer. The top-view FE-SEM image of the AZO NWs is shown in Fig. 2(b). It indicates that the aligned
AZO NWs have an average diameter of 100 nm and a
controllable length of1 m. The outlines of the NWs can be seen as well-defined hexagons, which may be attributed to the wurtzite structure of ZnO single crystals. In addition, Fig. 2(c) shown the EDS spectrum of NWs validated to the elemental signals of Zn, O, and Al, which are consistent with the elements added in the hydrothermal precursor solution. The TEM analysis was conducted to confirm the crystallinity and orientation of AZO NWs. The HRTEM image in Fig. 2(d) clearly shows a well-resolved lattice image and suggests that the AZO NW is a single-crystalline wurtzite structure with an elongated c-axis. The NW growth direction was determined from both the HRTEM image and the selective-area electron diffraction (SAED) pattern. The growth direction was recognized as that along [001], the fastest growth direction of ZnO crystals.
Figure 3(a) shows the transfer characteristics when the offset lengths of TFTs were changed. The leakage current
(defined at a gate voltage of 10 V) decreases by
approximately five orders of magnitude as the offset length
Silicon substrate Thermal oxide (c) (d) -Si α (a) Silicon substrate Thermal oxide Silicon substrate Thermal oxide Oxide Gate Poly-Si (e) Silicon substrate Thermal oxide Excimer laser irradiation
(b) P+ Silicon substrate Thermal oxide Oxide Gate Poly-Si Photoresistor (f) Silicon substrate Thermal oxide Poly-Si Seed layer Silicon substrate Oxide Gate Poly-Si (g) Offset region Silicon substrate Thermal oxide Poly-Si Gate Oxide Silicon substrate Thermal oxide Oxide Gate Poly-Si AZO nanostructures (h) Offset region -Si α -Si α Thermal oxide
Fig. 1. (Color online) Fabrication procedures for offset-TFT-controlled AZO nanostructure FEAs.
1 μm (a) 500 nm (b) 5 nm [001] (002) (010) [210] Growth direction (d) 0 Al Zn Zn Zn O Cu
Intensity (Arb. Unit)
Energy (kev) (c) 12 10 8 6 4 2
Fig. 2. (Color online) (a) FE-SEM images (45tilt view) and (b) top view of AZO NW arrays synthesized on the drain region of the offset-TFT. (c) EDS spectrum of the AZO NWs. (d) High-resolution TEM image of AZO NW. The inset is the corresponding diffraction pattern.
P.-Y. Yang et al. Jpn. J. Appl. Phys. 50 (2011) 04DN07
is increased from 5 to 25m. This phenomenon can be connected to the decrease in the electric field in the offset-gate channel region that suppresses the field-enhanced emission from the coulombic traps in Si grain boundaries, resulting in a decrease in the leakage currents between the source and drain as the offset length is increased.14) Figure 3(b) shows the saturated drain currents (Id,sat) and breakdown voltages (Vbd) for different offset lengths of offset-TFTs. The Id,sat was determined at a gate voltage (Vg) of 15 V. As can be seen, a higher Id,sat is indicated for a shorter offset length of offset-TFT. In contrast, the break-down voltage increases with offset length. The breakbreak-down voltage is measured between the source and drain when Vg ¼ 0 V. This breakdown phenomenon can be associated with an increasing electric field at the offset channel region while the offset length is decreased. To obtain a reasonable breakdown voltage and a moderate Id,sat, the offset-TFT with an offset length of 15m was chosen as a control device for the AZO NW FEAs.
Figure 4 illustrates the transfer characteristics of offset-TFTs before and after the hydrothermal AZO NW growth. The electrical properties of the offset-TFTs before and after AZO NW growth are almost the same, revealing field effect mobilities of 48.34 and 48.36 cm2/(Vs), on/off current ratios of 8:29 106 and 8:31 106, threshold voltages of 7.37 and 7.33 V, and subthreshold swings of 1.36 and
1.33 V/dec, respectively. In contrast, the reported LC-TFTs suffered serious degradation of field-effect mobility and on/off current ratio owing to plasma damage and high-temperature (i.e.,800C) processing during CNT fabrica-tion.10) Hence, the process of hydrothermal AZO NW
growth at a low temperature (i.e., 85C) without plasma damage can be beneficial for the stability of offset-TFTs.
A schematic diagram of the experimental measurement setup is shown in Fig. 5(a). A glass plate coated with indium–tin-oxide (ITO) and phosphor was used as an anode and positioned 100m above the sample surface. The field emission properties of the offset-TFT-controlled AZO NW FEAs were characterized in a high-vacuum environment with a base pressure of1:0 107Torr. Figure 5(b) shows field emission characteristics for AZO NW FEAs with and without offset-TFT control. Anode currents (Ia) were measured as a function of anode voltages (Va) at various gate voltages of offset-TFTs. The turn-on electric field (defined as the field at a current density of 1A/cm2) and threshold field (estimated as the field at a current density of 1 mA/cm2) for the uncontrolled AZO NW FEAs are2:17 and3:43 V/m, respectively. Normally, the anode current of uncontrolled AZO NW FEAs increased markedly with anode voltage. Compared to the low-temperature CNTs (i.e., grown at 250 to 550C),17–21) the AZO NW FEAs hydrothermally grown at 85C in this study demonstrate superior field emission characteristics (i.e., turn-on field of 2:17 V/m and threshold field of 3:43 V/m) than those (i.e., turn-on field of 2.4 to 3.85 V/m and threshold field of 4.3 to 6 V/m) of the reported CNT FEAs, which supports that AZO NW FEAs are good candidates for low-temperature-fabricated FEDs. On the other hand, anode currents were controlled by the offset-TFTs and showed saturated behavior at high anode voltages. Saturated anode currents of 82.4, 197.5, and 397.5A were obtained for offset-TFT gate voltages of 15, 20, and 25 V, respectively. This suggests that the anode current can be modulated by the TFT gate voltage. In addition, the turn-on fields of the offset-TFT-controlled AZO NW FEAs were raised to 2.4 V/m because of the high resistance of the offset region between the gate and drain. Furthermore, anode currents of uncontrolled and offset-TFT-controlled AZO NW FEAs can be modelled by the FN equation, expressed as22)
-10 10-13 10-12 10-11 10-10 10-9 10-8 10-7 10-6 10-5 10-4 10-3 W/L = 100 μm/20 μm Vd = 10 V Drain current, I d (A) Gate voltage, Vg (V) Offset Length = 5 μm Offset Length = 10 μm Offset Length = 15 μm Offset Length = 20 μm Offset Length = 25 μm (a) 30 20 10 0 5 0 10 20 30 40 50 60 Id,sat at Vg = 15V Vbd at Vg = 0V
Offset Length, Loffset (μm)
Drain Current, I d,sat ( μ A) 350 400 450 500 550 600 650 Breakdown V oltage, V bd (V) (b) 25 20 15 10
Fig. 3. (Color online) (a) Transfer characteristics of the offset-TFTs with various offset lengths. (b) Breakdown voltages and saturated drain currents for different offset lengths of offset-TFTs.
-10 10-14 10-13 10-12 10-11 10-10 10-9 10-8 10-7 10-6 10-5 10-4 10-3 Vd = 0.1 V Vd = 10 V Drain current, I d (A) Gate voltage, Vg (V)
Before AZO NWs Growth After AZO NWs Growth
30 20
10 0
Fig. 4. (Color online) Transfer characteristics of offset-TFTs with offset lengths of 15m before and after the growth of AZO NWs.
J ¼ a 2E2 ’ exp B’3=2 E ; ð1Þ
where J denotes the current density (A/m2), E is the applied field, a ¼ 1:56 1010AeV/V2, B ¼ 6:83 109V/(meV3=2),23)
’ stands for the work function (eV), and is the field-enhancement factor. Obeying FN theory, a linear relationship between lnðIa=Va2Þ and 1=Va can be defined as ln Ia Va2 ¼ ln Aa2 ’d2 Bd’3=2 1 Va ; ð2Þ
where Va indicates the applied anode voltage, d represents the distance between the anode and the top surface of the
AZO NWs, and A is the emission area. Figure 5(c) shows the FN plots of lnðIa=Va2Þ versus 1=Va for uncontrolled and offset-TFT-controlled AZO NW FEAs. The FN plot of anode current for uncontrolled AZO NW FEAs exhibits a linear dependence within the whole measured range, indicating consistency with FN theory. Fundamentally, the work function of AZO nanostructures can be assumed to equal to that of ZnO, i.e., 5.4 eV,24)and the of uncontrolled AZO NW FEAs was determined to be as approximately 3131. On the other hand, transitions oflnðIa=Va2Þ versus 1=Va can be observed for offset-TFT-controlled AZO NW FEAs; this is a different FE behavior from that of uncontrolled AZO NW FEAs. When the Va is low (the large value of 1=Va), an approximately linear fitting is found for the plots oflnðIa=Va2Þ versus 1=Va, suggesting that the anode current is dominated by FN theory at lower anode voltages. As Va is increased, the transitions of lnðIa=Va2Þ versus 1=Va appear, and the fitted slopes changed from negative to positive. When Va was sufficiently high, a smooth fit with a positive slope of lnðIa=Va2Þ versus 1=Va is seen. The positive slope can be associated with the pinch-off of offset-TFTs, resulting in the saturated anode current [revealed in Fig. 5(b)] and the electron supply of AZO NW FEAs being limited by offset-TFTs. Thus, we conclude that the FE behavior of AZO NW FEAs can be controlled by offset-TFTs.
Figure 6 shows the anode current and gate voltage characteristics of the offset-TFT-controlled AZO NW FEAs. The offset-TFT had a channel width (W) of 100 m and a channel length (L) of 20 m with an offset length of 15 m. The anode voltage was kept at 450 V. A large on/off current ratio of 3:05 105 was achieved for gate voltage (Vg) switching from 0 to 30 V, indicating that the driving voltage of AZO NW FEAs can be significantly suppressed.
Current stability is a key issue for field emission devices to be applied to flat panel displays. Figure 7 shows the anode current stability of the uncontrolled AZO NW FEAs and offset TFT-controlled AZO NW FEAs over an operating period of one hour. The current fluctuation was defined as I=Iave (I ¼ Imax Imin) under constant applied anode voltage, where I is the variation of the maximum anode current (Imax) and the minimum anode current (Imin), and Iave is the average anode current. It is apparent that the uncontrolled AZO NW FEAs show a larger current
Silicon substrate Thermal oxide Oxide Gate Poly-Si Vg Va GND GND Is Ig Ia Source Anode Vacuum chamber Spacing =100μμm Drain 0 100 200 300 400 500 0 TFT-controlled AZO NWs (Vg = 25 V) TFT-controlled AZO NWs (Vg = 20 V) TFT-controlled AZO NWs (Vg = 15 V) Anode Current, I a ( μ A) Anode Voltage, Va (V) Uncontrolled AZO NWs 0.0020 -26 -25 -24 -23 -22 -21 -20 -19 ln( I a / V a 2 ) ( A / V 2 ) 1/V a (V) TFT-controlled AZO NWs (Vg = 25 V) TFT-controlled AZO NWs (Vg = 20 V) TFT-controlled AZO NWs (Vg = 15 V) Uncontrolled AZO NWs
(b)
(a)
(c)
500 400 300 200 100 0.0050 0.0045 0.0040 0.0035 0.0030 0.0025Fig. 5. (Color online) (a) Schematic diagram of a high-vacuum field emission measurement for offset-TFT-controlled AZO NW FEAs. (b) Field emission characteristics of the uncontrolled and offset-TFT-controlled AZO NW FEAs for different gate voltages. (c) Corresponding FN plots of the uncontrolled and offset-TFT-controlled AZO NW FEAs.
0 10-9 10-8 10-7 10-6 10-5 10-4 10-3 Anode Current, I a (A) Gate Voltage, Vg (V) Anode voltage = 450 V 30 25 20 15 10 5
Fig. 6. (Color online) Anode current and gate voltage characteristics of the offset-TFT-controlled AZO NW FEAs.
P.-Y. Yang et al. Jpn. J. Appl. Phys. 50 (2011) 04DN07
fluctuation of about 15.6%. In contrast, all stress conditions exhibit very stable emissions achieved via offset-TFT control. The different current levels of offset-TFT-controlled AZO NW FEAs depend upon the different gate voltages. Essentially, the current fluctuation of offset-TFT-controlled AZO NW FEAs was less than 2%. This result indicates that the offset-TFT-controlled AZO NW FEAs can have significantly improved the field emission stability.
4. Conclusions
A new field emission (FE) device composed of a high-voltage offset thin-film transistor (offset-TFT) and Al-doped ZnO (AZO) nanostructure field emitter arrays (FEAs) has been demonstrated. The morphology of AZO nanostructures grown hydrothermally at 85C reveals nanowires (NWs). The AZO NW is a single-crystal wurtzite structure with an elongated c-axis along the [001] direction of the ZnO crystal. The anode current (Ia) of uncontrolled AZO NW FEAs increased markedly with the anode voltage (Va). AZO NW FEAs demonstrates superior FE characteristics (i.e., turn-on field of 2:17 V/m and threshold field of 3:43 V/m) compared with those of conventional CNT FEAs. However, the uncontrolled AZO NW FEAs show a larger current fluctuation of 15.6%. Hence, the architecture of offset-TFT-controlled AZO NW FEAs was studied to suppress the current fluctuation. In addition, the process of low-temperature hydrothermal AZO NWs without plasma damage is beneficial for the stability of offset-TFTs.
Offset-TFTs with a 15m offset length were chosen
considering the balance between the breakdown voltage and Ia. The FE behavior can be controlled by offset-TFTs.
A large on/off current ratio of3:05 105 was achieved for a gate voltage (Vg) of 0–30 V. In contrast, the current fluctuation of offset-TFT-controlled AZO NW FEAs was less than 2%, suggesting potential applications in field emission devices and high-brightness electron sources. Acknowledgements
The authors thank the National Science Council of the Republic of China for their support under Contracts 98-2218-E-009-004 and 99-2221-E-009-168-MY3. Thanks are also due to Chi Mei Optoelectronics Corporation (CMO), the Nano Facillity Center (NFC) in National Chiao Tung University, and the National Nano Device Laboratory (NDL) for technical support.
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0 0 100 200 300 400 500 600 Uncontrolled AZO NWs (Va= 300V) Anode Current, I a ( μ A) Time (s) TFT-controlled AZO NWs (Vg = 25 V, Va= 450V) TFT-controlled AZO NWs (Vg = 20 V, Va= 450V) TFT-controlled AZO NWs (Vg = 15 V, Va= 450V) 3600 3000 2400 1800 1200 600
Fig. 7. (Color online) Anode current stabilities of uncontrolled and offset-TFT-controlled AZO NW FEAs over an operating period of one hour.
