第五章 雙向穿隧型 TFET 之元件設計與優化
5.4 結合垂直穿隧與側向穿隧之結構探討
在前三個小節當中，我們已經設計出具有垂直穿隧機制的 TFET，並且 透過參數優化與異質接面方式得到理想的特性，此章的最後一個小節，我們 希望能夠將垂直穿隧與側向穿隧機制進行整合，希望能夠再次提升元件的效 能。圖 5-44 為結合垂直穿隧與側向穿隧機制的結構四，與結構三的差異處 在於改變源極右邊的位置，使得汲極的右側區域也與源極接觸，並且讓氧化 層與部分的源極重疊，如此一來，希望能夠在汲極的右側區域也能夠發生穿 隧機制，提升元件整體的開電流值。
圖 5-44 n 型與 p 型 TFET 結構四示意圖
結構四的轉移特性結果如圖 5-45、5-46所示，我們將整體電流的貢獻區 分為垂直穿隧與側向穿隧兩個部分，由於結構三的電流只由垂直穿隧機制提 供，因此將兩種結構的電流進行比較。可以看出在 n 型 TFET 中，結構四側 向穿隧電流的比例占總電流的 19.2%，而在 p 型 TFET 中，結構四側向穿隧 電流的比例只占總電流的 7.2%。可以看出雖然開電流值有所提升，但是效 果並不是很明顯。從圖 5-47、5-48可以看出汲極的右側區域的確也有穿隧電 子的生成，代表整合垂直穿隧與側向穿隧在同一個元件中的想法是可行的，
圖 5-45 n 型 TFET 結構四的轉移特性圖
only vertical vetical & lateral
Vg (V)
Component of lateral tunneling : 19.2%
Component of vertical tunneling : 80.8%
1E-3 only vertical
vetical & lateral
Vg (V)
Component of lateral tunneling : 7.2%
Component of vertical tunneling : 93.8%
圖 5-47 n 型 TFET 結構四在開狀態時的穿隧電子生成率
圖 5-48 p 型 TFET 結構四在開狀態時的穿隧電子生成率
第六章 結論與展望
6.1 穿隧型 TFET 電晶體特性
穿隧型場效電晶體 (Tunnel Field Effect Transistor, TFET) 是近年來熱門 的研究主題之一，也是被視為具有潛力能取代 MOSFET 的其中一種元件，
最後將兩種穿隧機制整合在同一元件上的概念，結果顯示側向穿隧電流 This work (p)
I D(A/um)
|VD|(V)
This work (n)
圖 6-1 本研究結果與參考文獻中矽元件的性能比較圖
表 6-1 本研究結果與參考文獻矽元件的參數比較表
Vertical (n) 1.09 6.34E-7 1 100 S
This work
Vertical (p) 2.86 1.87E-7 1 100 S
Ref.[24] SOI, L-shape (n) 12.1 5.4 1 70 E
Ref.[25] SOI (n) 1.2 2.7E-3 0.5 20 S
Ref.[26] SOI, silicide (p) 1.2 1.7E-5 1 20 E
Ref.[27] SOI (p) 0.01 1E-3 1 100 E
Ref.[28] Bulk (n1) 0.05 5.5E-4 0.6 100 E
Ref.[28] Bulk, JTFET (n2) 0.13 4.5E-4 0.6 100 E Ref.[29] SOI, pocket (n) 0.07 1E-3 2.1 1E3 E Ref.[30] SOI, nano-wire (p) 0.08 1E-3 3 500 E
0.2 0.4 0.6 0.8 1.0 1.2
This work (p) This work (n)
I D(A/um)
|VD|(V)
圖 6-2 本研究結果與參考文獻中矽鍺元件的性能比較圖
表 6-2 本研究結果與參考文獻矽鍺元件的參數比較表 Material & Structure
(type)
Material (type)
Si0.64Ge0.36(Source &
Channel), SOI (p2)
22.6 1.5E-6 1 20 S
Ref.[13]
Si0.66Ge0.34(Channel), SOI (p3)
42.1 1.96E-5 1 20 S
Ref.[14]
Graded SiGe, Double gate UTB (p)
100 1E-4 0.7 10 S
Ref.[19] Ge, GeOI green-FET (n) 703 0.05 0.5 40 S
Ref.[20]
Ge,
Double gate UTB (n)
9.96 1E-5 0.5 50 S
Ref.[20]
Ge,
Double gate UTB (p)
8.37 5E-5 0.5 50 S
Ref.[21]
Ge (Source), Bulk Vertical (n)
40 4E-4 0.3 10 S
Ref.[25] Ge, GeOI (n) 440 3.6 0.5 20 S
Ref.[31] Si0.85Ge0.15, SOI (n) 18.8 0.52 1 200 E Ref.[31] Si0.7Ge0.3, SOI (p) 112 0.037 1 200 E
6.2 未來展望
實驗結果證實我們所設計出的結構除了能夠保持 TFET 原有的特性之外，
在提升開電流的這個項目中，也成功的讓 n 型與 p 型 TFET 的開電流值達到 10-4安培等級，與其他研究文獻的結果相較，我們的研究成果擁有較理想的 開電流值，因此算是成功達到初步的研究目標。由於本研究主要著重於二維 元件特性分析，因此未來希望往三維結構的方向進行研究，嘗試結合現有的 MOSFET 技術，設計出具有理想電特性的 TFET，使 TFET 能夠應用的領域 更加廣闊。
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